[PATCH] ARM64: tegra: Add support for Google Pixel C

[PATCH] ARM64: tegra: Add support for Google Pixel C

[Jon Hunter]

Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based
upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.

Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm64/boot/dts/nvidia/Makefile           |  1 +
 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42 +++++++++++++++++++++++++++
 2 files changed, 43 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts

diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
index a7e865da1005..0f7cdf3e05c1 100644
--- a/arch/arm64/boot/dts/nvidia/Makefile
+++ b/arch/arm64/boot/dts/nvidia/Makefile
@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-2180.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2571.dtb
+dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
 
 always		:= $(dtb-y)
 clean-files	:= *.dtb
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
new file mode 100644
index 000000000000..a7474f5fcbcc
--- /dev/null
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+#include "tegra210.dtsi"
+
+/ {
+	model = "Google Pixel C";
+	compatible = "google,smaug-rev8", "google,smaug-rev7",
+		     "google,smaug-rev6", "google,smaug-rev5",
+		     "google,smaug-rev4", "google,smaug-rev3",
+		     "google,smaug-rev1", "google,smaug", "nvidia,tegra210";
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x70006000";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x0 0xc0000000>;
+	};
+
+	serial@0,70006000 {
+		status = "okay";
+	};
+
+	pmc@0,7000e400 {
+		nvidia,invert-interrupt;
+		nvidia,suspend-mode = <0>;
+		nvidia,cpu-pwr-good-time = <0>;
+		nvidia,cpu-pwr-off-time = <0>;
+		nvidia,core-pwr-good-time = <12000 6000>;
+		nvidia,core-pwr-off-time = <39053>;
+		nvidia,core-power-req-active-high;
+		nvidia,sys-clock-req-active-high;
+		status = "okay";
+	};
+
+	sdhci@0,700b0600 {
+		bus-width = <8>;
+		non-removable;
+		status = "okay";
+	};
+};
-- 
2.1.4

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

[Mark Rutland]

Hi,

On Wed, Jan 06, 2016 at 09:40:22AM +0000, Jon Hunter wrote:
> Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based
> upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.
> 
> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>  arch/arm64/boot/dts/nvidia/Makefile           |  1 +
>  arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42 +++++++++++++++++++++++++++
>  2 files changed, 43 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
> 
> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
> index a7e865da1005..0f7cdf3e05c1 100644
> --- a/arch/arm64/boot/dts/nvidia/Makefile
> +++ b/arch/arm64/boot/dts/nvidia/Makefile
> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-2180.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2571.dtb
> +dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
>  
>  always		:= $(dtb-y)
>  clean-files	:= *.dtb
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
> new file mode 100644
> index 000000000000..a7474f5fcbcc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
> @@ -0,0 +1,42 @@
> +/dts-v1/;
> +
> +#include "tegra210.dtsi"
> +
> +/ {
> +	model = "Google Pixel C";
> +	compatible = "google,smaug-rev8", "google,smaug-rev7",
> +		     "google,smaug-rev6", "google,smaug-rev5",
> +		     "google,smaug-rev4", "google,smaug-rev3",
> +		     "google,smaug-rev1", "google,smaug", "nvidia,tegra210";

This looks a little funky. Is each revision a strict superset of the
previous version?

> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x70006000";
> +	};

Use stdout-path.

Otherwise this looks ok.

Thanks,
Mark.
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Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

[Jon Hunter]

On 06/01/16 09:46, Mark Rutland wrote:
> Hi,
> 
> On Wed, Jan 06, 2016 at 09:40:22AM +0000, Jon Hunter wrote:
>> Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based
>> upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.
>>
>> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>  arch/arm64/boot/dts/nvidia/Makefile           |  1 +
>>  arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42 +++++++++++++++++++++++++++
>>  2 files changed, 43 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
>> index a7e865da1005..0f7cdf3e05c1 100644
>> --- a/arch/arm64/boot/dts/nvidia/Makefile
>> +++ b/arch/arm64/boot/dts/nvidia/Makefile
>> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb
>>  dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb
>>  dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-2180.dtb
>>  dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2571.dtb
>> +dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
>>  
>>  always		:= $(dtb-y)
>>  clean-files	:= *.dtb
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
>> new file mode 100644
>> index 000000000000..a7474f5fcbcc
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
>> @@ -0,0 +1,42 @@
>> +/dts-v1/;
>> +
>> +#include "tegra210.dtsi"
>> +
>> +/ {
>> +	model = "Google Pixel C";
>> +	compatible = "google,smaug-rev8", "google,smaug-rev7",
>> +		     "google,smaug-rev6", "google,smaug-rev5",
>> +		     "google,smaug-rev4", "google,smaug-rev3",
>> +		     "google,smaug-rev1", "google,smaug", "nvidia,tegra210";
> 
> This looks a little funky. Is each revision a strict superset of the
> previous version?

Yes this is based upon what Google have in the chromiumos branch [0] and
I have checked with them and they were ok with this.

Olof, let me know if you have any more comments here.

>> +
>> +	chosen {
>> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x70006000";
>> +	};
> 
> Use stdout-path.

Ok.

> Otherwise this looks ok.

Cheers
Jon

[0]
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.18/arch/arm64/boot/dts/tegra/tegra210-smaug-p1.dts

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

[Jon Hunter]

On 06/01/16 12:49, Jon Hunter wrote: 
> On 06/01/16 09:46, Mark Rutland wrote:
>> Hi,
>>
>> On Wed, Jan 06, 2016 at 09:40:22AM +0000, Jon Hunter wrote:
>>> Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based
>>> upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.
>>>
>>> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>> ---
>>>  arch/arm64/boot/dts/nvidia/Makefile           |  1 +
>>>  arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42 +++++++++++++++++++++++++++
>>>  2 files changed, 43 insertions(+)
>>>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts

[snip]

>>> +
>>> +	chosen {
>>> +		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x70006000";
>>> +	};
>>
>> Use stdout-path.
> 
> Ok.

Adding Arnd.

Hmmm ... well apparently stdout-path does not work for tegra and in
order to make this work I had to do the following ...


[PATCH] serial: 8250: of: Add earlycon support for Tegra

Currently, early console support only works for Tegra when the serial
port information is passed via the earlycon boot parameter. If the
serial port information is specified via device-tree using the
"stdout-path" then the early console does not work because:

1. The tegra serial ports compatibility parameter does not match any
   of the supported serial drivers for early console.
2. The of_setup_earlycon() function assumes that serial port registers
   are byte aligned and for tegra they are 32-bit aligned.

Add an early console setup function for tegra so that the early console
can be specified via the device-tree "stdout-path" variable.

Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/tty/serial/8250/8250_of.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
index 33021c1f7d55..98adf83e83c2 100644
--- a/drivers/tty/serial/8250/8250_of.c
+++ b/drivers/tty/serial/8250/8250_of.c
@@ -44,6 +44,16 @@ void tegra_serial_handle_break(struct uart_port *p)
 		udelay(1);
 	} while (1);
 }
+
+int __init tegra_earlycon_setup(struct earlycon_device *device,
+				const char *options)
+{
+	device->port.iotype = UPIO_MEM32;
+	device->port.regshift = 2;
+
+	return early_serial8250_setup(device, options);
+}
+OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart", tegra_earlycon_setup);
 #else
 static inline void tegra_serial_handle_break(struct uart_port *port)
 {


Arnd, does the above look ok, or should there be a generic
early_serial8250x32_setup() somewhere?

Cheers
Jon

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

[Arnd Bergmann]

On Thursday 07 January 2016 13:19:44 Jon Hunter wrote:
> 
> Adding Arnd.
> 
> Hmmm ... well apparently stdout-path does not work for tegra and in
> order to make this work I had to do the following ...
> 
> 
> [PATCH] serial: 8250: of: Add earlycon support for Tegra
> 
> Currently, early console support only works for Tegra when the serial
> port information is passed via the earlycon boot parameter. If the
> serial port information is specified via device-tree using the
> "stdout-path" then the early console does not work because:
> 
> 1. The tegra serial ports compatibility parameter does not match any
>    of the supported serial drivers for early console.
> 2. The of_setup_earlycon() function assumes that serial port registers
>    are byte aligned and for tegra they are 32-bit aligned.
> 
> Add an early console setup function for tegra so that the early console
> can be specified via the device-tree "stdout-path" variable.
> 
> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>  drivers/tty/serial/8250/8250_of.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
> index 33021c1f7d55..98adf83e83c2 100644
> --- a/drivers/tty/serial/8250/8250_of.c
> +++ b/drivers/tty/serial/8250/8250_of.c
> @@ -44,6 +44,16 @@ void tegra_serial_handle_break(struct uart_port *p)
>                 udelay(1);
>         } while (1);
>  }
> +
> +int __init tegra_earlycon_setup(struct earlycon_device *device,
> +                               const char *options)
> +{
> +       device->port.iotype = UPIO_MEM32;
> +       device->port.regshift = 2;
> +
> +       return early_serial8250_setup(device, options);
> +}
> +OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart", tegra_earlycon_setup);
>  #else
>  static inline void tegra_serial_handle_break(struct uart_port *port)
>  {
> 
> 
> Arnd, does the above look ok, or should there be a generic
> early_serial8250x32_setup() somewhere?

I think it would be better to put it into 8250_early.c rather than 
8250_of.c, as there are already some other definitions in there,
and the #ifdef CONFIG_TEGRA in 8250_of.c is for some other workaround.

Would it be possible to handle the "reg-io-width" parsing in
early_serial8250_setup instead of keying it off the string?

	Arnd

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

[Jon Hunter]

On 07/01/16 14:11, Arnd Bergmann wrote:
> On Thursday 07 January 2016 13:19:44 Jon Hunter wrote:
>>
>> Adding Arnd.
>>
>> Hmmm ... well apparently stdout-path does not work for tegra and in
>> order to make this work I had to do the following ...
>>
>>
>> [PATCH] serial: 8250: of: Add earlycon support for Tegra
>>
>> Currently, early console support only works for Tegra when the serial
>> port information is passed via the earlycon boot parameter. If the
>> serial port information is specified via device-tree using the
>> "stdout-path" then the early console does not work because:
>>
>> 1. The tegra serial ports compatibility parameter does not match any
>>    of the supported serial drivers for early console.
>> 2. The of_setup_earlycon() function assumes that serial port registers
>>    are byte aligned and for tegra they are 32-bit aligned.
>>
>> Add an early console setup function for tegra so that the early console
>> can be specified via the device-tree "stdout-path" variable.
>>
>> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>  drivers/tty/serial/8250/8250_of.c | 10 ++++++++++
>>  1 file changed, 10 insertions(+)
>>
>> diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
>> index 33021c1f7d55..98adf83e83c2 100644
>> --- a/drivers/tty/serial/8250/8250_of.c
>> +++ b/drivers/tty/serial/8250/8250_of.c
>> @@ -44,6 +44,16 @@ void tegra_serial_handle_break(struct uart_port *p)
>>                 udelay(1);
>>         } while (1);
>>  }
>> +
>> +int __init tegra_earlycon_setup(struct earlycon_device *device,
>> +                               const char *options)
>> +{
>> +       device->port.iotype = UPIO_MEM32;
>> +       device->port.regshift = 2;
>> +
>> +       return early_serial8250_setup(device, options);
>> +}
>> +OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart", tegra_earlycon_setup);
>>  #else
>>  static inline void tegra_serial_handle_break(struct uart_port *port)
>>  {
>>
>>
>> Arnd, does the above look ok, or should there be a generic
>> early_serial8250x32_setup() somewhere?
> 
> I think it would be better to put it into 8250_early.c rather than 
> 8250_of.c, as there are already some other definitions in there,
> and the #ifdef CONFIG_TEGRA in 8250_of.c is for some other workaround.

Ok so something like this ...

diff --git a/drivers/tty/serial/8250/8250_early.c
b/drivers/tty/serial/8250/8250_early.c
index af62131af21e..4ce6e2b57534 100644
--- a/drivers/tty/serial/8250/8250_early.c
+++ b/drivers/tty/serial/8250/8250_early.c
@@ -141,7 +141,18 @@ int __init early_serial8250_setup(struct
earlycon_device *device,
        device->con->write = early_serial8250_write;
        return 0;
 }
+
+int __init early_serial8250_mem32_setup(struct earlycon_device *device,
+                                       const char *options)
+{
+       device->port.iotype = UPIO_MEM32;
+       device->port.regshift = 2;
+
+       return early_serial8250_setup(device, options);
+}
 EARLYCON_DECLARE(uart8250, early_serial8250_setup);
 EARLYCON_DECLARE(uart, early_serial8250_setup);
 OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
 OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
+OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart",
+                   early_serial8250_mem32_setup);

> Would it be possible to handle the "reg-io-width" parsing in
> early_serial8250_setup instead of keying it off the string?

Good point. I spent a bit of time looking at this, but I cannot see an
easy way to do this unless we check for "reg-io-width" and "reg-shift"
in early_init_dt_scan_chosen_serial() and pass to of_setup_earlycon(),
however, I am guessing that this would not be ideal as this would happen
for non-8250 devices. May be that would be ok, but I am not sure.

Cheers
Jon

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

[Rob Herring]

On Thu, Jan 7, 2016 at 10:53 AM, Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
>
> On 07/01/16 14:11, Arnd Bergmann wrote:
>> On Thursday 07 January 2016 13:19:44 Jon Hunter wrote:

[...]

> Ok so something like this ...
>
> diff --git a/drivers/tty/serial/8250/8250_early.c
> b/drivers/tty/serial/8250/8250_early.c
> index af62131af21e..4ce6e2b57534 100644
> --- a/drivers/tty/serial/8250/8250_early.c
> +++ b/drivers/tty/serial/8250/8250_early.c
> @@ -141,7 +141,18 @@ int __init early_serial8250_setup(struct
> earlycon_device *device,
>         device->con->write = early_serial8250_write;
>         return 0;
>  }
> +
> +int __init early_serial8250_mem32_setup(struct earlycon_device *device,
> +                                       const char *options)
> +{
> +       device->port.iotype = UPIO_MEM32;
> +       device->port.regshift = 2;
> +
> +       return early_serial8250_setup(device, options);
> +}
>  EARLYCON_DECLARE(uart8250, early_serial8250_setup);
>  EARLYCON_DECLARE(uart, early_serial8250_setup);
>  OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
>  OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
> +OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart",
> +                   early_serial8250_mem32_setup);
>
>> Would it be possible to handle the "reg-io-width" parsing in
>> early_serial8250_setup instead of keying it off the string?
>
> Good point. I spent a bit of time looking at this, but I cannot see an
> easy way to do this unless we check for "reg-io-width" and "reg-shift"
> in early_init_dt_scan_chosen_serial() and pass to of_setup_earlycon(),
> however, I am guessing that this would not be ideal as this would happen
> for non-8250 devices. May be that would be ok, but I am not sure.

There's been one attempt[1] already. It had a few issues easily
solved, but I haven't seen a follow-up.

Rob

[1] https://lkml.org/lkml/2015/11/30/513

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

[Jon Hunter]

On 07/01/16 17:20, Rob Herring wrote:
> On Thu, Jan 7, 2016 at 10:53 AM, Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
>>
>> On 07/01/16 14:11, Arnd Bergmann wrote:
>>> On Thursday 07 January 2016 13:19:44 Jon Hunter wrote:
> 
> [...]
> 
>> Ok so something like this ...
>>
>> diff --git a/drivers/tty/serial/8250/8250_early.c
>> b/drivers/tty/serial/8250/8250_early.c
>> index af62131af21e..4ce6e2b57534 100644
>> --- a/drivers/tty/serial/8250/8250_early.c
>> +++ b/drivers/tty/serial/8250/8250_early.c
>> @@ -141,7 +141,18 @@ int __init early_serial8250_setup(struct
>> earlycon_device *device,
>>         device->con->write = early_serial8250_write;
>>         return 0;
>>  }
>> +
>> +int __init early_serial8250_mem32_setup(struct earlycon_device *device,
>> +                                       const char *options)
>> +{
>> +       device->port.iotype = UPIO_MEM32;
>> +       device->port.regshift = 2;
>> +
>> +       return early_serial8250_setup(device, options);
>> +}
>>  EARLYCON_DECLARE(uart8250, early_serial8250_setup);
>>  EARLYCON_DECLARE(uart, early_serial8250_setup);
>>  OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
>>  OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
>> +OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart",
>> +                   early_serial8250_mem32_setup);
>>
>>> Would it be possible to handle the "reg-io-width" parsing in
>>> early_serial8250_setup instead of keying it off the string?
>>
>> Good point. I spent a bit of time looking at this, but I cannot see an
>> easy way to do this unless we check for "reg-io-width" and "reg-shift"
>> in early_init_dt_scan_chosen_serial() and pass to of_setup_earlycon(),
>> however, I am guessing that this would not be ideal as this would happen
>> for non-8250 devices. May be that would be ok, but I am not sure.
> 
> There's been one attempt[1] already. It had a few issues easily
> solved, but I haven't seen a follow-up.

Thanks. Adding Paul.

Paul, are you planning a follow-up to your patch? Otherwise, I am happy
to have crack at it. Don't we also need to read the "reg-shift"?

Cheers
Jon