Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>]

On 2016年03月07日 16:38, Thierry Reding wrote:
> * PGP Signed by an unknown key
> 
> On Mon, Feb 29, 2016 at 05:51:20PM +0800, Wei Ni wrote:
>> The sign bit of temperature readback is bit 0, not bit 1.
>> Change to BIT(0) to fix it.
>>
>> Signed-off-by: Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>  drivers/thermal/tegra_soctherm.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
>> index 74ea5765938b..136975220c92 100644
>> --- a/drivers/thermal/tegra_soctherm.c
>> +++ b/drivers/thermal/tegra_soctherm.c
>> @@ -57,7 +57,7 @@
>>  #define READBACK_VALUE_MASK			0xff00
>>  #define READBACK_VALUE_SHIFT			8
>>  #define READBACK_ADD_HALF			BIT(7)
>> -#define READBACK_NEGATE				BIT(1)
>> +#define READBACK_NEGATE				BIT(0)
> 
> I haven't found this documented anywhere. The register documentation
> indicates that the SOC_THERM_TSENSOR_TEMP1 and SOC_THERM_TSENSOR_TEMP2
> registers are in some kind of "temp readback format", but I can't find
> any specification of that format. Can you point me at the source for
> this information and file an internal bug report so that we can get
> the documentation updated?

Sure, I will do it.
Thanks for your comment.

> 
> Thierry
> 
> * Unknown Key
> * 0x7F3EB3A1
>