[PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Wei Ni]

The sign bit of temperature readback is bit 0, not bit 1.
Change to BIT(0) to fix it.

Signed-off-by: Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/thermal/tegra_soctherm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
index 74ea5765938b..136975220c92 100644
--- a/drivers/thermal/tegra_soctherm.c
+++ b/drivers/thermal/tegra_soctherm.c
@@ -57,7 +57,7 @@
 #define READBACK_VALUE_MASK			0xff00
 #define READBACK_VALUE_SHIFT			8
 #define READBACK_ADD_HALF			BIT(7)
-#define READBACK_NEGATE				BIT(1)
+#define READBACK_NEGATE				BIT(0)
 
 #define FUSE_TSENSOR8_CALIB			0x180
 #define FUSE_SPARE_REALIGNMENT_REG_0		0x1fc
-- 
1.9.1

Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Wei Ni]

Hi, Rui & Thierry & Matt
Could you please take a look on this patch.
It's a bug on the temperature's sign bit, it can't show the negative
temperature, although it will not cause problems for now.

Thanks.
Wei.

On 2016年02月29日 17:51, Wei Ni wrote:
> The sign bit of temperature readback is bit 0, not bit 1.
> Change to BIT(0) to fix it.
> 
> Signed-off-by: Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>  drivers/thermal/tegra_soctherm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
> index 74ea5765938b..136975220c92 100644
> --- a/drivers/thermal/tegra_soctherm.c
> +++ b/drivers/thermal/tegra_soctherm.c
> @@ -57,7 +57,7 @@
>  #define READBACK_VALUE_MASK			0xff00
>  #define READBACK_VALUE_SHIFT			8
>  #define READBACK_ADD_HALF			BIT(7)
> -#define READBACK_NEGATE				BIT(1)
> +#define READBACK_NEGATE				BIT(0)
>  
>  #define FUSE_TSENSOR8_CALIB			0x180
>  #define FUSE_SPARE_REALIGNMENT_REG_0		0x1fc
> 

Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Matt Longnecker]

On 03/01/2016 11:40 PM, Wei Ni wrote:
> >diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
> >index 74ea5765938b..136975220c92 100644
> >--- a/drivers/thermal/tegra_soctherm.c
> >+++ b/drivers/thermal/tegra_soctherm.c
> >@@ -57,7 +57,7 @@
> >  #define READBACK_VALUE_MASK			0xff00
> >  #define READBACK_VALUE_SHIFT			8
> >  #define READBACK_ADD_HALF			BIT(7)
> >-#define READBACK_NEGATE				BIT(1)
> >+#define READBACK_NEGATE				BIT(0)
I confirm that this change is technically correct. It fixes a bug.

Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Wei Ni]

Hi, Rui and Thierry
Could you please take a look at this patch?

Thanks.
Wei.

On 2016年03月03日 08:08, Matt Longnecker wrote:
> 
> 
> On 03/01/2016 11:40 PM, Wei Ni wrote:
>> >diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
>> >index 74ea5765938b..136975220c92 100644
>> >--- a/drivers/thermal/tegra_soctherm.c
>> >+++ b/drivers/thermal/tegra_soctherm.c
>> >@@ -57,7 +57,7 @@
>> >  #define READBACK_VALUE_MASK            0xff00
>> >  #define READBACK_VALUE_SHIFT            8
>> >  #define READBACK_ADD_HALF            BIT(7)
>> >-#define READBACK_NEGATE                BIT(1)
>> >+#define READBACK_NEGATE                BIT(0)
> I confirm that this change is technically correct. It fixes a bug.

Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Thierry Reding]

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On Wed, Mar 02, 2016 at 04:08:33PM -0800, Matt Longnecker wrote:
> 
> 
> On 03/01/2016 11:40 PM, Wei Ni wrote:
> >>diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
> >>index 74ea5765938b..136975220c92 100644
> >>--- a/drivers/thermal/tegra_soctherm.c
> >>+++ b/drivers/thermal/tegra_soctherm.c
> >>@@ -57,7 +57,7 @@
> >>  #define READBACK_VALUE_MASK			0xff00
> >>  #define READBACK_VALUE_SHIFT			8
> >>  #define READBACK_ADD_HALF			BIT(7)
> >>-#define READBACK_NEGATE				BIT(1)
> >>+#define READBACK_NEGATE				BIT(0)
> I confirm that this change is technically correct. It fixes a bug.

That usually translates to a Reviewed-by: tag. =)

Thierry

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Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Thierry Reding]

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On Mon, Feb 29, 2016 at 05:51:20PM +0800, Wei Ni wrote:
> The sign bit of temperature readback is bit 0, not bit 1.
> Change to BIT(0) to fix it.
> 
> Signed-off-by: Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>  drivers/thermal/tegra_soctherm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
> index 74ea5765938b..136975220c92 100644
> --- a/drivers/thermal/tegra_soctherm.c
> +++ b/drivers/thermal/tegra_soctherm.c
> @@ -57,7 +57,7 @@
>  #define READBACK_VALUE_MASK			0xff00
>  #define READBACK_VALUE_SHIFT			8
>  #define READBACK_ADD_HALF			BIT(7)
> -#define READBACK_NEGATE				BIT(1)
> +#define READBACK_NEGATE				BIT(0)

I haven't found this documented anywhere. The register documentation
indicates that the SOC_THERM_TSENSOR_TEMP1 and SOC_THERM_TSENSOR_TEMP2
registers are in some kind of "temp readback format", but I can't find
any specification of that format. Can you point me at the source for
this information and file an internal bug report so that we can get
the documentation updated?

Thierry

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Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Wei Ni]

On 2016年03月07日 16:38, Thierry Reding wrote:
> * PGP Signed by an unknown key
> 
> On Mon, Feb 29, 2016 at 05:51:20PM +0800, Wei Ni wrote:
>> The sign bit of temperature readback is bit 0, not bit 1.
>> Change to BIT(0) to fix it.
>>
>> Signed-off-by: Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>  drivers/thermal/tegra_soctherm.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
>> index 74ea5765938b..136975220c92 100644
>> --- a/drivers/thermal/tegra_soctherm.c
>> +++ b/drivers/thermal/tegra_soctherm.c
>> @@ -57,7 +57,7 @@
>>  #define READBACK_VALUE_MASK			0xff00
>>  #define READBACK_VALUE_SHIFT			8
>>  #define READBACK_ADD_HALF			BIT(7)
>> -#define READBACK_NEGATE				BIT(1)
>> +#define READBACK_NEGATE				BIT(0)
> 
> I haven't found this documented anywhere. The register documentation
> indicates that the SOC_THERM_TSENSOR_TEMP1 and SOC_THERM_TSENSOR_TEMP2
> registers are in some kind of "temp readback format", but I can't find
> any specification of that format. Can you point me at the source for
> this information and file an internal bug report so that we can get
> the documentation updated?

Sure, I will do it.
Thanks for your comment.

> 
> Thierry
> 
> * Unknown Key
> * 0x7F3EB3A1
> 

RE: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Zhang, Rui]

For the soc thermal driver changes, you'd better cc Eduardo at the same time so that he can include this in his soc-thermal pull request.
Surely I can queue this for 4.6 if Eduardo miss this.

Thanks,
rui

> -----Original Message-----
> From: Wei Ni [mailto:wni@nvidia.com]
> Sent: Monday, March 07, 2016 4:26 PM
> To: thierry.reding@gmail.com; Zhang, Rui <rui.zhang@intel.com>;
> mikko.perttunen@kapsi.fi
> Cc: Matt Longnecker <mlongnecker@nvidia.com>; swarren@wwwdotorg.org;
> linux-tegra@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature
> Importance: High
> 
> Hi, Rui and Thierry
> Could you please take a look at this patch?
> 
> Thanks.
> Wei.
> 
> On 2016年03月03日 08:08, Matt Longnecker wrote:
> >
> >
> > On 03/01/2016 11:40 PM, Wei Ni wrote:
> >> >diff --git a/drivers/thermal/tegra_soctherm.c
> b/drivers/thermal/tegra_soctherm.c
> >> >index 74ea5765938b..136975220c92 100644
> >> >--- a/drivers/thermal/tegra_soctherm.c
> >> >+++ b/drivers/thermal/tegra_soctherm.c
> >> >@@ -57,7 +57,7 @@
> >> >  #define READBACK_VALUE_MASK            0xff00
> >> >  #define READBACK_VALUE_SHIFT            8
> >> >  #define READBACK_ADD_HALF            BIT(7)
> >> >-#define READBACK_NEGATE                BIT(1)
> >> >+#define READBACK_NEGATE                BIT(0)
> > I confirm that this change is technically correct. It fixes a bug.

Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Wei Ni]

On 2016年03月07日 16:55, Zhang, Rui wrote:
> For the soc thermal driver changes, you'd better cc Eduardo at the same time so that he can include this in his soc-thermal pull request.
> Surely I can queue this for 4.6 if Eduardo miss this.

Thanks for your help.

BTW, please add:
Reviewed-by: Matt Longnecker <mlongnecker-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Or I need to send v2 patch to add it?

Thanks.
Wei.

> 
> Thanks,
> rui
> 
>> -----Original Message-----
>> From: Wei Ni [mailto:wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org]
>> Sent: Monday, March 07, 2016 4:26 PM
>> To: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org; Zhang, Rui <rui.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>;
>> mikko.perttunen-/1wQRMveznE@public.gmane.org
>> Cc: Matt Longnecker <mlongnecker-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>; swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org;
>> linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> Subject: Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature
>> Importance: High
>>
>> Hi, Rui and Thierry
>> Could you please take a look at this patch?
>>
>> Thanks.
>> Wei.
>>
>> On 2016年03月03日 08:08, Matt Longnecker wrote:
>>>
>>>
>>> On 03/01/2016 11:40 PM, Wei Ni wrote:
>>>>> diff --git a/drivers/thermal/tegra_soctherm.c
>> b/drivers/thermal/tegra_soctherm.c
>>>>> index 74ea5765938b..136975220c92 100644
>>>>> --- a/drivers/thermal/tegra_soctherm.c
>>>>> +++ b/drivers/thermal/tegra_soctherm.c
>>>>> @@ -57,7 +57,7 @@
>>>>>  #define READBACK_VALUE_MASK            0xff00
>>>>>  #define READBACK_VALUE_SHIFT            8
>>>>>  #define READBACK_ADD_HALF            BIT(7)
>>>>> -#define READBACK_NEGATE                BIT(1)
>>>>> +#define READBACK_NEGATE                BIT(0)
>>> I confirm that this change is technically correct. It fixes a bug.

RE: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature

[Zhang, Rui]

Oh, BTW, you need to CC linux-pm@vger.kernel.org as well, so that we can see your patch via patchwork.

Please resend patch V2 to linux-pm@vger.kernel.org.

Thanks,
rui

> -----Original Message-----
> From: Wei Ni [mailto:wni@nvidia.com]
> Sent: Monday, March 07, 2016 5:16 PM
> To: Zhang, Rui <rui.zhang@intel.com>; thierry.reding@gmail.com;
> mikko.perttunen@kapsi.fi; Eduardo Valentin <edubezval@gmail.com>
> Cc: Matt Longnecker <mlongnecker@nvidia.com>; swarren@wwwdotorg.org;
> linux-tegra@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature
> Importance: High
> 
> 
> 
> On 2016年03月07日 16:55, Zhang, Rui wrote:
> > For the soc thermal driver changes, you'd better cc Eduardo at the same
> time so that he can include this in his soc-thermal pull request.
> > Surely I can queue this for 4.6 if Eduardo miss this.
> 
> Thanks for your help.
> 
> BTW, please add:
> Reviewed-by: Matt Longnecker <mlongnecker@nvidia.com>
> 
> Or I need to send v2 patch to add it?
> 
> Thanks.
> Wei.
> 
> >
> > Thanks,
> > rui
> >
> >> -----Original Message-----
> >> From: Wei Ni [mailto:wni@nvidia.com]
> >> Sent: Monday, March 07, 2016 4:26 PM
> >> To: thierry.reding@gmail.com; Zhang, Rui <rui.zhang@intel.com>;
> >> mikko.perttunen@kapsi.fi
> >> Cc: Matt Longnecker <mlongnecker@nvidia.com>;
> swarren@wwwdotorg.org;
> >> linux-tegra@vger.kernel.org; linux-kernel@vger.kernel.org
> >> Subject: Re: [PATCH] thermal: tegra_soctherm: fix sign bit of
> >> temperature
> >> Importance: High
> >>
> >> Hi, Rui and Thierry
> >> Could you please take a look at this patch?
> >>
> >> Thanks.
> >> Wei.
> >>
> >> On 2016年03月03日 08:08, Matt Longnecker wrote:
> >>>
> >>>
> >>> On 03/01/2016 11:40 PM, Wei Ni wrote:
> >>>>> diff --git a/drivers/thermal/tegra_soctherm.c
> >> b/drivers/thermal/tegra_soctherm.c
> >>>>> index 74ea5765938b..136975220c92 100644
> >>>>> --- a/drivers/thermal/tegra_soctherm.c
> >>>>> +++ b/drivers/thermal/tegra_soctherm.c
> >>>>> @@ -57,7 +57,7 @@
> >>>>>  #define READBACK_VALUE_MASK            0xff00
> >>>>>  #define READBACK_VALUE_SHIFT            8
> >>>>>  #define READBACK_ADD_HALF            BIT(7)
> >>>>> -#define READBACK_NEGATE                BIT(1)
> >>>>> +#define READBACK_NEGATE                BIT(0)
> >>> I confirm that this change is technically correct. It fixes a bug.