* [pinmux scripts PATCH] Add the Tegra210-smaug board
@ 2016-04-06 21:33 Rhyland Klein
[not found] ` <1459978380-8574-1-git-send-email-rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Rhyland Klein @ 2016-04-06 21:33 UTC (permalink / raw)
To: linux-tegra-u79uwXL29TY76Z2rM5mHXA; +Cc: Rhyland Klein
Tegra210-smaug is the name for the Google Pixel C platform.
Signed-off-by: Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
configs/tegra210-smaug.board | 173 +++++++++++++++++++++++++++++++++++++++++++
csv-to-board.py | 6 ++
2 files changed, 179 insertions(+)
create mode 100644 configs/tegra210-smaug.board
diff --git a/configs/tegra210-smaug.board b/configs/tegra210-smaug.board
new file mode 100644
index 000000000000..5570c789dad2
--- /dev/null
+++ b/configs/tegra210-smaug.board
@@ -0,0 +1,173 @@
+soc = 'tegra210'
+
+pins = (
+ #pin, mux, gpio_init, pull, tri, e_inp, od, e_io_hv
+ ('aud_mclk_pbb0', 'aud', None, 'none', False, False, False, False),
+ ('dvfs_pwm_pbb1', 'rsvd0', None, 'down', True, False, False, False),
+ ('dvfs_clk_pbb2', 'rsvd0', None, 'down', True, False, False, False),
+ ('gpio_x1_aud_pbb3', None, 'out0', 'none', False, False, False, False),
+ ('gpio_x3_aud_pbb4', None, 'in', 'up', False, True, False, False),
+ ('dap1_din_pb1', 'i2s1', None, 'none', False, True, False, False),
+ ('dap1_dout_pb2', 'i2s1', None, 'none', False, False, False, False),
+ ('dap1_fs_pb0', 'i2s1', None, 'none', False, False, False, False),
+ ('dap1_sclk_pb3', 'i2s1', None, 'none', False, False, False, False),
+ ('spi2_mosi_pb4', None, 'in', 'up', False, True, False, False),
+ ('spi2_miso_pb5', 'rsvd2', None, 'down', True, False, False, False),
+ ('spi2_sck_pb6', 'rsvd2', None, 'down', True, False, False, False),
+ ('spi2_cs0_pb7', 'rsvd2', None, 'down', True, False, False, False),
+ ('spi2_cs1_pdd0', 'rsvd1', None, 'down', True, False, False, False),
+ ('dmic1_clk_pe0', None, 'in', 'none', False, True, False, False),
+ ('dmic1_dat_pe1', None, 'out0', 'none', False, False, False, False),
+ ('dmic2_clk_pe2', None, 'in', 'none', False, True, False, False),
+ ('dmic2_dat_pe3', None, 'in', 'up', False, True, False, False),
+ ('dmic3_clk_pe4', None, 'in', 'none', False, True, False, False),
+ ('dmic3_dat_pe5', 'rsvd2', None, 'down', True, False, False, False),
+ ('pe6', None, 'in', 'up', False, True, False, False),
+ ('pe7', None, 'in', 'up', False, True, False, False),
+ ('gen3_i2c_scl_pf0', 'i2c3', None, 'none', False, True, False, False),
+ ('gen3_i2c_sda_pf1', 'i2c3', None, 'none', False, True, False, False),
+ ('cam_i2c_scl_ps2', 'i2cvi', None, 'none', False, True, False, False),
+ ('cam_i2c_sda_ps3', 'i2cvi', None, 'none', False, True, False, False),
+ ('cam1_mclk_ps0', 'extperiph3', None, 'none', False, False, False, False),
+ ('cam2_mclk_ps1', 'extperiph3', None, 'none', False, False, False, False),
+ ('cam_rst_ps4', 'rsvd1', None, 'down', True, False, False, False),
+ ('cam_af_en_ps5', None, 'out0', 'none', False, False, False, False),
+ ('cam_flash_en_ps6', 'rsvd2', None, 'down', True, False, False, False),
+ ('cam1_pwdn_ps7', None, 'out0', 'none', False, False, False, False),
+ ('cam2_pwdn_pt0', None, 'out0', 'none', False, False, False, False),
+ ('cam1_strobe_pt1', 'rsvd1', None, 'down', True, False, False, False),
+ ('pex_l0_clkreq_n_pa1', 'rsvd1', None, 'down', True, False, False, False),
+ ('pex_l0_rst_n_pa0', 'rsvd1', None, 'down', True, False, False, False),
+ ('pex_l1_clkreq_n_pa4', 'rsvd1', None, 'down', True, False, False, False),
+ ('pex_l1_rst_n_pa3', 'rsvd1', None, 'down', True, False, False, False),
+ ('pex_wake_n_pa2', 'rsvd1', None, 'down', True, False, False, False),
+ ('sata_led_active_pa5', 'rsvd1', None, 'down', True, False, False, False),
+ ('pa6', 'rsvd1', None, 'down', True, False, False, False),
+ ('sdmmc1_clk_pm0', 'rsvd1', None, 'down', True, False, False, False),
+ ('sdmmc1_cmd_pm1', 'rsvd2', None, 'down', True, False, False, False),
+ ('sdmmc1_dat0_pm5', None, 'out1', 'none', False, False, False, False),
+ ('sdmmc1_dat1_pm4', None, 'in', 'none', False, True, False, False),
+ ('sdmmc1_dat2_pm3', 'rsvd2', None, 'down', True, False, False, False),
+ ('sdmmc1_dat3_pm2', 'rsvd2', None, 'down', True, False, False, False),
+ ('sdmmc3_clk_pp0', 'rsvd1', None, 'down', True, False, False, False),
+ ('sdmmc3_cmd_pp1', 'rsvd1', None, 'down', True, False, False, False),
+ ('sdmmc3_dat0_pp5', 'rsvd1', None, 'down', True, False, False, False),
+ ('sdmmc3_dat1_pp4', 'rsvd1', None, 'down', True, False, False, False),
+ ('sdmmc3_dat2_pp3', 'rsvd1', None, 'down', True, False, False, False),
+ ('sdmmc3_dat3_pp2', 'rsvd1', None, 'down', True, False, False, False),
+ ('als_prox_int_px3', 'rsvd0', None, 'down', True, False, False, False),
+ ('temp_alert_px4', None, 'in', 'up', False, True, False, False),
+ ('motion_int_px2', 'rsvd0', None, 'down', True, False, False, False),
+ ('touch_rst_pv6', None, 'out0', 'none', False, False, False, False),
+ ('touch_clk_pv7', 'touch', None, 'none', False, False, False, False),
+ ('touch_int_px1', None, 'in', 'none', False, True, False, False),
+ ('modem_wake_ap_px0', 'rsvd0', None, 'down', True, False, False, False),
+ ('shutdown', 'shutdown', None, 'none', False, False, False, False),
+ ('button_power_on_px5', None, 'in', 'up', False, True, False, False),
+ ('button_vol_up_px6', None, 'in', 'none', False, True, False, False),
+ ('button_vol_down_px7', None, 'in', 'up', False, True, False, False),
+ ('button_slide_sw_py0', None, 'in', 'up', False, True, False, False),
+ ('button_home_py1', None, 'in', 'up', False, True, False, False),
+ ('lcd_te_py2', 'displaya', None, 'none', False, True, False, False),
+ ('lcd_bl_pwm_pv0', 'rsvd3', None, 'down', True, False, False, False),
+ ('lcd_bl_en_pv1', None, 'out0', 'none', False, False, False, False),
+ ('lcd_rst_pv2', None, 'out0', 'none', False, False, False, False),
+ ('lcd_gpio1_pv3', None, 'out0', 'none', False, False, False, False),
+ ('lcd_gpio2_pv4', None, 'out0', 'none', False, False, False, False),
+ ('ap_ready_pv5', 'rsvd0', None, 'down', True, False, False, False),
+ ('pwr_i2c_scl_py3', 'i2cpmu', None, 'none', False, True, False, False),
+ ('pwr_i2c_sda_py4', 'i2cpmu', None, 'none', False, True, False, False),
+ ('clk_32k_in', 'clk', None, 'none', False, True, False, False),
+ ('clk_32k_out_py5', 'soc', None, 'up', False, True, False, False),
+ ('pz0', None, 'in', 'up', False, True, False, False),
+ ('pz1', None, 'in', 'up', False, True, False, False),
+ ('pz2', None, 'in', 'up', False, True, False, False),
+ ('pz3', 'rsvd1', None, 'down', True, False, False, False),
+ ('pz4', 'rsvd1', None, 'down', True, False, False, False),
+ ('pz5', 'soc', None, 'up', False, True, False, False),
+ ('clk_req', 'rsvd1', None, 'down', True, False, False, False),
+ ('core_pwr_req', 'core', None, 'none', False, False, False, False),
+ ('cpu_pwr_req', 'cpu', None, 'none', False, False, False, False),
+ ('pwr_int_n', 'pmi', None, 'up', False, True, False, False),
+ ('dap4_din_pj5', 'rsvd1', None, 'down', True, False, False, False),
+ ('dap4_dout_pj6', 'rsvd1', None, 'down', True, False, False, False),
+ ('dap4_fs_pj4', 'rsvd1', None, 'down', True, False, False, False),
+ ('dap4_sclk_pj7', 'rsvd1', None, 'down', True, False, False, False),
+ ('gen1_i2c_scl_pj1', 'i2c1', None, 'none', False, True, False, False),
+ ('gen1_i2c_sda_pj0', 'i2c1', None, 'none', False, True, False, False),
+ ('gen2_i2c_scl_pj2', 'i2c2', None, 'none', False, True, False, True),
+ ('gen2_i2c_sda_pj3', 'i2c2', None, 'none', False, True, False, True),
+ ('uart2_tx_pg0', 'uartb', None, 'down', True, False, False, False),
+ ('uart2_rx_pg1', 'uartb', None, 'down', True, False, False, False),
+ ('uart2_rts_pg2', 'rsvd2', None, 'down', True, False, False, False),
+ ('uart2_cts_pg3', None, 'out0', 'none', False, False, False, False),
+ ('uart1_tx_pu0', 'uarta', None, 'none', False, False, False, False),
+ ('uart1_rx_pu1', 'uarta', None, 'none', False, True, False, False),
+ ('uart1_rts_pu2', 'rsvd1', None, 'down', True, False, False, False),
+ ('uart1_cts_pu3', 'rsvd1', None, 'down', True, False, False, False),
+ ('jtag_rtck', 'jtag', None, 'up', False, False, False, False),
+ ('pk0', None, 'in', 'none', False, True, False, False),
+ ('pk1', None, 'in', 'none', False, True, False, False),
+ ('pk2', None, 'in', 'none', False, True, False, False),
+ ('pk3', None, 'out0', 'none', False, False, False, False),
+ ('pk4', 'rsvd1', None, 'down', True, False, False, False),
+ ('pk5', 'rsvd1', None, 'down', True, False, False, False),
+ ('pk6', 'rsvd1', None, 'down', True, False, False, False),
+ ('pk7', 'rsvd1', None, 'down', True, False, False, False),
+ ('pl0', 'rsvd0', None, 'down', True, False, False, False),
+ ('pl1', 'rsvd1', None, 'down', True, False, False, False),
+ ('spi1_mosi_pc0', 'spi1', None, 'none', False, False, False, False),
+ ('spi1_miso_pc1', 'spi1', None, 'none', False, True, False, False),
+ ('spi1_sck_pc2', 'spi1', None, 'none', False, False, False, False),
+ ('spi1_cs0_pc3', 'spi1', None, 'none', False, False, False, False),
+ ('spi1_cs1_pc4', 'rsvd1', None, 'down', True, False, False, False),
+ ('spi4_mosi_pc7', 'rsvd1', None, 'down', True, False, False, False),
+ ('spi4_miso_pd0', 'rsvd1', None, 'down', True, False, False, False),
+ ('spi4_sck_pc5', 'rsvd1', None, 'down', True, False, False, False),
+ ('spi4_cs0_pc6', 'rsvd1', None, 'down', True, False, False, False),
+ ('uart3_tx_pd1', 'uartc', None, 'none', False, False, False, False),
+ ('uart3_rx_pd2', 'uartc', None, 'none', False, True, False, False),
+ ('uart3_rts_pd3', 'uartc', None, 'none', False, False, False, False),
+ ('uart3_cts_pd4', 'uartc', None, 'none', False, True, False, False),
+ ('wifi_en_ph0', None, 'out0', 'none', False, False, False, False),
+ ('wifi_rst_ph1', None, 'out0', 'none', False, False, False, False),
+ ('wifi_wake_ap_ph2', None, 'in', 'none', False, True, False, False),
+ ('ap_wake_bt_ph3', None, 'out0', 'none', False, False, False, False),
+ ('bt_rst_ph4', None, 'out0', 'none', False, False, False, False),
+ ('bt_wake_ap_ph5', None, 'in', 'none', False, True, False, False),
+ ('ph6', None, 'in', 'none', False, True, False, False),
+ ('ap_wake_nfc_ph7', 'rsvd0', None, 'down', True, False, False, False),
+ ('nfc_en_pi0', 'rsvd0', None, 'down', True, False, False, False),
+ ('nfc_int_pi1', 'rsvd0', None, 'down', True, False, False, False),
+ ('gps_en_pi2', None, 'out0', 'none', False, False, False, False),
+ ('gps_rst_pi3', 'rsvd0', None, 'down', True, False, False, False),
+ ('uart4_tx_pi4', 'uartd', None, 'none', False, False, False, False),
+ ('uart4_rx_pi5', 'uartd', None, 'none', False, True, False, False),
+ ('uart4_rts_pi6', 'uartd', None, 'none', False, False, False, False),
+ ('uart4_cts_pi7', 'uartd', None, 'none', False, True, False, False),
+ ('qspi_io0_pee2', 'qspi', None, 'none', False, False, False, False),
+ ('qspi_io1_pee3', 'qspi', None, 'none', False, True, False, False),
+ ('qspi_sck_pee0', 'qspi', None, 'none', False, False, False, False),
+ ('qspi_cs_n_pee1', 'qspi', None, 'none', False, False, False, False),
+ ('qspi_io2_pee4', 'rsvd1', None, 'down', True, False, False, False),
+ ('qspi_io3_pee5', 'rsvd1', None, 'down', True, False, False, False),
+ ('dap2_din_paa2', 'i2s2', None, 'none', False, True, False, False),
+ ('dap2_dout_paa3', 'i2s2', None, 'none', False, False, False, False),
+ ('dap2_fs_paa0', 'i2s2', None, 'none', False, False, False, False),
+ ('dap2_sclk_paa1', 'i2s2', None, 'none', False, False, False, False),
+ ('pcc7', None, 'in', 'none', False, True, False, False),
+ ('spdif_out_pcc2', 'rsvd1', None, 'down', True, False, False, False),
+ ('spdif_in_pcc3', 'rsvd1', None, 'down', True, False, False, False),
+ ('usb_vbus_en0_pcc4', 'rsvd1', None, 'down', True, False, False, False),
+ ('usb_vbus_en1_pcc5', 'rsvd1', None, 'down', True, False, False, False),
+ ('dp_hpd0_pcc6', None, 'in', 'none', False, True, False, False),
+ ('hdmi_int_dp_hpd_pcc1', None, 'in', 'none', False, True, False, False),
+ ('hdmi_cec_pcc0', 'rsvd1', None, 'down', True, False, False, False),
+)
+
+drive_groups = (
+)
+
+mipi_pad_ctrl_groups = (
+ #pin, mux
+)
diff --git a/csv-to-board.py b/csv-to-board.py
index 85b5d0c3f16c..2de66c527bc8 100755
--- a/csv-to-board.py
+++ b/csv-to-board.py
@@ -82,6 +82,12 @@ supported_boards = {
'rsvd_base': 0,
'soc': 'tegra210',
},
+ 'tegra210-smaug': {
+ # erista_customer_pinmux_v04_0420.xlsm
+ 'filename': 'csv/tegra210-smaug-v04_0420.csv',
+ 'rsvd_base': 0,
+ 'soc': 'tegra210',
+ },
'venice2': {
# Venice2_T124_customer_pinmux_based_on_P4_rev47_2013-07-12.xlsm worksheet Customer_Configuration (0-based rsvd)
'filename': 'nv-internal-data/Venice2_T124_customer_pinmux_based_on_P4_rev47_2013-07-12.csv',
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [pinmux scripts PATCH] Add the Tegra210-smaug board
[not found] ` <1459978380-8574-1-git-send-email-rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
@ 2016-04-07 20:30 ` Stephen Warren
[not found] ` <5706C36E.6090305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-04-07 20:50 ` Stephen Warren
1 sibling, 1 reply; 6+ messages in thread
From: Stephen Warren @ 2016-04-07 20:30 UTC (permalink / raw)
To: Rhyland Klein; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 04/06/2016 03:33 PM, Rhyland Klein wrote:
> Tegra210-smaug is the name for the Google Pixel C platform.
I assume tegra210-smaug.dts is the DT filename that will appear in the
mainline kernel, and the board name that will appear in U-Boot if U-Boot
gets ported? In the past there have been disconnects between what Google
wanted to call boards and what NVIDIA called boards. I'd like to avoid
applying this and having to renaming everything later, if possible.
Does this table content match the production SW stack, and our Excel
pinmux spreadsheet?
If so, I'll apply this.
If not, it would be good to at least document what the differences are,
and hopefully track down why they exist and get our spreadsheet updated
to match the production SW or vice-versa.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [pinmux scripts PATCH] Add the Tegra210-smaug board
[not found] ` <5706C36E.6090305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
@ 2016-04-07 20:35 ` Rhyland Klein
[not found] ` <5706C4AB.4000108-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Rhyland Klein @ 2016-04-07 20:35 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 4/7/2016 4:30 PM, Stephen Warren wrote:
> On 04/06/2016 03:33 PM, Rhyland Klein wrote:
>> Tegra210-smaug is the name for the Google Pixel C platform.
>
> I assume tegra210-smaug.dts is the DT filename that will appear in the
> mainline kernel, and the board name that will appear in U-Boot if U-Boot
> gets ported? In the past there have been disconnects between what Google
> wanted to call boards and what NVIDIA called boards. I'd like to avoid
> applying this and having to renaming everything later, if possible.
Tegra210-smaug is the chosen kernel dt name for this board. That was
approved by Google before posting to the kernel. I believe therefore
that we should be fine to expect that name to be consistent between
kernel/uboot/etc.
>
> Does this table content match the production SW stack, and our Excel
> pinmux spreadsheet?
Right now this matches the production SW stack. It has some variances
with the latest Excel pinmux spreadsheets, and I am working on trying to
verify that these are correct vs those, or vice-versa.
>
> If so, I'll apply this.
>
> If not, it would be good to at least document what the differences are,
> and hopefully track down why they exist and get our spreadsheet updated
> to match the production SW or vice-versa.
Already working on tracking down differences with the spreadsheets and
making sure we have the most correct version we have (and that
appropriate spreadsheets get updated to reflect these settings).
I'll post a v2 when I can get a final answer with either changes
required or notes describing the differences.
-rhyland
--
nvpublic
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [pinmux scripts PATCH] Add the Tegra210-smaug board
[not found] ` <5706C4AB.4000108-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
@ 2016-04-07 20:45 ` Stephen Warren
[not found] ` <5706C6D4.8010007-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Stephen Warren @ 2016-04-07 20:45 UTC (permalink / raw)
To: Rhyland Klein; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 04/07/2016 02:35 PM, Rhyland Klein wrote:
> On 4/7/2016 4:30 PM, Stephen Warren wrote:
>> On 04/06/2016 03:33 PM, Rhyland Klein wrote:
>>> Tegra210-smaug is the name for the Google Pixel C platform.
>>
>> I assume tegra210-smaug.dts is the DT filename that will appear in the
>> mainline kernel, and the board name that will appear in U-Boot if U-Boot
>> gets ported? In the past there have been disconnects between what Google
>> wanted to call boards and what NVIDIA called boards. I'd like to avoid
>> applying this and having to renaming everything later, if possible.
>
> Tegra210-smaug is the chosen kernel dt name for this board. That was
> approved by Google before posting to the kernel. I believe therefore
> that we should be fine to expect that name to be consistent between
> kernel/uboot/etc.
Great:-)
>> Does this table content match the production SW stack, and our Excel
>> pinmux spreadsheet?
>
> Right now this matches the production SW stack. It has some variances
> with the latest Excel pinmux spreadsheets, and I am working on trying to
> verify that these are correct vs those, or vice-versa.
OK, if it matches the existing SW, that's probably good enough to just
apply this. Do you want me to wait for V2, or just go ahead and apply it
now? I imagine it might take a while to track down the differences, and
the production SW works, so the configuration it's using obviously at
least works even if it isn't perfect...
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [pinmux scripts PATCH] Add the Tegra210-smaug board
[not found] ` <5706C6D4.8010007-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
@ 2016-04-07 20:47 ` Rhyland Klein
0 siblings, 0 replies; 6+ messages in thread
From: Rhyland Klein @ 2016-04-07 20:47 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 4/7/2016 4:45 PM, Stephen Warren wrote:
> On 04/07/2016 02:35 PM, Rhyland Klein wrote:
>> On 4/7/2016 4:30 PM, Stephen Warren wrote:
>>> On 04/06/2016 03:33 PM, Rhyland Klein wrote:
>>>> Tegra210-smaug is the name for the Google Pixel C platform.
>>>
>>> I assume tegra210-smaug.dts is the DT filename that will appear in the
>>> mainline kernel, and the board name that will appear in U-Boot if U-Boot
>>> gets ported? In the past there have been disconnects between what Google
>>> wanted to call boards and what NVIDIA called boards. I'd like to avoid
>>> applying this and having to renaming everything later, if possible.
>>
>> Tegra210-smaug is the chosen kernel dt name for this board. That was
>> approved by Google before posting to the kernel. I believe therefore
>> that we should be fine to expect that name to be consistent between
>> kernel/uboot/etc.
>
> Great:-)
>
>>> Does this table content match the production SW stack, and our Excel
>>> pinmux spreadsheet?
>>
>> Right now this matches the production SW stack. It has some variances
>> with the latest Excel pinmux spreadsheets, and I am working on trying to
>> verify that these are correct vs those, or vice-versa.
>
> OK, if it matches the existing SW, that's probably good enough to just
> apply this. Do you want me to wait for V2, or just go ahead and apply it
> now? I imagine it might take a while to track down the differences, and
> the production SW works, so the configuration it's using obviously at
> least works even if it isn't perfect...
>
I think, based on the fact that it is matching the existing production
values, it should be good. If I eventually turn up differences, they
will likely need to go to both places, so I will be making a patch
anyway. So I say apply it.
-rhyland
--
nvpublic
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [pinmux scripts PATCH] Add the Tegra210-smaug board
[not found] ` <1459978380-8574-1-git-send-email-rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-07 20:30 ` Stephen Warren
@ 2016-04-07 20:50 ` Stephen Warren
1 sibling, 0 replies; 6+ messages in thread
From: Stephen Warren @ 2016-04-07 20:50 UTC (permalink / raw)
To: Rhyland Klein; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 04/06/2016 03:33 PM, Rhyland Klein wrote:
> Tegra210-smaug is the name for the Google Pixel C platform.
Applied.
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2016-04-06 21:33 [pinmux scripts PATCH] Add the Tegra210-smaug board Rhyland Klein
[not found] ` <1459978380-8574-1-git-send-email-rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-07 20:30 ` Stephen Warren
[not found] ` <5706C36E.6090305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-04-07 20:35 ` Rhyland Klein
[not found] ` <5706C4AB.4000108-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-07 20:45 ` Stephen Warren
[not found] ` <5706C6D4.8010007-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-04-07 20:47 ` Rhyland Klein
2016-04-07 20:50 ` Stephen Warren
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