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From: Jon Hunter <jonathanh@nvidia.com>
To: Laxman Dewangan <ldewangan@nvidia.com>,
	thierry.reding@gmail.com, swarren@wwwdotorg.org,
	airlied@linux.ie
Cc: linux-tegra@vger.kernel.org, gnurou@gmail.com,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()
Date: Thu, 5 May 2016 13:43:37 +0100	[thread overview]
Message-ID: <572B3FF9.8080202@nvidia.com> (raw)
In-Reply-To: <572B17DA.901@nvidia.com>


On 05/05/16 10:52, Laxman Dewangan wrote:
> 
> On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
>> On 04/05/16 12:39, Laxman Dewangan wrote:
>>> The function tegra_pmc_readl() returns the u32 type data and hence
>>> change the data type of variable where this data is stored to u32
>>> type.
>>>
>>> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
>>>
>>> ---
>>> Changes from V1:
>>> -This is new in series as per discussion on V1 series to use u32 for
>>> tegra_pmc_readl.
>>>
>>> Changes from V2:
>>> - Make unsigned long to u32 for some missed variable from V1.
>>> ---
>>>   drivers/soc/tegra/pmc.c | 24 ++++++++++++++----------
>>>   1 file changed, 14 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
>>> index 2c3f1f9..eff9425 100644
>>> --- a/drivers/soc/tegra/pmc.c
>>> +++ b/drivers/soc/tegra/pmc.c
>>> @@ -844,7 +844,8 @@ static void tegra_powergate_init(struct tegra_pmc
>>> *pmc)
>>>   static int tegra_io_rail_prepare(unsigned int id, unsigned long
>>> *request,
>>>                    unsigned long *status, unsigned int *bit)
>>>   {
>>> -    unsigned long rate, value;
>>> +    unsigned long rate;
>>> +    u32 value;
>>>         *bit = id % 32;
>>>   @@ -868,17 +869,18 @@ static int tegra_io_rail_prepare(unsigned int
>>> id, unsigned long *request,
>>>       tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
>>>         /* must be at least 200 ns, in APB (PCLK) clock cycles */
>>> -    value = DIV_ROUND_UP(1000000000, rate);
>>> -    value = DIV_ROUND_UP(200, value);
>>> +    rate = DIV_ROUND_UP(1000000000, rate);
>>> +    rate = DIV_ROUND_UP(200, rate);
>>> +    value = (u32)rate;
>> Although it is unlikely, I think that we should check it is less
>> than U32_MAX, return an error if it is not.
> 
> rate = DIV_ROUNC_UP(200, rate) means
> 
> rate = (200 + rate -1)/rate
> 
> and can not be more than 200 in any case (if rate =1).
> So no need of the error check.

OK, yes you are right. In that case there is no need to cast and so I
would leave this code as-is and not change the type.

Jon




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  reply	other threads:[~2016-05-05 12:43 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-04 11:39 [PATCH V3 0/4] soc/tegra: Add support for IO pads power and voltage control Laxman Dewangan
2016-05-04 11:39 ` [PATCH V3 1/4] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan
2016-05-04 11:39 ` [PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() Laxman Dewangan
2016-05-05  9:49   ` Jon Hunter
     [not found]     ` <572B173D.6030108-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05  9:52       ` Laxman Dewangan
2016-05-05 12:43         ` Jon Hunter [this message]
     [not found]           ` <572B3FF9.8080202-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 12:35             ` Laxman Dewangan
     [not found]               ` <572B3DFB.3070604-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 12:48                 ` Jon Hunter
2016-05-04 11:39 ` [PATCH V3 3/4] soc/tegra: pmc: Add support for IO pads power state and voltage Laxman Dewangan
     [not found]   ` <1462361973-27990-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 10:13     ` Jon Hunter
     [not found]       ` <572B1CCA.5060502-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 10:32         ` Laxman Dewangan
     [not found]           ` <572B2122.2080609-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 13:08             ` Jon Hunter
     [not found]               ` <572B45C6.5090605-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 13:09                 ` Laxman Dewangan
     [not found]                   ` <572B45FE.40801-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 13:33                     ` Jon Hunter
     [not found]                       ` <572B4BAC.4070104-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 13:35                         ` Laxman Dewangan
2016-05-05 13:50                           ` Jon Hunter
2016-05-04 11:39 ` [PATCH V3 4/4] soc/tegra: pmc: Register PMC child devices as platform device Laxman Dewangan
     [not found]   ` <1462361973-27990-5-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 10:15     ` Jon Hunter

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