From: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Laxman Dewangan
<ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
airlied-cv59FeDIM0c@public.gmane.org,
swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org,
gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage
Date: Wed, 11 May 2016 16:35:26 +0100 [thread overview]
Message-ID: <5733513E.9080606@nvidia.com> (raw)
In-Reply-To: <57333366.2040500-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 11/05/16 14:28, Laxman Dewangan wrote:
> On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote:
>> On 06/05/16 16:32, Laxman Dewangan wrote:
>>> On Friday 06 May 2016 08:07 PM, Jon Hunter wrote:
>>>> On 06/05/16 11:45, Laxman Dewangan wrote:
>>>> +
>>>> + /* Last entry */
>>>> + TEGRA_IO_PAD_MAX,
>>>> Nit should these be TEGRA_IO_PADS_xxx?
>>> Because this was name of single pad and hence I said TEGRA_IO_PAD_XXX.
>> Aren't these used to set the voltage level and power state for the
>> entire group of IOs? Confused :-(
>
> One IO pad can have multiple IO pins.
> IO Pad control the power state and voltage of all pins belongs to that
> IO pad.
Ugh ... I remember for xusb there was something similar we the Tegra
docs used pad to imply multiple. However, in general pad == pin == ball
or at least should.
> Now what should we say PADS or PAD here? TEGRA_IO_PAD_UART or
> TEGRA_IO_PADS_UART?
Personally, I think pads and that is purely because it aligns with the
APIs. I think that the APIs names, tegra_io_pads_xxx() should be
consistent with the enum naming.
>>>>> +};
>>>>> +
>>>>> +/* tegra_io_pads_source_voltage: The voltage level of IO rails which
>>>>> source
>>>>> + * the IO pads.
>>>>> + */
>>>>> +enum tegra_io_pads_source_voltage {
>>>>> + TEGRA_IO_PADS_SOURCE_VOLTAGE_1800000UV,
>>>>> + TEGRA_IO_PADS_SOURCE_VOLTAGE_3300000UV,
>>>>> +};
>>>> Nit I wonder if we can make this shorter ...
>>>>
>>>> enum tegra_io_pads_vconf {
>>>> TEGRA_IO_PADS_VCONF_1V8,
>>>> TEGRA_IO_PADS_VCONF_3V3,
>>> This looks good but for voltage and current, unit is used uV/uV across
>>> the system. So wanted to have same unit.
>> Now it is an enum does it matter? Or maybe just have ...
>>
>> enum tegra_io_pads_vconf {
>> TEGRA_IO_PADS_1800000UV,
>> TEGRA_IO_PADS_3300000UV,
>> };
>>
>
> OK, TEGRA_IO_PADS_VCONF_1800000UV and TEGRA_IO_PADS_VCONF_3300000UV.
> Fine?
Fine :-)
Jon
next prev parent reply other threads:[~2016-05-11 15:35 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-06 10:45 [PATCH V4 0/3] soc/tegra: Add support for IO pads power and voltage control Laxman Dewangan
2016-05-06 10:45 ` [PATCH V4 1/3] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan
2016-05-06 14:12 ` Jon Hunter
2016-05-06 10:45 ` [PATCH V4 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() Laxman Dewangan
[not found] ` <1462531548-12914-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-06 14:15 ` Jon Hunter
2016-05-06 10:45 ` [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage Laxman Dewangan
2016-05-06 14:37 ` Jon Hunter
[not found] ` <572CAC20.9030307-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-06 15:32 ` Laxman Dewangan
2016-05-08 12:13 ` Jon Hunter
[not found] ` <572F2D84.3060505-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-11 13:28 ` Laxman Dewangan
[not found] ` <57333366.2040500-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-11 15:35 ` Jon Hunter [this message]
[not found] ` <5733513E.9080606-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-11 17:22 ` Laxman Dewangan
2016-05-11 19:59 ` Jon Hunter
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