From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jon Hunter Subject: Re: [PATCH v8 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage Date: Tue, 30 Jun 2020 20:03:04 +0100 Message-ID: <64ffa84f-a8cf-ae81-6306-b5d8b1ff0618@nvidia.com> References: <20200630001051.12350-1-vdumpa@nvidia.com> <20200630001051.12350-2-vdumpa@nvidia.com> <4037efc7-fbed-e8cf-dac7-212c65014e4e@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-US Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Krishna Reddy Cc: "joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org" , "will-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" , "robin.murphy-5wv7dgnIgG8@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Thierry Reding , Yu-Huan Hsu , Sachin Nikam , Pritesh Raithatha , Timo Alho , Bitan Biswas , Mikko Perttunen , Nicolin Chen , Bryan Huntsman , "nicoleotsuka-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org" List-Id: linux-tegra@vger.kernel.org On 30/06/2020 18:16, Krishna Reddy wrote: >> OK, well I see what you are saying, but if we intended to support all 3 for Tegra194, then we should ensure all 3 are initialised correctly. > > The driver intend to support up to 3 instances. It doesn't really mandate that all three instances be present in same DT node. > Each mmio aperture in "reg" property is an instance here. reg = , , ; > The reg can have all three or less and driver just configures based on reg and it works fine. So it sounds like we need at least 2 SMMUs (for non-iso and iso) but we have up to 3 (for Tegra194). So the question is do we have a use-case where we only use 2 and not 3? If not, then it still seems that we should require that all 3 are present. The other problem I see here is that currently the arm-smmu binding defines the 'reg' with a 'maxItems' of 1, whereas we have 3. I believe that this will get caught by the 'dt_binding_check' when we try to populate the binding. >> It would be better to query the number of SMMUs populated in device-tree and then ensure that all are initialised correctly. > > Getting the IORESOURCE_MEM is the way to count the instances driver need to support. > In a way, It is already querying through IORESOURCE_MEM here. Yes I was wondering that. I think we just need to decide if the 3rd SMMU is optional or not. The DT binding should detail and min and max supported. Jon -- nvpublic