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From: Vidya Sagar <vidyas@nvidia.com>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
	"kwilczynski@kernel.org" <kwilczynski@kernel.org>,
	"mani@kernel.org" <mani@kernel.org>,
	"robh@kernel.org" <robh@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
	Jon Hunter <jonathanh@nvidia.com>,
	"kishon@kernel.org" <kishon@kernel.org>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"Frank.Li@nxp.com" <Frank.Li@nxp.com>,
	"den@valinux.co.jp" <den@valinux.co.jp>,
	"hongxing.zhu@nxp.com" <hongxing.zhu@nxp.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"cassel@kernel.org" <cassel@kernel.org>,
	"18255117159@163.com" <18255117159@163.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 5/9] PCI: tegra194: Enable hardware hot reset mode in Endpoint
Date: Fri, 27 Feb 2026 12:36:15 +0000	[thread overview]
Message-ID: <667008b0-e2a5-47ab-a801-252e7ce6bf9b@nvidia.com> (raw)
In-Reply-To: <20260223184538.3084753-6-mmaddireddy@nvidia.com>

On 24/02/26 00:15, Manikanta Maddireddy wrote:
> From: Vidya Sagar <vidyas@nvidia.com>
> 
> When PCIe link goes down, hardware can retrain the link and try to link up.
> To enable this feature, program the APPL_CTRL register with hardware hot
> reset with immediate LTSSM enable mode.
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
> Changes V1 -> V6: None
> 
>  drivers/pci/controller/dwc/pcie-tegra194.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index 110f2adb74d2..f6305a880cad 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1775,6 +1775,8 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
>  	val = appl_readl(pcie, APPL_CTRL);
>  	val |= APPL_CTRL_SYS_PRE_DET_STATE;
>  	val |= APPL_CTRL_HW_HOT_RST_EN;
> +	val &= ~(APPL_CTRL_HW_HOT_RST_MODE_MASK << APPL_CTRL_HW_HOT_RST_MODE_SHIFT);
> +	val |= (APPL_CTRL_HW_HOT_RST_MODE_IMDT_RST_LTSSM_EN << APPL_CTRL_HW_HOT_RST_MODE_SHIFT);
>  	appl_writel(pcie, val, APPL_CTRL);
>  
>  	val = appl_readl(pcie, APPL_CFG_MISC);

Reviewed-by: Vidya Sagar <vidyas@nvidia.com>

  reply	other threads:[~2026-02-27 12:36 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-23 18:45 [PATCH v6 0/9] Enhancements to pcie-tegra194 driver Manikanta Maddireddy
2026-02-23 18:45 ` [PATCH v6 1/9] PCI: tegra194: Drive CLKREQ signal low explicitly Manikanta Maddireddy
2026-02-27 12:35   ` Vidya Sagar
2026-03-02 23:34     ` Bjorn Helgaas
2026-03-03  6:51       ` Manikanta Maddireddy
2026-02-23 18:45 ` [PATCH v6 2/9] PCI: tegra194: Calibrate P2U for endpoint mode Manikanta Maddireddy
2026-02-27 12:35   ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 3/9] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration Manikanta Maddireddy
2026-02-27 12:35   ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 4/9] PCI: tegra194: Enable DMA interrupt Manikanta Maddireddy
2026-02-27 12:36   ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 5/9] PCI: tegra194: Enable hardware hot reset mode in Endpoint Manikanta Maddireddy
2026-02-27 12:36   ` Vidya Sagar [this message]
2026-02-23 18:45 ` [PATCH v6 6/9] PCI: tegra194: Disable L1.2 capability of Tegra234 EP Manikanta Maddireddy
2026-02-27 12:36   ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 7/9] dt-bindings: PCI: tegra194: Add monitor clock support Manikanta Maddireddy
2026-02-27 12:36   ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 8/9] PCI: tegra194: Add core " Manikanta Maddireddy
2026-02-27 12:36   ` Vidya Sagar
2026-02-23 18:45 ` [PATCH v6 9/9] PCI: tegra194: Add ASPM L1 entrance latency config Manikanta Maddireddy
2026-02-27 12:36   ` Vidya Sagar
2026-02-27 16:59 ` [PATCH v6 0/9] Enhancements to pcie-tegra194 driver Jon Hunter

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