From: Kartik Rajput <kkartik@nvidia.com>
To: Jon Hunter <jonathanh@nvidia.com>,
ldewangan@nvidia.com, digetx@gmail.com, andi.shyti@kernel.org,
thierry.reding@gmail.com, akhilrajeev@nvidia.com,
smangipudi@nvidia.com, linux-i2c@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 3/4] i2c: tegra: Add logic to support different register offsets
Date: Tue, 20 Jan 2026 10:55:46 +0530 [thread overview]
Message-ID: <71e7a882-148e-4d83-bc27-4e3cc35b04b6@nvidia.com> (raw)
In-Reply-To: <089e771d-a4fb-45b0-8c34-5393a4082def@nvidia.com>
Hi Jon,
Thanks for reviewing the patch!
On 20/01/26 02:31, Jon Hunter wrote:
>
>
> On 13/01/2026 16:59, Kartik Rajput wrote:
>> Tegra410 use different offsets for existing I2C registers, update
>> the logic to use appropriate offsets per SoC.
>>
>> As the registers offsets are now also defined for dvc and vi, following
>> function are not required and they are removed:
>> - tegra_i2c_reg_addr(): No translation required.
>> - dvc_writel(): Replaced with i2c_writel() with DVC check.
>
> This says dvc_writel is replace, but ...
>
Yes, the commit message needs to be updated.
>> - dvc_readl(): Replaced with i2c_readl().
>>
>> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
>> ---
>> Changes in v7:
>> * Fix Tegra256 reg offsets, change it to tegra264_i2c_regs as it
>> supports SW mutex.
>> Changes in v6:
>> * Do not remove dvc_writel().
>
> This says it isn't and ...
>
>> /**
>> @@ -348,45 +466,26 @@ static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
>> writel_relaxed(val, i2c_dev->base + reg);
>> }
>> -static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg)
>> -{
>> - return readl_relaxed(i2c_dev->base + reg);
>> -}
>
> If we are removing dvc_readl() I am not sure why we have not removed dvc_writel().
>
>> static void tegra_i2c_dma_complete(void *args)
>> @@ -621,12 +720,12 @@ static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev)
>> {
>> u32 val;
>> - val = dvc_readl(i2c_dev, DVC_CTRL_REG3);
>> + val = i2c_readl(i2c_dev, DVC_CTRL_REG3);
>> val |= DVC_CTRL_REG3_SW_PROG;
>> val |= DVC_CTRL_REG3_I2C_DONE_INTR_EN;
>> dvc_writel(i2c_dev, val, DVC_CTRL_REG3);
>> - val = dvc_readl(i2c_dev, DVC_CTRL_REG1);
>> + val = i2c_readl(i2c_dev, DVC_CTRL_REG1);
>> val |= DVC_CTRL_REG1_INTR_EN;
>> dvc_writel(i2c_dev, val, DVC_CTRL_REG1);
>> }
>
> We could just call writel_relaxed() directly if we can't use i2c_writel().
>
> Jon
>
This makes sense, we are not doing anything special in the dvc_writel(), it can be
replaced with writel_relaxed() directly.
Thanks,
Kartik
next prev parent reply other threads:[~2026-01-20 5:26 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-13 16:59 [PATCH v7 0/4] Add I2C support for Tegra410 Kartik Rajput
2026-01-13 16:59 ` [PATCH v7 1/4] i2c: tegra: Introduce tegra_i2c_variant to identify DVC and VI Kartik Rajput
2026-01-21 9:00 ` Andi Shyti
2026-01-21 9:11 ` Kartik Rajput
2026-01-13 16:59 ` [PATCH v7 2/4] i2c: tegra: Move variant to tegra_i2c_hw_feature Kartik Rajput
2026-01-13 16:59 ` [PATCH v7 3/4] i2c: tegra: Add logic to support different register offsets Kartik Rajput
2026-01-19 21:01 ` Jon Hunter
2026-01-20 5:25 ` Kartik Rajput [this message]
2026-01-13 16:59 ` [PATCH v7 4/4] i2c: tegra: Add support for Tegra410 Kartik Rajput
2026-01-21 9:04 ` [PATCH v7 0/4] Add I2C " Andi Shyti
2026-01-21 14:40 ` Jon Hunter
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