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> > > + > > > + opp-12750000-900 { > > > + opp-microvolt =3D <900000 900000 1390000>; > > > + opp-hz =3D /bits/ 64 <12750000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > > What's the source of the opp data? > > >=20 > I have used tf701t (T40X) and tegratab (T40S) kernel sources, to be > more specific board-*-memory.c files. Timing struct for each clock > contains min voltage field which was used to compose these opps. > 1390000 is the max core regulator voltage, taken from tegra11_dvfs.c Thanks! I also looked through SHIELD Portable (roth, T40T) memory tables an= d this appears to match except for the 528MHz opp. The opp table here is setting the voltage for the 528MHz opp to 1050mV for = the high end SKUs (T40X and T40T)[1] and 1100mV for the lower end T40S, whi= ch makes sense. However, the roth memory table (rel-roth branch) specifies = 1100mV for the 528MHz opp. My understanding is T40T is supposed to be at le= ast as good silicon as T40X, so it doesn't make sense to me that it would r= equire a higher voltage, but memory timings are a dark art and I would err = on the baseline side and keep the voltage at 1100mV. Let me know what you t= hink or if you have additional information. FWIW, roth also specifies a 900MHz opp. I think in principle T40X/T40T in g= eneral can reach this but it might only have been characterized for roth. [1] T40X is SKU 0x3 and T40T is SKU 0x4, and these are mapped to soc_speedo= _id=3D1 -> supported_hw BIT(1). >=20 > I have converted an entire core_dvfs_table table from tegra11_dvfs.c > and I am planning to submit those later on too along with > powergates/domains configuration for tegra114, but that is for another > time :) Sounds good! Thanks, Mikko >=20 > > Cheers, > > Mikko > > > > > + > > > + opp-20400000-900 { > > > + opp-microvolt =3D <900000 900000 1390000>; > > > + opp-hz =3D /bits/ 64 <20400000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > + > > > + opp-40800000-900 { > > > + opp-microvolt =3D <900000 900000 1390000>; > > > + opp-hz =3D /bits/ 64 <40800000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > + > > > + opp-68000000-900 { > > > + opp-microvolt =3D <900000 900000 1390000>; > > > + opp-hz =3D /bits/ 64 <68000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > + > > > + opp-102000000-900 { > > > + opp-microvolt =3D <900000 900000 1390000>; > > > + opp-hz =3D /bits/ 64 <102000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > + > > > + opp-204000000-900 { > > > + opp-microvolt =3D <900000 900000 1390000>; > > > + opp-hz =3D /bits/ 64 <204000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-suspend; > > > + }; > > > + > > > + opp-312000000-1000 { > > > + opp-microvolt =3D <1000000 1000000 1390000>; > > > + opp-hz =3D /bits/ 64 <312000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > + > > > + opp-408000000-1000 { > > > + opp-microvolt =3D <1000000 1000000 1390000>; > > > + opp-hz =3D /bits/ 64 <408000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > + > > > + opp-528000000-1050 { > > > + opp-microvolt =3D <1050000 1050000 1390000>; > > > + opp-hz =3D /bits/ 64 <528000000>; > > > + opp-supported-hw =3D <0x000E>; > > > + }; > > > + > > > + opp-528000000-1100 { > > > + opp-microvolt =3D <1100000 1100000 1390000>; > > > + opp-hz =3D /bits/ 64 <528000000>; > > > + opp-supported-hw =3D <0x0001>; > > > + }; > > > + > > > + opp-624000000-1100 { > > > + opp-microvolt =3D <1100000 1100000 1390000>; > > > + opp-hz =3D /bits/ 64 <624000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > + > > > + opp-792000000-1100 { > > > + opp-microvolt =3D <1100000 1100000 1390000>; > > > + opp-hz =3D /bits/ 64 <792000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + }; > > > + }; > > > + > > > + emc_bw_dfs_opp_table: opp-table-actmon { > > > + compatible =3D "operating-points-v2"; > > > + > > > + opp-12750000 { > > > + opp-hz =3D /bits/ 64 <12750000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <204000>; > > > + }; > > > + > > > + opp-20400000 { > > > + opp-hz =3D /bits/ 64 <20400000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <326400>; > > > + }; > > > + > > > + opp-40800000 { > > > + opp-hz =3D /bits/ 64 <40800000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <652800>; > > > + }; > > > + > > > + opp-68000000 { > > > + opp-hz =3D /bits/ 64 <68000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <1088000>; > > > + }; > > > + > > > + opp-102000000 { > > > + opp-hz =3D /bits/ 64 <102000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <1632000>; > > > + }; > > > + > > > + opp-204000000 { > > > + opp-hz =3D /bits/ 64 <204000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <3264000>; > > > + opp-suspend; > > > + }; > > > + > > > + opp-312000000 { > > > + opp-hz =3D /bits/ 64 <312000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <4992000>; > > > + }; > > > + > > > + opp-408000000 { > > > + opp-hz =3D /bits/ 64 <408000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <6528000>; > > > + }; > > > + > > > + opp-528000000 { > > > + opp-hz =3D /bits/ 64 <528000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <8448000>; > > > + }; > > > + > > > + opp-624000000 { > > > + opp-hz =3D /bits/ 64 <624000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <9984000>; > > > + }; > > > + > > > + opp-792000000 { > > > + opp-hz =3D /bits/ 64 <792000000>; > > > + opp-supported-hw =3D <0x000F>; > > > + opp-peak-kBps =3D <12672000>; > > > + }; > > > + }; > > > +}; > > > diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/d= ts/nvidia/tegra114.dtsi > > > index a920ad041c14..6221423b81d1 100644 > > > --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi > > > +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi > > > @@ -8,6 +8,8 @@ > > > #include > > > #include > > > > > > +#include "tegra114-peripherals-opp.dtsi" > > > + > > > / { > > > compatible =3D "nvidia,tegra114"; > > > interrupt-parent =3D <&lic>; > > > @@ -323,6 +325,9 @@ actmon: actmon@6000c800 { > > > clock-names =3D "actmon", "emc"; > > > resets =3D <&tegra_car TEGRA114_CLK_ACTMON>; > > > reset-names =3D "actmon"; > > > + operating-points-v2 =3D <&emc_bw_dfs_opp_table>; > > > + interconnects =3D <&mc TEGRA114_MC_MPCORER &emc>; > > > + interconnect-names =3D "cpu-read"; > > > #cooling-cells =3D <2>; > > > }; > > > > > > @@ -655,6 +660,7 @@ mc: memory-controller@70019000 { > > > > > > #reset-cells =3D <1>; > > > #iommu-cells =3D <1>; > > > + #interconnect-cells =3D <1>; > > > }; > > > > > > emc: external-memory-controller@7001b000 { > > > @@ -665,6 +671,9 @@ emc: external-memory-controller@7001b000 { > > > clock-names =3D "emc"; > > > > > > nvidia,memory-controller =3D <&mc>; > > > + operating-points-v2 =3D <&emc_icc_dvfs_opp_table>; > > > + > > > + #interconnect-cells =3D <0>; > > > }; > > > > > > hda@70030000 { > > > > > > > > > > >