Re: [PATCH V5 6/7] i2c: tegra: fix PIO rx/tx residual transfer check

Bitan Biswas
2019-06-18T05:21:57Z

On 6/14/19 6:02 AM, Dmitry Osipenko wrote:
> 14.06.2019 12:50, Bitan Biswas пишет:
>>
>>
>> On 6/13/19 5:28 AM, Dmitry Osipenko wrote:
>>> 13.06.2019 14:30, Bitan Biswas пишет:
>>>>
>>>>
>>>> On 6/12/19 7:30 AM, Dmitry Osipenko wrote:
>>>>> 11.06.2019 13:51, Bitan Biswas пишет:
>>>>>> Fix expression for residual bytes(less than word) transfer
>>>>>> in I2C PIO mode RX/TX.
>>>>>>
>>>>>> Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
>>>>>> ---
>>>>>
>>>>> [snip]
>>>>>
>>>>>>            /*
>>>>>> -         * Update state before writing to FIFO.  If this casues us
>>>>>> +         * Update state before writing to FIFO.  If this causes us
>>>>>>             * to finish writing all bytes (AKA buf_remaining goes to
>>>>>> 0) we
>>>>>>             * have a potential for an interrupt (PACKET_XFER_COMPLETE is
>>>>>> -         * not maskable).  We need to make sure that the isr sees
>>>>>> -         * buf_remaining as 0 and doesn't call us back re-entrantly.
>>>>>> +         * not maskable).
>>>>>>             */
>>>>>>            buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD;
>>>>>
>>>>> Looks like the comment could be removed altogether because it doesn't
>>>>> make sense since interrupt handler is under xfer_lock which is kept
>>>>> locked during of tegra_i2c_xfer_msg().
>>>> I would push a separate patch to remove this comment because of
>>>> xfer_lock in ISR now.
>>>>
>>>>>
>>>>> Moreover the comment says that "PACKET_XFER_COMPLETE is not maskable",
>>>>> but then what I2C_INT_PACKET_XFER_COMPLETE masking does?
>>>>>
>>>> I2C_INT_PACKET_XFER_COMPLETE masking support available in Tegra chips
>>>> newer than Tegra30 allows one to not see interrupt after Packet transfer
>>>> complete. With the xfer_lock in ISR the scenario discussed in comment
>>>> can be ignored.
>>>
>>> Also note that xfer_lock could be removed and replaced with a just
>>> irq_enable/disable() calls in tegra_i2c_xfer_msg() because we only care
>>> about IRQ not firing during of the preparation process.
>> This should need sufficient testing hence let us do it in a different series.
>
> I don't think that there is much to test here since obviously it should work.
>
I shall push a patch for this as basic i2c read write test passed.

>>>
>>> It also looks like tegra_i2c_[un]nmask_irq isn't really needed and all
>>> IRQ's could be simply unmasked during the driver's probe, in that case
>>> it may worth to add a kind of "in-progress" flag to catch erroneous
>>> interrupts.
>>>
>> TX interrupt needs special handling if this change is done. Hence I think it should be
>> taken up after sufficient testing in a separate patch.
>
> This one is indeed a bit more trickier. Probably another alternative could be to keep GIC
> interrupt disabled while no transfer is performed, then you'll have to request interrupt
> in a disabled state using IRQ_NOAUTOEN flag.
>
> And yes, that all should be a separate changes if you're going to implement them.
>
OK

-Thanks,
Bitan