[PATCH 1/2] dt-bindings: gpio: Add Tegra410 support

[PATCH 1/2] dt-bindings: gpio: Add Tegra410 support

[Kartik Rajput]

From: Prathamesh Shete <pshete@nvidia.com>

Add the port definitions for the main GPIO controller found on
Tegra410.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
---
 include/dt-bindings/gpio/tegra410-gpio.h | 37 ++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 include/dt-bindings/gpio/tegra410-gpio.h

diff --git a/include/dt-bindings/gpio/tegra410-gpio.h b/include/dt-bindings/gpio/tegra410-gpio.h
new file mode 100644
index 000000000000..e4d042fbacb2
--- /dev/null
+++ b/include/dt-bindings/gpio/tegra410-gpio.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */
+
+/*
+ * This header provides constants for the nvidia,tegra410-gpio DT binding.
+ *
+ * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
+ * provide names for this.
+ *
+ * The second cell contains standard flag values specified in gpio.h.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_TEGRA410_GPIO_H
+#define _DT_BINDINGS_GPIO_TEGRA410_GPIO_H
+
+#include <dt-bindings/gpio/gpio.h>
+
+/* GPIOs implemented by main GPIO controller */
+#define TEGRA410_MAIN_GPIO_PORT_A	0
+#define TEGRA410_MAIN_GPIO_PORT_B	1
+#define TEGRA410_MAIN_GPIO_PORT_C	2
+#define TEGRA410_MAIN_GPIO_PORT_D	3
+#define TEGRA410_MAIN_GPIO_PORT_E	4
+#define TEGRA410_MAIN_GPIO_PORT_I	5
+#define TEGRA410_MAIN_GPIO_PORT_J	6
+#define TEGRA410_MAIN_GPIO_PORT_K	7
+#define TEGRA410_MAIN_GPIO_PORT_L	8
+#define TEGRA410_MAIN_GPIO_PORT_M	9
+#define TEGRA410_MAIN_GPIO_PORT_N	10
+#define TEGRA410_MAIN_GPIO_PORT_P	11
+#define TEGRA410_MAIN_GPIO_PORT_Q	12
+#define TEGRA410_MAIN_GPIO_PORT_R	13
+
+#define TEGRA410_MAIN_GPIO(port, offset) \
+	((TEGRA410_MAIN_GPIO_PORT_##port * 8) + (offset))
+
+#endif
-- 
2.43.0

[PATCH 2/2] gpio: tegra186: Add support for Tegra410

[Kartik Rajput]

From: Prathamesh Shete <pshete@nvidia.com>

Extend the existing Tegra186 GPIO controller driver with support for the
GPIO controller found on Tegra410. While the programming model remains
the same, the number of pins has slightly changed.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
---
 drivers/gpio/gpio-tegra186.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c
index 4d3db6e06eeb..68bc25b7d106 100644
--- a/drivers/gpio/gpio-tegra186.c
+++ b/drivers/gpio/gpio-tegra186.c
@@ -21,6 +21,7 @@
 #include <dt-bindings/gpio/tegra234-gpio.h>
 #include <dt-bindings/gpio/tegra241-gpio.h>
 #include <dt-bindings/gpio/tegra256-gpio.h>
+#include <dt-bindings/gpio/tegra410-gpio.h>
 
 /* security registers */
 #define TEGRA186_GPIO_CTL_SCR 0x0c
@@ -1304,6 +1305,40 @@ static const struct tegra_gpio_soc tegra256_main_soc = {
 	.has_vm_support = true,
 };
 
+#define TEGRA410_MAIN_GPIO_PORT(_name, _bank, _port, _pins)	\
+	[TEGRA410_MAIN_GPIO_PORT_##_name] = {			\
+		.name = #_name,					\
+		.bank = _bank,					\
+		.port = _port,					\
+		.pins = _pins,					\
+	}
+
+static const struct tegra_gpio_port tegra410_main_ports[] = {
+	TEGRA410_MAIN_GPIO_PORT(A, 0, 0, 7),
+	TEGRA410_MAIN_GPIO_PORT(B, 0, 1, 8),
+	TEGRA410_MAIN_GPIO_PORT(C, 0, 2, 8),
+	TEGRA410_MAIN_GPIO_PORT(D, 0, 3, 8),
+	TEGRA410_MAIN_GPIO_PORT(E, 0, 4, 6),
+	TEGRA410_MAIN_GPIO_PORT(I, 1, 0, 8),
+	TEGRA410_MAIN_GPIO_PORT(J, 1, 1, 7),
+	TEGRA410_MAIN_GPIO_PORT(K, 1, 2, 7),
+	TEGRA410_MAIN_GPIO_PORT(L, 1, 3, 7),
+	TEGRA410_MAIN_GPIO_PORT(M, 2, 0, 7),
+	TEGRA410_MAIN_GPIO_PORT(N, 2, 1, 6),
+	TEGRA410_MAIN_GPIO_PORT(P, 2, 2, 8),
+	TEGRA410_MAIN_GPIO_PORT(Q, 2, 3, 3),
+	TEGRA410_MAIN_GPIO_PORT(R, 2, 4, 2),
+};
+
+static const struct tegra_gpio_soc tegra410_main_soc = {
+	.num_ports = ARRAY_SIZE(tegra410_main_ports),
+	.ports = tegra410_main_ports,
+	.name = "tegra410-gpio-main",
+	.instance = 1,
+	.num_irqs_per_bank = 8,
+	.has_vm_support = false,
+};
+
 static const struct of_device_id tegra186_gpio_of_match[] = {
 	{
 		.compatible = "nvidia,tegra186-gpio",
@@ -1339,6 +1374,7 @@ static const struct acpi_device_id  tegra186_gpio_acpi_match[] = {
 	{ .id = "NVDA0408", .driver_data = (kernel_ulong_t)&tegra194_aon_soc },
 	{ .id = "NVDA0508", .driver_data = (kernel_ulong_t)&tegra241_main_soc },
 	{ .id = "NVDA0608", .driver_data = (kernel_ulong_t)&tegra241_aon_soc },
+	{ .id = "NVDA0409", .driver_data = (kernel_ulong_t)&tegra410_main_soc },
 	{}
 };
 MODULE_DEVICE_TABLE(acpi, tegra186_gpio_acpi_match);
-- 
2.43.0

Re: [PATCH 1/2] dt-bindings: gpio: Add Tegra410 support

[Conor Dooley]

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On Fri, Sep 19, 2025 at 03:06:26PM +0530, Kartik Rajput wrote:
> From: Prathamesh Shete <pshete@nvidia.com>
> 
> Add the port definitions for the main GPIO controller found on
> Tegra410.
> 
> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
> ---

Why are you modifying a binding header for devicetree when the driver
only appear to grow acpi support?

>  include/dt-bindings/gpio/tegra410-gpio.h | 37 ++++++++++++++++++++++++
>  1 file changed, 37 insertions(+)
>  create mode 100644 include/dt-bindings/gpio/tegra410-gpio.h
> 
> diff --git a/include/dt-bindings/gpio/tegra410-gpio.h b/include/dt-bindings/gpio/tegra410-gpio.h
> new file mode 100644
> index 000000000000..e4d042fbacb2
> --- /dev/null
> +++ b/include/dt-bindings/gpio/tegra410-gpio.h
> @@ -0,0 +1,37 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */
> +
> +/*
> + * This header provides constants for the nvidia,tegra410-gpio DT binding.
> + *
> + * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
> + * provide names for this.
> + *
> + * The second cell contains standard flag values specified in gpio.h.
> + */
> +
> +#ifndef _DT_BINDINGS_GPIO_TEGRA410_GPIO_H
> +#define _DT_BINDINGS_GPIO_TEGRA410_GPIO_H
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/* GPIOs implemented by main GPIO controller */
> +#define TEGRA410_MAIN_GPIO_PORT_A	0
> +#define TEGRA410_MAIN_GPIO_PORT_B	1
> +#define TEGRA410_MAIN_GPIO_PORT_C	2
> +#define TEGRA410_MAIN_GPIO_PORT_D	3
> +#define TEGRA410_MAIN_GPIO_PORT_E	4
> +#define TEGRA410_MAIN_GPIO_PORT_I	5
> +#define TEGRA410_MAIN_GPIO_PORT_J	6
> +#define TEGRA410_MAIN_GPIO_PORT_K	7
> +#define TEGRA410_MAIN_GPIO_PORT_L	8
> +#define TEGRA410_MAIN_GPIO_PORT_M	9
> +#define TEGRA410_MAIN_GPIO_PORT_N	10
> +#define TEGRA410_MAIN_GPIO_PORT_P	11
> +#define TEGRA410_MAIN_GPIO_PORT_Q	12
> +#define TEGRA410_MAIN_GPIO_PORT_R	13
> +
> +#define TEGRA410_MAIN_GPIO(port, offset) \
> +	((TEGRA410_MAIN_GPIO_PORT_##port * 8) + (offset))
> +
> +#endif
> -- 
> 2.43.0
> 

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Re: [PATCH 1/2] dt-bindings: gpio: Add Tegra410 support

[Kartik Rajput]

Hi Conor,

Thanks for reviewing the patch!

On 19/09/25 22:44, Conor Dooley wrote:
> On Fri, Sep 19, 2025 at 03:06:26PM +0530, Kartik Rajput wrote:
>> From: Prathamesh Shete <pshete@nvidia.com>
>>
>> Add the port definitions for the main GPIO controller found on
>> Tegra410.
>>
>> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
>> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
>> ---
> 
> Why are you modifying a binding header for devicetree when the driver
> only appear to grow acpi support?
> 

Although Tegra410 is ACPI-only and does not require a new compatible string,
we chose to add the GPIO port definitions to the DT binding header to stay
consistent with previous Tegra SoCs.

Thanks,
Kartik


>>   include/dt-bindings/gpio/tegra410-gpio.h | 37 ++++++++++++++++++++++++
>>   1 file changed, 37 insertions(+)
>>   create mode 100644 include/dt-bindings/gpio/tegra410-gpio.h
>>
>> diff --git a/include/dt-bindings/gpio/tegra410-gpio.h b/include/dt-bindings/gpio/tegra410-gpio.h
>> new file mode 100644
>> index 000000000000..e4d042fbacb2
>> --- /dev/null
>> +++ b/include/dt-bindings/gpio/tegra410-gpio.h
>> @@ -0,0 +1,37 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */
>> +
>> +/*
>> + * This header provides constants for the nvidia,tegra410-gpio DT binding.
>> + *
>> + * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
>> + * provide names for this.
>> + *
>> + * The second cell contains standard flag values specified in gpio.h.
>> + */
>> +
>> +#ifndef _DT_BINDINGS_GPIO_TEGRA410_GPIO_H
>> +#define _DT_BINDINGS_GPIO_TEGRA410_GPIO_H
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +
>> +/* GPIOs implemented by main GPIO controller */
>> +#define TEGRA410_MAIN_GPIO_PORT_A	0
>> +#define TEGRA410_MAIN_GPIO_PORT_B	1
>> +#define TEGRA410_MAIN_GPIO_PORT_C	2
>> +#define TEGRA410_MAIN_GPIO_PORT_D	3
>> +#define TEGRA410_MAIN_GPIO_PORT_E	4
>> +#define TEGRA410_MAIN_GPIO_PORT_I	5
>> +#define TEGRA410_MAIN_GPIO_PORT_J	6
>> +#define TEGRA410_MAIN_GPIO_PORT_K	7
>> +#define TEGRA410_MAIN_GPIO_PORT_L	8
>> +#define TEGRA410_MAIN_GPIO_PORT_M	9
>> +#define TEGRA410_MAIN_GPIO_PORT_N	10
>> +#define TEGRA410_MAIN_GPIO_PORT_P	11
>> +#define TEGRA410_MAIN_GPIO_PORT_Q	12
>> +#define TEGRA410_MAIN_GPIO_PORT_R	13
>> +
>> +#define TEGRA410_MAIN_GPIO(port, offset) \
>> +	((TEGRA410_MAIN_GPIO_PORT_##port * 8) + (offset))
>> +
>> +#endif
>> -- 
>> 2.43.0
>>

Re: [PATCH 1/2] dt-bindings: gpio: Add Tegra410 support

[Bartosz Golaszewski]

On Mon, Sep 29, 2025 at 9:24 AM Kartik Rajput <kkartik@nvidia.com> wrote:
>
> Hi Conor,
>
> Thanks for reviewing the patch!
>
> On 19/09/25 22:44, Conor Dooley wrote:
> > On Fri, Sep 19, 2025 at 03:06:26PM +0530, Kartik Rajput wrote:
> >> From: Prathamesh Shete <pshete@nvidia.com>
> >>
> >> Add the port definitions for the main GPIO controller found on
> >> Tegra410.
> >>
> >> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
> >> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
> >> ---
> >
> > Why are you modifying a binding header for devicetree when the driver
> > only appear to grow acpi support?
> >
>
> Although Tegra410 is ACPI-only and does not require a new compatible string,
> we chose to add the GPIO port definitions to the DT binding header to stay
> consistent with previous Tegra SoCs.
>
> Thanks,
> Kartik
>

Hi!

The kernel policy is not to add symbols nobody is using. Please drop them.

Bartosz

Re: [PATCH 1/2] dt-bindings: gpio: Add Tegra410 support

[Kartik Rajput]

On 29/09/25 19:11, Bartosz Golaszewski wrote:
> External email: Use caution opening links or attachments
> 
> 
> On Mon, Sep 29, 2025 at 9:24 AM Kartik Rajput <kkartik@nvidia.com> wrote:
>>
>> Hi Conor,
>>
>> Thanks for reviewing the patch!
>>
>> On 19/09/25 22:44, Conor Dooley wrote:
>>> On Fri, Sep 19, 2025 at 03:06:26PM +0530, Kartik Rajput wrote:
>>>> From: Prathamesh Shete <pshete@nvidia.com>
>>>>
>>>> Add the port definitions for the main GPIO controller found on
>>>> Tegra410.
>>>>
>>>> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
>>>> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
>>>> ---
>>>
>>> Why are you modifying a binding header for devicetree when the driver
>>> only appear to grow acpi support?
>>>
>>
>> Although Tegra410 is ACPI-only and does not require a new compatible string,
>> we chose to add the GPIO port definitions to the DT binding header to stay
>> consistent with previous Tegra SoCs.
>>
>> Thanks,
>> Kartik
>>
> 
> Hi!
> 
> The kernel policy is not to add symbols nobody is using. Please drop them.
> 
> Bartosz

Thanks Bartosz,

I have dropped the dt binding header in v2 and moved these macros to the
driver source instead as it is the only user.

Regards,
Kartik