From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5466AC433F5 for ; Wed, 5 Oct 2022 12:29:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229702AbiJEM3h (ORCPT ); Wed, 5 Oct 2022 08:29:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229569AbiJEM3g (ORCPT ); Wed, 5 Oct 2022 08:29:36 -0400 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.220.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04984DB; Wed, 5 Oct 2022 05:29:34 -0700 (PDT) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id BA13B2189F; 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Wed, 5 Oct 2022 12:29:32 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id yellHax4PWOCawAAMHmgww (envelope-from ); Wed, 05 Oct 2022 12:29:32 +0000 Date: Wed, 05 Oct 2022 14:29:31 +0200 Message-ID: <87a66av4gk.wl-tiwai@suse.de> From: Takashi Iwai To: Jon Hunter Cc: Amadeusz =?ISO-8859-2?Q?S=B3awi=F1ski?= , Takashi Iwai , alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Cezary Rojewski , Pierre-Louis Bossart , Jaroslav Kysela , "linux-tegra@vger.kernel.org" , Mohan Kumar D Subject: Re: [PATCH v2 2/4] ALSA: hda: Rework snd_hdac_stream_reset() to use macros In-Reply-To: <657d2418-0c3e-296f-8f4a-dc10ced2dffe@nvidia.com> References: <20220818141517.109280-1-amadeuszx.slawinski@linux.intel.com> <20220818141517.109280-3-amadeuszx.slawinski@linux.intel.com> <657d2418-0c3e-296f-8f4a-dc10ced2dffe@nvidia.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) Emacs/27.2 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=ISO-8859-2 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On Wed, 05 Oct 2022 14:10:04 +0200, Jon Hunter wrote: > > > On 18/08/2022 15:15, Amadeusz Sławiński wrote: > > We can use existing macros to poll and update register values instead of > > open coding the functionality. > > > > Reviewed-by: Cezary Rojewski > > Signed-off-by: Amadeusz Sławiński > > --- > > sound/hda/hdac_stream.c | 26 ++++++-------------------- > > 1 file changed, 6 insertions(+), 20 deletions(-) > > > > diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c > > index f3582012d22f..bdf6d4db6769 100644 > > --- a/sound/hda/hdac_stream.c > > +++ b/sound/hda/hdac_stream.c > > @@ -165,7 +165,6 @@ EXPORT_SYMBOL_GPL(snd_hdac_stop_streams_and_chip); > > void snd_hdac_stream_reset(struct hdac_stream *azx_dev) > > { > > unsigned char val; > > - int timeout; > > int dma_run_state; > > snd_hdac_stream_clear(azx_dev); > > @@ -173,30 +172,17 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) > > dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START; > > snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, > > SD_CTL_STREAM_RESET); > > - udelay(3); > > - timeout = 300; > > - do { > > - val = snd_hdac_stream_readb(azx_dev, SD_CTL) & > > - SD_CTL_STREAM_RESET; > > - if (val) > > - break; > > - } while (--timeout); > > + > > + /* wait for hardware to report that the stream entered reset */ > > + snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300); > > if (azx_dev->bus->dma_stop_delay && dma_run_state) > > udelay(azx_dev->bus->dma_stop_delay); > > - val &= ~SD_CTL_STREAM_RESET; > > - snd_hdac_stream_writeb(azx_dev, SD_CTL, val); > > - udelay(3); > > + snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0); > > - timeout = 300; > > - /* waiting for hardware to report that the stream is out of reset */ > > - do { > > - val = snd_hdac_stream_readb(azx_dev, SD_CTL) & > > - SD_CTL_STREAM_RESET; > > - if (!val) > > - break; > > - } while (--timeout); > > + /* wait for hardware to report that the stream is out of reset */ > > + snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300); > > /* reset first position - may not be synced with hw at this > > time */ > > if (azx_dev->posbuf) > > > HDA playback is failing on -next for various Tegra boards. Bisect is > point to this commit and reverting it fixes the problem. I was a bit > puzzled why this change is causing a problem, but looking closer there > is a difference between the previous code that was calling > snd_hdac_stream_readb() and the new code that is calling > snd_hdac_stream_readb_poll(). The function snd_hdac_stream_readb() > calls snd_hdac_aligned_mmio() is see if the device has an aligned MMIO > which Tegra does and then would call snd_hdac_aligned_read(). However, > now the code always call readb() and this is breaking Tegra. > > So it is either necessary to update snd_hdac_stream_readb_poll() to > handle this or revert this change. Does the patch below work? thanks, Takashi -- 8< -- --- a/include/sound/hdaudio.h +++ b/include/sound/hdaudio.h @@ -592,8 +592,8 @@ int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus, #define snd_hdac_stream_readb(dev, reg) \ snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) #define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us, timeout_us) \ - readb_poll_timeout((dev)->sd_addr + AZX_REG_ ## reg, val, cond, \ - delay_us, timeout_us) + read_poll_timeout(snd_hdac_reg_readb, val, cond, delay_us, timeout_us,\ + false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) #define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us, timeout_us) \ readl_poll_timeout((dev)->sd_addr + AZX_REG_ ## reg, val, cond, \ delay_us, timeout_us)