From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hiroshi Doyu Subject: Re: [PATCH v5] devicetree: Add generic IOMMU device tree bindings Date: Tue, 19 Aug 2014 14:03:00 +0300 Message-ID: <87wqa4hhcr.fsf@nvidia.com> References: <1406803383-11601-1-git-send-email-thierry.reding@gmail.com> <87a9774lf5.fsf@nvidia.com> <87y4ur2h23.fsf@nvidia.com> <87zjf0hk3b.fsf@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Varun Sethi , Will Deacon Cc: Mark Rutland , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Stephen Warren , Arnd Bergmann , Stuart Yoder , Rob Herring , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , Thierry Reding , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" List-Id: linux-tegra@vger.kernel.org Varun Sethi writes: >> >> > Also, for dynamic stream ID allocation we would need to represent >> >> > the specific master register (to store the stream ID) in the device tree. >> >> >> >> I assmue that the above means that iMX has such configuration >> >> register to map steramID and a device dynamically. >> > >> > We have per master registers for setting the stream ID on the >> > Layerscape platforms. My point was that we would need the iommu master >> > node to include a reference to the master id register. >> > >> > master@1 { >> > /* device has master ID 42 in the IOMMU */ >> > iommus = <&{/iommu} 42>; >> > master-id-reg = }; >> >> In the above, for "iommus=" bindings, you wouldn't need to break >> ARM,SMMU compatibility at all if you set "streamID" exactly as below. >> >> master@1 { >> /* device has master ID 42 in the IOMMU */ >> iommus = <&{/iommu} 'any given streamID'>; >> master-id-reg = >> }; >> >> And your SoC needs to register bus_notifier and ADD_DEVICE should configure >> to map 'any given streamID' to a device via the above register. This wouldn't >> need any modification from ARM,SMMU driver and keep the iommus bindings >> as it is. >> >> IOW, SoC only needs to register ADD_DEVICE in bus_notifier to map StreamID >> to a device. This needs to be executed earlier than IOMMU bus's ADD_DEVICE, >> though. >> >> Is my understanding right? > > I don't think that SOC specific code needs a bus notifier for setting > the stream ID. It can be done as a part of SOC specific > initialization. The device tree can be updated to reflect the correct > stream ID (SMMU driver can get the updated stream ID from device > tree). That's possible. > I was thinking more on the lines of updating the device stream id > while attaching a device to the domain. I thought the same but this would break the ARM,SMMU /compatibility/ since the 1st param of "iommus=" is always expected as "streamID". If streamID can be assigned dynamically like PCIe, not like streamID statically set in DT, how should we describe this dynmaic steramID shifting/assignment in DT?