From: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCHv8 21/21] ARM: dt: tegra124: add sdhci iommus bindings
Date: Fri, 30 May 2014 19:44:06 +0300 [thread overview]
Message-ID: <87y4xjrzc9.fsf@nvidia.com> (raw)
In-Reply-To: <5388B2FD.7040307-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> writes:
> On 05/30/2014 05:20 AM, Hiroshi Doyu wrote:
>> Add sdhci iommus bindings.
>
> This isn't adding bindings, it's adding DT properties. A binding is the
> documentation of the schema, not the actual data in the DT.
>
>> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
>> index 5b339ca8a1ab..011831ffd390 100644
>> --- a/arch/arm/boot/dts/tegra124.dtsi
>> +++ b/arch/arm/boot/dts/tegra124.dtsi
>> @@ -472,6 +472,7 @@
>> resets = <&tegra_car 14>;
>> reset-names = "sdhci";
>> status = "disabled";
>> + iommus=<&smmu TEGRA_SWGROUP_CELLS(SDMMC1A)>;
>
> Is the "iommus" property documented anywhere? I suspect not, since
> there's an active ongoing discussion about how IOMMU bindings should be
> structured. I suspect this series needs to wait until that discussion
> completes, and the "iommus" property is documented somewhere.
Yes, I'm catching up that thread now. That's why I drop document part.
If Thierry's patch(v2 or v3) is accpeted, this patch won't need any
further doc since it will use the IOMMU standard bindings("iommus = ").
next prev parent reply other threads:[~2014-05-30 16:44 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-30 11:20 [PATCHv8 00/21] Tegra,SMMU update V8 Hiroshi Doyu
[not found] ` <1401448834-32659-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-05-30 11:20 ` [PATCHv8 01/21] of: introduce of_property_for_each_phandle_with_args() Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 02/21] iommu/of: introduce a global iommu device list Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 03/21] iommu/of: check if dependee iommu is ready or not Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 04/21] driver/core: populate devices in order for IOMMUs Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 05/21] iommu/core: add ops->{bound,unbind}_driver() Hiroshi Doyu
[not found] ` <1401448834-32659-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-16 11:02 ` Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 06/21] ARM: tegra: create a DT header defining SWGROUP ID Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 07/21] iommu/tegra: smmu: register device to iommu dynamically Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 08/21] iommu/tegra: smmu: calculate ASID register offset by ID Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 09/21] iommu/tegra: smmu: get swgroups from DT "iommus=" Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 10/21] iommu/tegra: smmu: allow duplicate ASID wirte Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 11/21] iommu/tegra: smmu: Rename hwgrp -> swgroups Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 12/21] iommu/tegra: smmu: add SMMU to an global iommu list Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 13/21] iommu/tegra124: smmu: optionaly AHB enables SMMU Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 14/21] iommu/tegra124: smmu: convert swgroup ID to asid offset Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 15/21] iommu/tegra124: smmu: add support platform data Hiroshi Doyu
[not found] ` <1401448834-32659-16-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-05-30 16:31 ` Stephen Warren
[not found] ` <5388B260.5000403-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-05-30 16:39 ` Hiroshi Doyu
[not found] ` <87zjhzrzkq.fsf-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-05-30 16:40 ` Stephen Warren
2014-06-04 21:37 ` Thierry Reding
2014-05-30 11:20 ` [PATCHv8 16/21] iommu/tegra124: smmu: support more than 32 bit pa Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 17/21] iommu/tegra124: smmu: {TLB,PTC} reset value per SoC Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 18/21] iommu/tegra124: smmu: adjust TLB_FLUSH_ASID bit range Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 19/21] iommu/tegra124: smmu: add multiple asid_security support Hiroshi Doyu
2014-05-30 11:20 ` [PATCHv8 20/21] ARM: dt: tegra124: add tegra,smmu entry Hiroshi Doyu
[not found] ` <1401448834-32659-21-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-05-30 16:30 ` Stephen Warren
2014-05-30 11:20 ` [PATCHv8 21/21] ARM: dt: tegra124: add sdhci iommus bindings Hiroshi Doyu
[not found] ` <1401448834-32659-22-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-05-30 16:34 ` Stephen Warren
[not found] ` <5388B2FD.7040307-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-05-30 16:44 ` Hiroshi Doyu [this message]
[not found] ` <87y4xjrzc9.fsf-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-04 21:39 ` Thierry Reding
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