From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dmitry Osipenko Subject: Re: [PATCH v5 3/8] clk: tegra: Implement Tegra210 EMC clock Date: Tue, 10 Mar 2020 19:26:28 +0300 Message-ID: <88d18719-b6dd-98d0-e147-f89eed2f3f0c@gmail.com> References: <20200310152003.2945170-1-thierry.reding@gmail.com> <20200310152003.2945170-4-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20200310152003.2945170-4-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Content-Language: en-US Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thierry Reding Cc: Jon Hunter , Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Joseph Lo , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: linux-tegra@vger.kernel.org 10.03.2020 18:19, Thierry Reding пишет: > From: Joseph Lo > > The EMC clock needs to carefully coordinate with the EMC controller > programming to make sure external memory can be properly clocked. Do so > by hooking up the EMC clock with an EMC provider that will specify which > rates are supported by the EMC and provide a callback to use for setting > the clock rate at the EMC. > > Based on work by Peter De Schrijver . > > Signed-off-by: Joseph Lo > Signed-off-by: Thierry Reding > --- > Changes in v5: > - major rework and cleanup ... > +u32 emc_readl(struct tegra_emc *emc, unsigned long offset) > +{ > + return readl_relaxed(emc->emc_base[REG_EMC] + offset); > +} static u32 emc_readl() > +u32 emc_readl_per_ch(struct tegra_emc *emc, int type, > + unsigned long offset) static u32 emc_readl_per_ch()