* RE: [RFC PATCH 00/12] arm/tegra: Initialize GPIO & pinmux from DT
From: Stephen Warren @ 2011-08-15 16:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson,
Russell King,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
In-Reply-To: <20110813130858.GC7244-+NayF8gZjK2ctlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
Shawn Guo wrote at Saturday, August 13, 2011 7:09 AM:
> On Fri, Aug 12, 2011 at 04:54:45PM -0600, Stephen Warren wrote:
> > This patch modifies Tegra's device tree support to remove the dependency
> > on harmony_pinmux_init(), thus making it completely board-independent.
> >
> > Some notes:
> >
...
> > * tegra_pinmux_probe_dt() enumerates all legal pingroup names, and searches
> > for a pinmux controller subnode of that name, then processes each one
> > that is found. An alternative that some may prefer would be to enumerate
> > each child node of the pinmux controller, and have each node contain an
> > explicit pingroup name property instead. Does anyone have any preference
> > here? I suppose the latter option would obviate the need to add
> > of_find_child_node_by_name().
>
> I agree with Jamie that the latter option seems better/simper.
OK, I'll flip the iteration around.
...
> > arch/arm/boot/dts/tegra-harmony.dts | 479 ++++++++++++++++++++++++++
> > arch/arm/boot/dts/tegra-seaboard.dts | 409 ++++++++++++++++++++++
> > arch/arm/boot/dts/tegra20.dtsi | 5 +
> > arch/arm/mach-tegra/Makefile | 1 -
> > arch/arm/mach-tegra/board-dt.c | 12 +-
> > arch/arm/mach-tegra/board-harmony-pinmux.c | 8 +
> > arch/arm/mach-tegra/board-paz00-pinmux.c | 8 +
> > arch/arm/mach-tegra/board-seaboard-pinmux.c | 9 +-
> > arch/arm/mach-tegra/board-trimslice-pinmux.c | 7 +
> > arch/arm/mach-tegra/devices.c | 10 +
> > arch/arm/mach-tegra/devices.h | 2 +
> > arch/arm/mach-tegra/pinmux.c | 136 ++++++++
> > drivers/gpio/gpio-tegra.c | 56 +++-
> > drivers/of/base.c | 18 +
> > include/linux/of.h | 2 +
> > 15 files changed, 1138 insertions(+), 24 deletions(-)
> >
> Generally, you need to document the bindings you come with in
> Documentation/devicetree/bindings/
Uggh. I must have run format-patch on the wrong commit ID; the last thing
I did was to add a couple commits containing the documentation:-( I really
shouldn't try to post patch series last thing on Friday...
--
nvpublic
^ permalink raw reply
* RE: [RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver
From: Stephen Warren @ 2011-08-15 16:09 UTC (permalink / raw)
To: Jamie Iles
Cc: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson,
Russell King,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
In-Reply-To: <20110813104850.GD2643-apL1N+EY0C9YtYNIL7UdTEEOCMrvLtNR@public.gmane.org>
Jamie Iles wrote at Saturday, August 13, 2011 4:49 AM:
> On Sat, Aug 13, 2011 at 11:43:23AM +0100, Jamie Iles wrote:
> > Hi Stephen,
> >
> > On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
...
> > > diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
...
> > > +#ifdef CONFIG_OF
> > > +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> > > +{
> > > + int pg;
> > > +
> > > + for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> > > + const char *pg_name = pingroup_name(pg);
> > > + struct tegra_pingroup_config config;
> > > + struct device_node *pg_node;
> > > + int ret;
> > > + const char *s;
> > > +
> > > + pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> > > + pg_name);
> > > + if (pg_node == NULL)
> > > + continue;
> >
> > Rather than iterating over all of the mux names in the pinmux driver and
> > searching for a matching DT node, could you not do it the other way
> > round? So do an for_each_child_of_node() on the pinmux node then find
> > the matching pingroup keyed by the node name? This would eliminate
> > of_find_child_node_by_name(). You could also catch invalid
> > configurations for non-existent pins this way.
>
> I just re-read your introduction email and saw you've already discussed
> this! Would this require an explicit pin name property though or could
> you just key off of the pg_node->name?
No, I think pg_node->name will work out fine; it's what of_find_child_node_by_name
is using anyway.
--
nvpublic
^ permalink raw reply
* RE: [RFC PATCH 05/12] arm/dt: Tegra: Add nvidia,gpios property to GPIO controller
From: Stephen Warren @ 2011-08-15 16:15 UTC (permalink / raw)
To: Olof Johansson
Cc: Grant Likely, Colin Cross, Erik Gilling, Russell King,
Arnd Bergmann,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <CAOesGMj8firxDz-kqkh=jwsbC_QRW+YSFpf7dh3WaOhseCg91w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
Olof Johansson wrote at Sunday, August 14, 2011 1:02 AM:
> On Fri, Aug 12, 2011 at 3:54 PM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
> > Add board-specific gpio node for Harmony and Seaboard. This lists the
> > GPIOs used by the board. Note that not all GPIOs that exist on the board
> > are listed; only those used by devices currently supported by device
> > tree.
>
> I don't want to bikeshed over this, but something like
> "nvidia,enabled-gpios" could be a bit more descriptive. Either way is
> OK though.
Yes, that's a much better name.
Existing board files do have a Boolean enabled/disabled flag per GPIO,
which is currently always true, whereas this patch series only implements
"enabled" entries. I thought about it briefly, and didn't think that
explicitly disabling GPIOs that the bootloader had already enabled was
likely to be useful. Do you agree? Possibly not since IIRC you added the
tables that contain that Boolean.
> The property should be documented under the bindings Documentation/
> hierarchy though.
Yup. The next posting will include this.
--
nvpublic
^ permalink raw reply
* RE: [RFC PATCH 06/12] arm/dt: Tegra: Add pinmux node
From: Stephen Warren @ 2011-08-15 16:41 UTC (permalink / raw)
To: Olof Johansson
Cc: Grant Likely, Colin Cross, Erik Gilling, Russell King,
Arnd Bergmann,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <CAOesGMheuUfSe1uUA6LxZ71V0-DR3XX7bEJqhVxJ-ZqrWWa1bA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
Olof Johansson wrote at Sunday, August 14, 2011 1:25 AM:
> On Fri, Aug 12, 2011 at 3:54 PM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
> > Add a pinmux node to tegra20.dtsi in order to instantiate the future
> > pinmux device. Add pinmux nodes to Harmony and Seaboard, which detail
> > the entire default pinmux configuration. This configuration is identical
> > to that in board-harmony/seaboard-pinmux.c.
>
> Again, documentation for the binding is needed.
Yes. It should have been there, but I screwed up.
> Seeing the table coded up now though, I wonder if it could make sense
> to flip it around? The number of functions multiplexed out are fewer
> than the pin groups (and this would be even more true on platforms
> that have per-pin configurations and/or smaller groups).
There are 116 pin groups and 61 functions, so this certainly would reduce
the size of the tree.
> I.e. something like:
>
> sdio4 {
> nvidia,pingroups = < DTA DTD >; // Not sure how to
> reference this though -- integers would be hard to read. DTA/DTD
> aren't valid values in the syntax.
> nvidia,pull-up
> },
>
> And any pingroups not covered by a function would be left alone
I'm personally inclined not to do this.
a) The HW registers are laid out such that each pingroup has various
properties, so the current binding represents that directly. That said,
inverting the table would contain exactly the same data, so this argument
is slightly tenuous/arbitrary, except that:
b) I think we'd still need tristate and pull properties per pin-group
either way; within a given special function, I see no reason for every
pingroup to need the same pull/tristate values (otherwise, I imagine the
Tegra HW designers would have lumped all the pins into a single pingroup
already). For example, an interface with data and control signals might
need pullups on control signals, but none on data.
c) Similar to that, a RSVD/NONE (or otherwise unused) function might be
used for a bunch of pingroups that are in fact used by GPIOs, and hence
only the pull/tristate values are relevant, since the GPIO controller
will actually control the data on the line. In this case, there's no
reason to assume that different pingroups that have the same function are
related in any way, and hence should have the same pull/tristate.
Given, b/c, we'd need an array of pull/tristate values per pingroup within
a given function, and I think the syntax for that would be sufficiently
complex that the binding in the current patchset makes more sense.
Do you agree?
> (one
> could easily define a few no-op functions to set pull up/down and
> tristate values on the unused groups).
The binding (and original pinmux code) does define RSVD1/2/3/4 functions
for the case where a pingroup should be programmed to an unused/quiescent
state. There's also a NONE function for the pingroups that don't support
muxing, but just pullup/down and tristate.
> [...]
>
> > + pinmux: pinmux@70000000 {
> > + ATA {
>
> I would prefer seeing these in lower case (since device tree tends to
> be no-caps). Should be easy to switch to strcasecmp in the code.
Sure.
> [...]
> > + CDEV2 {
> > + nvidia,function = "PLLP_OUT4";
>
> The string here is a bit unfortunate. It's really just used to map
> from the string to an integer anyway, with the reverse mapping being
> produced by the debugfs output. But especially if the function is
> flipped above, the different pingroups referenced might not use the
> same value for each function, so some sort of lookup will still be
> needed. Not much to do about, it seems. :(
I originally considered syntax like:
nvidia,function = <33>; // PLLP_OUT4
However, I figured this was problematic because:
a) Calculating the integers would be problematic; pinmux.h doesn't
currently list the integer for each value in enum tegra_mux_func, although
I suppose it and the binding documentation could easily be modified to do
so.
b) With just an integer, it's much harder to know what the value means.
c) With both the integer and comment, they can get out of sync if
incorrectly edited.
I'd be much more included to use integers if the *.dts files wer run
though the pre-processor, and hence defines could be used. I do observe
that Documentation/devicetree/booting-without-of.txt says:
It is also suggested that you pipe your source file through cpp (gcc
preprocessor) so you can use #include's, #define for constants, etc...
> > + nvidia,pull = "down";
>
> This should be done by discrete properties instead: nvidia,pull-up,
> nvidia-pull-down (and omitted means normal), without values.
OK.
--
nvpublic
^ permalink raw reply
* [PATCH] i2c: tegra: Check for overflow errors with BUG_ON.
From: Doug Anderson @ 2011-08-15 18:49 UTC (permalink / raw)
To: Ben Dooks, Stephen Warren, Vincent Palatin, Rhyland Klein
Cc: Jean Delvare, Rakesh Iyer, Doug Anderson, Lucas De Marchi,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
This change doesn't fix any known problems but turns
on the overflow detection feature of the i2c controller
in the hopes of flushing out any current (or future)
bugs in the i2c driver.
Inspired by a change on nvidia's git server:
http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=266d1b7397284505e55d06254b497cb32be07b69
Signed-off-by: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
drivers/i2c/busses/i2c-tegra.c | 11 ++++++++---
1 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 2440b74..4dbba23 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -367,7 +367,8 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
{
u32 status;
- const u32 status_err = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
+ const u32 status_err = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |
+ I2C_INT_TX_FIFO_OVERFLOW;
struct tegra_i2c_dev *i2c_dev = dev_id;
status = i2c_readl(i2c_dev, I2C_INT_STATUS);
@@ -389,6 +390,9 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
}
if (unlikely(status & status_err)) {
+ /* Don't pass this back--it can only happen due to a bug. */
+ BUG_ON(status & I2C_INT_TX_FIFO_OVERFLOW);
+
if (status & I2C_INT_NO_ACK)
i2c_dev->msg_err |= I2C_ERR_NO_ACK;
if (status & I2C_INT_ARBITRATION_LOST)
@@ -423,7 +427,7 @@ err:
/* An error occurred, mask all interrupts */
tegra_i2c_mask_irq(i2c_dev, I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |
I2C_INT_PACKET_XFER_COMPLETE | I2C_INT_TX_FIFO_DATA_REQ |
- I2C_INT_RX_FIFO_DATA_REQ);
+ I2C_INT_RX_FIFO_DATA_REQ | I2C_INT_TX_FIFO_OVERFLOW);
i2c_writel(i2c_dev, status, I2C_INT_STATUS);
if (i2c_dev->is_dvc)
dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
@@ -473,7 +477,8 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
if (!(msg->flags & I2C_M_RD))
tegra_i2c_fill_tx_fifo(i2c_dev);
- int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
+ int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |
+ I2C_INT_TX_FIFO_OVERFLOW;
if (msg->flags & I2C_M_RD)
int_mask |= I2C_INT_RX_FIFO_DATA_REQ;
else if (i2c_dev->msg_buf_remaining)
--
1.7.3.1
^ permalink raw reply related
* Re: [PATCH] i2c: tegra: Check for overflow errors with BUG_ON.
From: Felipe Balbi @ 2011-08-15 19:17 UTC (permalink / raw)
To: Doug Anderson
Cc: Ben Dooks, Stephen Warren, Vincent Palatin, Rhyland Klein,
Jean Delvare, Rakesh Iyer, Lucas De Marchi,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313434172-18319-1-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 1681 bytes --]
Hi,
On Mon, Aug 15, 2011 at 11:49:32AM -0700, Doug Anderson wrote:
> This change doesn't fix any known problems but turns
> on the overflow detection feature of the i2c controller
> in the hopes of flushing out any current (or future)
> bugs in the i2c driver.
>
> Inspired by a change on nvidia's git server:
> http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=266d1b7397284505e55d06254b497cb32be07b69
>
> Signed-off-by: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> ---
> drivers/i2c/busses/i2c-tegra.c | 11 ++++++++---
> 1 files changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
> index 2440b74..4dbba23 100644
> --- a/drivers/i2c/busses/i2c-tegra.c
> +++ b/drivers/i2c/busses/i2c-tegra.c
> @@ -367,7 +367,8 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
> static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
> {
> u32 status;
> - const u32 status_err = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
> + const u32 status_err = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |
> + I2C_INT_TX_FIFO_OVERFLOW;
> struct tegra_i2c_dev *i2c_dev = dev_id;
>
> status = i2c_readl(i2c_dev, I2C_INT_STATUS);
> @@ -389,6 +390,9 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
> }
>
> if (unlikely(status & status_err)) {
> + /* Don't pass this back--it can only happen due to a bug. */
> + BUG_ON(status & I2C_INT_TX_FIFO_OVERFLOW);
so due to a FIFO overflow you lock up the whole system ? Can't you e.g.
reset the controller and reconfigure it rather than locking up the
system ?
--
balbi
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^ permalink raw reply
* Re: [PATCH] i2c: tegra: Check for overflow errors with BUG_ON.
From: Doug Anderson @ 2011-08-15 19:52 UTC (permalink / raw)
To: balbi-l0cyMroinI0
Cc: Ben Dooks, Stephen Warren, Vincent Palatin, Rhyland Klein,
Jean Delvare, Rakesh Iyer, Lucas De Marchi,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20110815191745.GA7178-UiBtZHVXSwEVvW8u9ZQWYwjfymiNCTlR@public.gmane.org>
Felipe,
On Mon, Aug 15, 2011 at 12:17 PM, Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org> wrote:
> so due to a FIFO overflow you lock up the whole system ? Can't you e.g.
> reset the controller and reconfigure it rather than locking up the
> system ?
Certainly we could try to be more proactive and reset / retry / return
the error to the client. However, since the only expected situation
where this BUG_ON should hit is due to a bug in this driver itself
(AKA: i2c clients shouldn't be able to do anything to cause the BUG_ON
to hit), that seems like a lot of added complexity.
Also: if there is an arbitrary software bug that causing an overflow
condition to occur, I'm not sure how stable the system will be.
Specifically, the i2c controller is used (among other things) to talk
to the PMU and adjust voltages in the system. If we just sent it a
random command, I'd rather report the bug right away so we don't get
hard to find/reproduce failures in other parts of the system.
What do others think?
-Doug
^ permalink raw reply
* Re: [PATCH] i2c: tegra: Check for overflow errors with BUG_ON.
From: Felipe Balbi @ 2011-08-15 20:03 UTC (permalink / raw)
To: Doug Anderson
Cc: balbi, Ben Dooks, Stephen Warren, Vincent Palatin, Rhyland Klein,
Jean Delvare, Rakesh Iyer, Lucas De Marchi, linux-i2c,
linux-kernel, linux-tegra, linux-arm-kernel
In-Reply-To: <CAD=FV=Xd67iw=GXV9i4O5LKnJd20=BkYyfVuxPgxQ5GZRJEy4A@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1411 bytes --]
HI,
On Mon, Aug 15, 2011 at 12:52:36PM -0700, Doug Anderson wrote:
> Felipe,
>
> On Mon, Aug 15, 2011 at 12:17 PM, Felipe Balbi <balbi@ti.com> wrote:
> > so due to a FIFO overflow you lock up the whole system ? Can't you e.g.
> > reset the controller and reconfigure it rather than locking up the
> > system ?
>
> Certainly we could try to be more proactive and reset / retry / return
> the error to the client. However, since the only expected situation
> where this BUG_ON should hit is due to a bug in this driver itself
> (AKA: i2c clients shouldn't be able to do anything to cause the BUG_ON
> to hit), that seems like a lot of added complexity.
so at least just pass an error to the client, but hanging the entire
system seems a bit too much, dont you think ?
> Also: if there is an arbitrary software bug that causing an overflow
> condition to occur, I'm not sure how stable the system will be.
> Specifically, the i2c controller is used (among other things) to talk
> to the PMU and adjust voltages in the system. If we just sent it a
> random command, I'd rather report the bug right away so we don't get
> hard to find/reproduce failures in other parts of the system.
that's a good point, I still think that e.g. making a cellphone
unresponsive until a watchdog reset triggers just because you got a FIFO
overflow on the I2C controller is too much.
--
balbi
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^ permalink raw reply
* Re: [RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver
From: Jamie Iles @ 2011-08-15 20:07 UTC (permalink / raw)
To: Stephen Warren
Cc: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson,
Russell King, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313189697-21287-11-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Hi Stephen,
On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> arch/arm/mach-tegra/pinmux.c | 115 ++++++++++++++++++++++++++++++++++++++++++
> 1 files changed, 115 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
> index 05fa1a3..33246c2 100644
> --- a/arch/arm/mach-tegra/pinmux.c
> +++ b/arch/arm/mach-tegra/pinmux.c
> @@ -20,6 +20,7 @@
> #include <linux/errno.h>
> #include <linux/spinlock.h>
> #include <linux/io.h>
> +#include <linux/of.h>
> #include <linux/platform_device.h>
>
> #include <mach/iomap.h>
> @@ -147,6 +148,41 @@ static const char *func_name(enum tegra_mux_func func)
> return tegra_mux_names[func];
> }
>
[...]
>
> static const char *tri_name(unsigned long val)
> {
> @@ -666,15 +702,94 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
> }
> }
>
> +#ifdef CONFIG_OF
> +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> +{
> + int pg;
> +
> + for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> + const char *pg_name = pingroup_name(pg);
> + struct tegra_pingroup_config config;
> + struct device_node *pg_node;
> + int ret;
> + const char *s;
> +
> + pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> + pg_name);
> + if (pg_node == NULL)
> + continue;
> +
> + config.pingroup = pg;
> +
> + ret = of_property_read_string(pg_node, "nvidia,function", &s);
> + if (ret < 0) {
> + dev_err(&pdev->dev,
> + "%s: Missing property nvidia,function\n",
> + pg_name);
> + continue;
> + }
> + ret = func_enum(s, &config.func);
> + if (ret < 0) {
> + dev_err(&pdev->dev,
> + "%s: Invalid nvidia,function value %s\n",
> + pg_name, s);
> + continue;
> + }
> +
> + ret = of_property_read_string(pg_node, "nvidia,pull", &s);
> + if (ret >= 0) {
> + if (!strcmp(s, "up"))
> + config.pupd = TEGRA_PUPD_PULL_UP;
> + else if (!strcmp(s, "down"))
> + config.pupd = TEGRA_PUPD_PULL_DOWN;
> + else if (!strcmp(s, "normal"))
> + config.pupd = TEGRA_PUPD_NORMAL;
> + else {
> + dev_err(&pdev->dev,
> + "%s: Invalid nvidia,pull value %s\n",
> + pg_name, s);
> + continue;
> + }
> + } else
> + config.pupd = TEGRA_PUPD_NORMAL;
> +
> + if (of_find_property(pg_node, "nvidia,tristate", NULL))
> + config.tristate = TEGRA_TRI_TRISTATE;
> + else
> + config.tristate = TEGRA_TRI_NORMAL;
> +
> + dev_err(&pdev->dev, "%s: func %d (%s) pull %d tri %d\n",
> + pg_name, config.func, func_name(config.func),
> + config.pupd, config.tristate);
> +
> + tegra_pinmux_config_pingroup(&config);
> +
> + of_node_put(pg_node);
> + }
> +}
I need to implement DT muxing configuration for my platform, and I believe
that what you have here would work fine for me too, and to avoid duplicating
the same thing, I wonder if this could be a little more generic.
So if the platform specific pinmux driver called the pinmux parser with a
callback for a pingroup configuration function then this wouldn't need the
nvidia specific properties. I'd envisage the setup callback to be something
like:
int pingroup_configure(const char *name, unsigned long flags);
where the flags would be a bitmask of properties, so:
PINMUX_F_TRISTATE
PINMUX_F_PUPD
etc
which would map to pinmux,tristate properties etc. The tegra (or
picoxcell...) specific driver would then map any regs and setup the
pinmux tables and call the parser loop with the correct callback. This
would require looping over the child nodes as we've discussed before,
and the decoding of the func_enum in the nvidia driver, but I think
that's okay.
Jamie
^ permalink raw reply
* [RFC PATCH v2 00/13] arm/tegra: Initialize GPIO & pinmux from DT
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Arnd Bergmann,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Belisko Marek, Jamie Iles,
Shawn Guo, Sergei Shtylyov, Stephen Warren
v2:
* Enhanced pinmux code to handle "drive pingroups" as well as "mux
pingroups". This altered the pinmux binding a little; shifting each
type of pingroup into a sub-node in the pinmux node.
* Enumerate pingroups by enumerating DT child nodes, and mapping them to
pingroups, rather than the other way around. Hence also removed
modifications to <linux/of.h> and drivers/of/base.c.
* Included documentation of the bindings.
* Represent pingroup names and function names, as lower case in DT.
* Used a better name for GPIO binding GPIO list.
* Switched to boolean properties for pinmux pull-up/down.
* s/dev_err/dev_dbg/ in DT parsing debug code.
* Various minor cleanups (e.g. typos, white-space).
This patch modifies Tegra's device tree support to remove the dependency
on harmony_pinmux_init(), thus making it completely board-independent.
Some notes:
* This series is built on top of linux-next with a bunch of patches
applied, in particular the removal of irq_to_gpio and custom gpio_to_irq
that I'm in the process of sending to Russell. I haven't yet thought
through how/where to merge this without causing all kinds of conflicts.
* I took care to preserve bisectability of Tegra DT support. However,
linux-next doesn't yet have entirely useful Tegra DT support; some stuff
from Grant's devicetree/next hasn't been pushed into linux-next yet. If
we don't care about bisectability, I can remove a couple commits and
possibly squash some others.
* The approach taken here is to have a custom semantic SoC-specific
binding for each the gpio and pinmux drivers. Other alternatives
suggested included:
1) A generic "list of register writes" to be performed at boot. This has
the advantage of reusability across different SoCs. However, this
approach isn't semantic, and requires detailed knowledge of pinmux
registers and potentially fiddly calculations when constructing the
device tree.
2) The ability to define disabled child nodes of the pinmux controller
that are not processed by tegra_pinmux_probe_dt(). Other devices may
refer to those using phandles, and later enable/disable them, thus
representing dynamic pinmuxing in the device tree. I wasn't convinced
whether we should represent dynamic pinmuxing using phandles.
I discussed in more detail why I prefer the current proposal in various
email threads.
Thanks for reading!
Stephen Warren (13):
arm/tegra: Prep boards for gpio/pinmux conversion to pdevs
arm/tegra: Avoid duplicate gpio/pinmux devices with dt
arm/tegra: board-dt: Add AUXDATA for tegra-gpio and tegra-pinmux
docs/dt: Document nvidia,tegra20-gpio's nvidia,enabled-gpios property
arm/dt: Tegra: Add nvidia,gpios property to GPIO controller
docs/dt: Document nvidia,tegra20-pinmux binding
arm/dt: Tegra: Add pinmux node
gpio/tegra: Convert to a platform device
gpio/tegra: Add device tree support
arm/tegra: Convert pinmux driver to a platform device
arm/tegra: Add device tree support to pinmux driver
arm/tegra: board-dt: Remove dependency on non-dt pinmux functions
arm/tegra: Remove temporary gpio/pinmux registration workaround
.../devicetree/bindings/gpio/gpio_nvidia.txt | 20 +
.../devicetree/bindings/pinmux/pinmux_nvidia.txt | 294 ++++++++++++
arch/arm/boot/dts/tegra-harmony.dts | 483 ++++++++++++++++++++
arch/arm/boot/dts/tegra-seaboard.dts | 421 +++++++++++++++++
arch/arm/boot/dts/tegra20.dtsi | 5 +
arch/arm/mach-tegra/Makefile | 1 -
arch/arm/mach-tegra/board-dt.c | 12 +-
arch/arm/mach-tegra/board-harmony-pinmux.c | 8 +
arch/arm/mach-tegra/board-paz00-pinmux.c | 8 +
arch/arm/mach-tegra/board-seaboard-pinmux.c | 9 +-
arch/arm/mach-tegra/board-trimslice-pinmux.c | 7 +
arch/arm/mach-tegra/devices.c | 10 +
arch/arm/mach-tegra/devices.h | 2 +
arch/arm/mach-tegra/pinmux.c | 269 +++++++++++
drivers/gpio/gpio-tegra.c | 57 ++-
15 files changed, 1582 insertions(+), 24 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt
^ permalink raw reply
* [RFC PATCH v2 01/13] arm/tegra: Prep boards for gpio/pinmux conversion to pdevs
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Sergei Shtylyov, Belisko Marek,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313440100-17131-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The Tegra GPIO driver will be converted from static registration via
postcore_initcall() to be a platform device later in this patch series.
A new Tegra pinmux platform device will also be added.
Prepare for this by modifying all boards to register the appropriate
platform devices before-hand, so that when the drivers are converted,
those devices will be probed, and git bisectability will be maintained.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/mach-tegra/board-harmony-pinmux.c | 8 ++++++++
arch/arm/mach-tegra/board-paz00-pinmux.c | 8 ++++++++
arch/arm/mach-tegra/board-seaboard-pinmux.c | 9 +++++++--
arch/arm/mach-tegra/board-trimslice-pinmux.c | 7 +++++++
arch/arm/mach-tegra/devices.c | 10 ++++++++++
arch/arm/mach-tegra/devices.h | 2 ++
6 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 4d63e2e..e99b456 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -20,6 +20,7 @@
#include "gpio-names.h"
#include "board-harmony.h"
+#include "devices.h"
static struct tegra_pingroup_config harmony_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -140,6 +141,11 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
};
+static struct platform_device *pinmux_devices[] = {
+ &tegra_gpio_device,
+ &tegra_pinmux_device,
+};
+
static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
{ .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
@@ -155,6 +161,8 @@ static struct tegra_gpio_table gpio_table[] = {
void harmony_pinmux_init(void)
{
+ platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+
tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index bdd2627..43633f4 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -20,6 +20,7 @@
#include "gpio-names.h"
#include "board-paz00.h"
+#include "devices.h"
static struct tegra_pingroup_config paz00_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -140,6 +141,11 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
};
+static struct platform_device *pinmux_devices[] = {
+ &tegra_gpio_device,
+ &tegra_pinmux_device,
+};
+
static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
{ .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
@@ -149,6 +155,8 @@ static struct tegra_gpio_table gpio_table[] = {
void paz00_pinmux_init(void)
{
+ platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+
tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index 74f78b7..f092298 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -21,6 +21,7 @@
#include "gpio-names.h"
#include "board-seaboard.h"
+#include "devices.h"
#define DEFAULT_DRIVE(_name) \
{ \
@@ -157,8 +158,10 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
};
-
-
+static struct platform_device *pinmux_devices[] = {
+ &tegra_gpio_device,
+ &tegra_pinmux_device,
+};
static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
@@ -173,6 +176,8 @@ static struct tegra_gpio_table gpio_table[] = {
void __init seaboard_pinmux_init(void)
{
+ platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+
tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
tegra_drive_pinmux_config_table(seaboard_drive_pinmux,
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index bcb1916..4969dd2 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -21,6 +21,7 @@
#include "gpio-names.h"
#include "board-trimslice.h"
+#include "devices.h"
static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -141,6 +142,11 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
};
+static struct platform_device *pinmux_devices[] = {
+ &tegra_gpio_device,
+ &tegra_pinmux_device,
+};
+
static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
{ .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
@@ -151,6 +157,7 @@ static struct tegra_gpio_table gpio_table[] = {
void __init trimslice_pinmux_init(void)
{
+ platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
}
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 57e35d2..48262bf 100644
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -31,6 +31,16 @@
#include <mach/usb_phy.h>
#include "gpio-names.h"
+struct platform_device tegra_gpio_device = {
+ .name = "tegra-gpio",
+ .id = -1,
+};
+
+struct platform_device tegra_pinmux_device = {
+ .name = "tegra-pinmux",
+ .id = -1,
+};
+
static struct resource i2c_resource1[] = {
[0] = {
.start = INT_I2C,
diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h
index 4a7dc0a..873ecb2 100644
--- a/arch/arm/mach-tegra/devices.h
+++ b/arch/arm/mach-tegra/devices.h
@@ -21,6 +21,8 @@
#include <linux/platform_device.h>
+extern struct platform_device tegra_gpio_device;
+extern struct platform_device tegra_pinmux_device;
extern struct platform_device tegra_sdhci_device1;
extern struct platform_device tegra_sdhci_device2;
extern struct platform_device tegra_sdhci_device3;
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 02/13] arm/tegra: Avoid duplicate gpio/pinmux devices with dt
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Arnd Bergmann, devicetree-discuss, linux-tegra,
linux-arm-kernel, linux-kernel, Belisko Marek, Jamie Iles,
Shawn Guo, Sergei Shtylyov, Stephen Warren
In-Reply-To: <1313440100-17131-1-git-send-email-swarren@nvidia.com>
A future change will set up gpio and pinmux platform device registration
in device-tree files, via board-dt.c. When board-dt.c calls into
harmony/seaboard_pinmux_init(), this will cause a duplicate registration
of those platform devices, which will cause kernel boot failure.
To solve this, modify harmony/seaboard_pinmux_init() so that they only
register the platform devices when actually running on Harmony/Seaboard;
when board-dt.c is in use, a different machine type is used.
This change is a temporary measure to ensure git bisectability. It will
be reverted when board-dt.c no longer calls harmony/seaboard_pinmux_init().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/mach-tegra/board-harmony-pinmux.c | 5 ++++-
arch/arm/mach-tegra/board-seaboard-pinmux.c | 5 ++++-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index e99b456..130018d 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -14,6 +14,8 @@
*
*/
+#include <asm/mach-types.h>
+
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <mach/pinmux.h>
@@ -161,7 +163,8 @@ static struct tegra_gpio_table gpio_table[] = {
void harmony_pinmux_init(void)
{
- platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+ if (machine_is_harmony())
+ platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index f092298..bc4dc17 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -12,6 +12,8 @@
*
*/
+#include <asm/mach-types.h>
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
@@ -176,7 +178,8 @@ static struct tegra_gpio_table gpio_table[] = {
void __init seaboard_pinmux_init(void)
{
- platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+ if (machine_is_seaboard())
+ platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 03/13] arm/tegra: board-dt: Add AUXDATA for tegra-gpio and tegra-pinmux
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Sergei Shtylyov, Belisko Marek,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313440100-17131-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Add AUXDATA so that Tegra GPIO and pinmux devices that are instantiated
from device-tree are named consistently with the static platform devices
in mach-tegra/devices.c. Note that the device-tree file tegra20.dtsi
already includes a node for the Tegra GPIO controller, whereas the node
for the Tegra pinmux controller will be added in a subsequent commit.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/mach-tegra/board-dt.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index 9f47e04..1995b79 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -50,6 +50,8 @@ void seaboard_pinmux_init(void);
struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE, "tegra-pinmux", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 04/13] docs/dt: Document nvidia, tegra20-gpio's nvidia, enabled-gpios property
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Sergei Shtylyov, Belisko Marek,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313440100-17131-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
.../devicetree/bindings/gpio/gpio_nvidia.txt | 20 ++++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
index eb4b530..b22fff3 100644
--- a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
@@ -6,3 +6,23 @@ Required properties:
second cell is used to specify optional parameters:
- bit 0 specifies polarity (0 for normal, 1 for inverted)
- gpio-controller : Marks the device node as a GPIO controller.
+
+Optional properties:
+- nvidia,enabled-gpios : The list of GPIOs that should be controlled by the
+ GPIO controller rather than the pinmux controller.
+
+Example of a gpio-controller node:
+
+ gpio: gpio@6000d000 {
+ compatible = "nvidia,tegra20-gpio";
+ reg = < 0x6000d000 0x1000 >;
+ interrupts = < 64 65 66 67 87 119 121 >;
+ #gpio-cells = <2>;
+ gpio-controller;
+ nvidia,enabled-gpios = <
+ 69 // TEGRA_GPIO_PI5 SD2_CD
+ 57 // TEGRA_GPIO_PH1 SD2_WP
+ 155 // TEGRA_GPIO_PT3 SD2_POWER
+ >;
+ };
+
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 05/13] arm/dt: Tegra: Add nvidia, gpios property to GPIO controller
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Sergei Shtylyov, Belisko Marek,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313440100-17131-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Add board-specific gpio node for Harmony and Seaboard. This lists the
GPIOs used by the board. Note that not all GPIOs that exist on the board
are listed; only those used by devices currently supported by device
tree.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra-harmony.dts | 15 +++++++++++++++
arch/arm/boot/dts/tegra-seaboard.dts | 8 ++++++++
2 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 4c05334..d680707 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -15,6 +15,21 @@
reg = < 0x00000000 0x40000000 >;
};
+ gpio: gpio@6000d000 {
+ nvidia,enabled-gpios = <
+ 69 // TEGRA_GPIO_PI5 SD2_CD
+ 57 // TEGRA_GPIO_PH1 SD2_WP
+ 155 // TEGRA_GPIO_PT3 SD2_POWER
+ 58 // TEGRA_GPIO_PH2 SD4_CD
+ 59 // TEGRA_GPIO_PH3 SD4_WP
+ 70 // TEGRA_GPIO_PI6 SD4_POWER
+ 187 // TEGRA_GPIO_PX3 CDC_IRQ
+ 178 // TEGRA_GPIO_PW2 HP_DET
+ 184 // TEGRA_GPIO_PX0 INT_MIC_EN
+ 185 // TEGRA_GPIO_PX1 EXT_MIC_EN
+ >;
+ };
+
i2c@7000c000 {
clock-frequency = <400000>;
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 1940cae..43c8b2c 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -16,6 +16,14 @@
reg = < 0x00000000 0x40000000 >;
};
+ gpio: gpio@6000d000 {
+ nvidia,enabled-gpios = <
+ 69 // TEGRA_GPIO_PI5 SD2_CD
+ 57 // TEGRA_GPIO_PH1 SD2_WP
+ 70 // TEGRA_GPIO_PI6 SD2_POWER
+ >;
+ };
+
serial@70006300 {
clock-frequency = < 216000000 >;
};
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 06/13] docs/dt: Document nvidia,tegra20-pinmux binding
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Sergei Shtylyov, Belisko Marek,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313440100-17131-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
.../devicetree/bindings/pinmux/pinmux_nvidia.txt | 294 ++++++++++++++++++++
1 files changed, 294 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt
diff --git a/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt b/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt
new file mode 100644
index 0000000..744e1b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt
@@ -0,0 +1,294 @@
+NVIDIA Tegra 2 pinmux controller
+
+Required properties:
+- compatible : "nvidia,tegra20-pinmux"
+
+Optional sub-nodes:
+- nvidia,mux-groups : Mux group settings; see below.
+- nvidia,drive-groups : Drive group settings; see below.
+
+nvidia,mux-groups sub-node:
+
+Each mux pin group is represented as a sub-node of the nvidia,mux-groups node.
+The name of the sub-node should be the name of the mux pingroup. The following
+names are valid:
+
+ ata
+ atb
+ atc
+ atd
+ ate
+ cdev1
+ cdev2
+ crtp
+ csus
+ dap1
+ dap2
+ dap3
+ dap4
+ ddc
+ dta
+ dtb
+ dtc
+ dtd
+ dte
+ dtf
+ gma
+ gmb
+ gmc
+ gmd
+ gme
+ gpu
+ gpu7
+ gpv
+ hdint
+ i2cp
+ irrx
+ irtx
+ kbca
+ kbcb
+ kbcc
+ kbcd
+ kbce
+ kbcf
+ lcsn
+ ld0
+ ld1
+ ld10
+ ld11
+ ld12
+ ld13
+ ld14
+ ld15
+ ld16
+ ld17
+ ld2
+ ld3
+ ld4
+ ld5
+ ld6
+ ld7
+ ld8
+ ld9
+ ldc
+ ldi
+ lhp0
+ lhp1
+ lhp2
+ lhs
+ lm0
+ lm1
+ lpp
+ lpw0
+ lpw1
+ lpw2
+ lsc0
+ lsc1
+ lsck
+ lsda
+ lsdi
+ lspi
+ lvp0
+ lvp1
+ lvs
+ owc
+ pmc
+ pta
+ rm
+ sdb
+ sdc
+ sdd
+ sdio1
+ slxa
+ slxc
+ slxd
+ slxk
+ spdi
+ spdo
+ spia
+ spib
+ spic
+ spid
+ spie
+ spif
+ spig
+ spih
+ uaa
+ uab
+ uac
+ uad
+ uca
+ ucb
+ uda
+ ck32
+ ddrc
+ pmca
+ pmcb
+ pmcc
+ pmcd
+ pmce
+ xm2c
+ xm2d
+
+Required subnode-properties:
+- nvidia,function : A string containing the name of the pinmux function to
+ mux to the pingroup. The following names are valid; see the Tegra TRM to
+ determine which are valid for each pingroup:
+
+ none (used for pingroups without muxing functionality)
+ ahb_clk
+ apb_clk
+ audio_sync
+ crt
+ dap1
+ dap2
+ dap3
+ dap4
+ dap5
+ displaya
+ displayb
+ emc_test0_dll
+ emc_test1_dll
+ gmi
+ gmi_int
+ hdmi
+ i2c
+ i2c2
+ i2c3
+ ide
+ irda
+ kbc
+ mio
+ mipi_hs
+ nand
+ osc
+ owr
+ pcie
+ plla_out
+ pllc_out1
+ pllm_out1
+ pllp_out2
+ pllp_out3
+ pllp_out4
+ pwm
+ pwr_intr
+ pwr_on
+ rtck
+ sdio1
+ sdio2
+ sdio3
+ sdio4
+ sflash
+ spdif
+ spi1
+ spi2
+ spi2_alt
+ spi3
+ spi4
+ trace
+ twc
+ uarta
+ uartb
+ uartc
+ uartd
+ uarte
+ ulpi
+ vi
+ vi_sensor_clk
+ xio
+
+optional subnode-properties:
+- nvidia,pull-up : Boolean, apply Tegra's internal pull-up to the pin.
+- nvidia,pull-down : Boolean, apply Tegra's internal pull-down to the pin.
+- nvidia,tristate : Boolean, tristate the pin. Otherwise, drive it.
+
+If both nvidia,pull-up and nvidia,pull-down are specified, nvidia,pull-up
+takes precedence.
+
+nvidia,drive-groups sub-node:
+
+Each drive pin group is represented as a sub-node of the nvidia,drive-groups
+node. The name of the sub-node should be the name of the drive pingroup. The
+following names are valid:
+
+ ao1
+ ao2
+ at1
+ at2
+ cdev1
+ cdev2
+ csus
+ dap1
+ dap2
+ dap3
+ dap4
+ dbg
+ lcd1
+ lcd2
+ sdmmc2
+ sdmmc3
+ spi
+ uaa
+ uab
+ uart2
+ uart3
+ vi1
+ vi2
+ xm2a
+ xm2c
+ xm2d
+ xm2clk
+ memcomp
+ sdio1
+ crt
+ ddc
+ gma
+ gmb
+ gmc
+ gmd
+ gme
+ owr
+ uad
+
+Required subnode-properties:
+- nvidia,high-speed-mode : Boolean, enable high speed mode the pins.
+- nvidia,schmitt : Boolean, enables Schmitt Trigger on the input.
+- nvidia,drive-power : Integer, valid values 0-3. 0 is least power, 3 is
+ most power. Controls the drive power or current. See "Low Power Mode"
+ or "LPMD1" and "LPMD0" in the Tegra TRM.
+- nvidia,pull-down-strength : Integer, valid values 0-31. Controls drive
+ strength. See "CAL_DRVDN" in the Tegra TRM.
+- nvidia,pull-up-strength : Integer, valid values 0-31. Controls drive
+ strength. See "CAL_DRVUP" in the Tegra TRM.
+- nvidia,slew_rate-rising : Integer, valid values 0-3. 0 is fastest, 3 is
+ slowest. See "DRVUP_SLWR" in the Tegra TRM.
+- nvidia,slew_rate-falling : Integer, valid values 0-3. 0 is fastest, 3 is
+ slowest. See "DRVDN_SLWR" in the Tegra TRM.
+
+Example of a gpio-controller node:
+
+ pinmux: pinmux@70000000 {
+ compatible = "nvidia,tegra20-pinmux";
+ reg = < 0x70000000 0xc00 >;
+ nvidia,mux-groups {
+ cdev1 {
+ nvidia,function = "plla_out";
+ };
+ cdev2 {
+ nvidia,function = "pllp_out4";
+ nvidia,pull-down;
+ nvidia,tristate;
+ };
+ };
+ nvidia,drive-groups {
+ sdio1 {
+ nvidia,schmitt;
+ nvidia,drive-power = <1>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <3>;
+ nvidia,slew-rate-falling = <3>;
+ };
+ };
+ };
+
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 07/13] arm/dt: Tegra: Add pinmux node
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Sergei Shtylyov, Belisko Marek,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313440100-17131-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Add a pinmux node to tegra20.dtsi in order to instantiate the future
pinmux device. Add pinmux nodes to Harmony and Seaboard, which detail
the entire initial pinmux configuration. This configuration is identical
to that in board-harmony/seaboard-pinmux.c.
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra-harmony.dts | 468 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/tegra-seaboard.dts | 413 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/tegra20.dtsi | 5 +
3 files changed, 886 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index d680707..e84a7fa 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -30,6 +30,474 @@
>;
};
+ pinmux: pinmux@70000000 {
+ nvidia,mux-groups {
+ ata {
+ nvidia,function = "ide";
+ };
+ atb {
+ nvidia,function = "sdio4";
+ };
+ atc {
+ nvidia,function = "nand";
+ };
+ atd {
+ nvidia,function = "gmi";
+ };
+ ate {
+ nvidia,function = "gmi";
+ };
+ cdev1 {
+ nvidia,function = "plla_out";
+ };
+ cdev2 {
+ nvidia,function = "pllp_out4";
+ nvidia,pull-down;
+ nvidia,tristate;
+ };
+ crtp {
+ nvidia,function = "crt";
+ nvidia,tristate;
+ };
+ csus {
+ nvidia,function = "vi_sensor_clk";
+ nvidia,pull-down;
+ nvidia,tristate;
+ };
+ dap1 {
+ nvidia,function = "dap1";
+ };
+ dap2 {
+ nvidia,function = "dap2";
+ nvidia,tristate;
+ };
+ dap3 {
+ nvidia,function = "dap3";
+ nvidia,tristate;
+ };
+ dap4 {
+ nvidia,function = "dap4";
+ nvidia,tristate;
+ };
+ ddc {
+ nvidia,function = "i2c2";
+ nvidia,pull-up;
+ };
+ dta {
+ nvidia,function = "sdio2";
+ nvidia,pull-up;
+ };
+ dtb {
+ nvidia,function = "rsvd1";
+ };
+ dtc {
+ nvidia,function = "rsvd1";
+ nvidia,tristate;
+ };
+ dtd {
+ nvidia,function = "sdio2";
+ nvidia,pull-up;
+ };
+ dte {
+ nvidia,function = "rsvd1";
+ nvidia,tristate;
+ };
+ dtf {
+ nvidia,function = "i2c3";
+ nvidia,tristate;
+ };
+ gma {
+ nvidia,function = "sdio4";
+ };
+ gmb {
+ nvidia,function = "gmi";
+ };
+ gmc {
+ nvidia,function = "uartd";
+ };
+ gmd {
+ nvidia,function = "gmi";
+ };
+ gme {
+ nvidia,function = "sdio4";
+ };
+ gpu {
+ nvidia,function = "gmi";
+ nvidia,tristate;
+ };
+ gpu7 {
+ nvidia,function = "rtck";
+ };
+ gpv {
+ nvidia,function = "pcie";
+ nvidia,tristate;
+ };
+ hdint {
+ nvidia,function = "hdmi";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ i2cp {
+ nvidia,function = "i2c";
+ };
+ irrx {
+ nvidia,function = "uarta";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ irtx {
+ nvidia,function = "uarta";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ kbca {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbcb {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbcc {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbcd {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbce {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbcf {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ lcsn {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ ld0 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld1 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld10 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld11 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld12 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld13 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld14 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld15 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld16 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld17 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld2 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld3 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld4 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld5 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld6 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld7 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld8 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ld9 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ ldc {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ ldi {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ lhp0 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ lhp1 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ lhp2 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ lhs {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ };
+ lm0 {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ };
+ lm1 {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ lpp {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ lpw0 {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ };
+ lpw1 {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ lpw2 {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ };
+ lsc0 {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ };
+ lsc1 {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ lsck {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ lsda {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ lsdi {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ lspi {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ };
+ lvp0 {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ lvp1 {
+ nvidia,function = "displaya";
+ nvidia,pull-down;
+ };
+ lvs {
+ nvidia,function = "displaya";
+ nvidia,pull-up;
+ };
+ owc {
+ nvidia,function = "rsvd2";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ pmc {
+ nvidia,function = "pwr_on";
+ };
+ pta {
+ nvidia,function = "hdmi";
+ };
+ rm {
+ nvidia,function = "i2c";
+ };
+ sdb {
+ nvidia,function = "pwm";
+ nvidia,tristate;
+ };
+ sdc {
+ nvidia,function = "pwm";
+ nvidia,pull-up;
+ };
+ sdd {
+ nvidia,function = "pwm";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ sdio1 {
+ nvidia,function = "sdio1";
+ nvidia,tristate;
+ };
+ slxa {
+ nvidia,function = "pcie";
+ nvidia,tristate;
+ };
+ slxc {
+ nvidia,function = "spdif";
+ nvidia,tristate;
+ };
+ slxd {
+ nvidia,function = "spdif";
+ nvidia,tristate;
+ };
+ slxk {
+ nvidia,function = "pcie";
+ nvidia,tristate;
+ };
+ spdi {
+ nvidia,function = "rsvd2";
+ nvidia,tristate;
+ };
+ spdo {
+ nvidia,function = "rsvd2";
+ nvidia,tristate;
+ };
+ spia {
+ nvidia,function = "gmi";
+ };
+ spib {
+ nvidia,function = "gmi";
+ };
+ spic {
+ nvidia,function = "gmi";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ spid {
+ nvidia,function = "spi1";
+ nvidia,pull-down;
+ nvidia,tristate;
+ };
+ spie {
+ nvidia,function = "spi1";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ spif {
+ nvidia,function = "spi1";
+ nvidia,pull-down;
+ nvidia,tristate;
+ };
+ spig {
+ nvidia,function = "spi2_alt";
+ nvidia,tristate;
+ };
+ spih {
+ nvidia,function = "spi2_alt";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ uaa {
+ nvidia,function = "ulpi";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ uab {
+ nvidia,function = "ulpi";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ uac {
+ nvidia,function = "rsvd2";
+ nvidia,tristate;
+ };
+ uad {
+ nvidia,function = "irda";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ uca {
+ nvidia,function = "uartc";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ ucb {
+ nvidia,function = "uartc";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ uda {
+ nvidia,function = "ulpi";
+ nvidia,tristate;
+ };
+ ck32 {
+ nvidia,function = "none";
+ };
+ ddrc {
+ nvidia,function = "none";
+ };
+ pmca {
+ nvidia,function = "none";
+ };
+ pmcb {
+ nvidia,function = "none";
+ };
+ pmcc {
+ nvidia,function = "none";
+ };
+ pmcd {
+ nvidia,function = "none";
+ };
+ pmce {
+ nvidia,function = "none";
+ };
+ xm2c {
+ nvidia,function = "none";
+ };
+ xm2d {
+ nvidia,function = "none";
+ };
+ };
+ nvidia,drive-groups {
+ };
+ };
+
i2c@7000c000 {
clock-frequency = <400000>;
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 43c8b2c..29114b7 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -24,6 +24,419 @@
>;
};
+ pinmux: pinmux@70000000 {
+ nvidia,mux-groups {
+ ata {
+ nvidia,function = "ide";
+ };
+ atb {
+ nvidia,function = "sdio4";
+ };
+ atc {
+ nvidia,function = "nand";
+ };
+ atd {
+ nvidia,function = "gmi";
+ };
+ ate {
+ nvidia,function = "gmi";
+ nvidia,tristate;
+ };
+ cdev1 {
+ nvidia,function = "plla_out";
+ };
+ cdev2 {
+ nvidia,function = "pllp_out4";
+ };
+ crtp {
+ nvidia,function = "crt";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ csus {
+ nvidia,function = "vi_sensor_clk";
+ nvidia,tristate;
+ };
+ dap1 {
+ nvidia,function = "dap1";
+ };
+ dap2 {
+ nvidia,function = "dap2";
+ };
+ dap3 {
+ nvidia,function = "dap3";
+ nvidia,tristate;
+ };
+ dap4 {
+ nvidia,function = "dap4";
+ };
+ ddc {
+ nvidia,function = "rsvd2";
+ nvidia,tristate;
+ };
+ dta {
+ nvidia,function = "vi";
+ nvidia,pull-down;
+ };
+ dtb {
+ nvidia,function = "vi";
+ nvidia,pull-down;
+ };
+ dtc {
+ nvidia,function = "vi";
+ nvidia,pull-down;
+ };
+ dtd {
+ nvidia,function = "vi";
+ nvidia,pull-down;
+ };
+ dte {
+ nvidia,function = "vi";
+ nvidia,pull-down;
+ nvidia,tristate;
+ };
+ dtf {
+ nvidia,function = "i2c3";
+ };
+ gma {
+ nvidia,function = "sdio4";
+ };
+ gmb {
+ nvidia,function = "gmi";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ gmc {
+ nvidia,function = "uartd";
+ };
+ gmd {
+ nvidia,function = "sflash";
+ };
+ gme {
+ nvidia,function = "sdio4";
+ };
+ gpu {
+ nvidia,function = "pwm";
+ };
+ gpu7 {
+ nvidia,function = "rtck";
+ };
+ gpv {
+ nvidia,function = "pcie";
+ nvidia,tristate;
+ };
+ hdint {
+ nvidia,function = "hdmi";
+ nvidia,tristate;
+ };
+ i2cp {
+ nvidia,function = "i2c";
+ };
+ irrx {
+ nvidia,function = "uartb";
+ };
+ irtx {
+ nvidia,function = "uartb";
+ };
+ kbca {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbcb {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbcc {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbcd {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbce {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ kbcf {
+ nvidia,function = "kbc";
+ nvidia,pull-up;
+ };
+ lcsn {
+ nvidia,function = "rsvd4";
+ nvidia,tristate;
+ };
+ ld0 {
+ nvidia,function = "displaya";
+ };
+ ld1 {
+ nvidia,function = "displaya";
+ };
+ ld10 {
+ nvidia,function = "displaya";
+ };
+ ld11 {
+ nvidia,function = "displaya";
+ };
+ ld12 {
+ nvidia,function = "displaya";
+ };
+ ld13 {
+ nvidia,function = "displaya";
+ };
+ ld14 {
+ nvidia,function = "displaya";
+ };
+ ld15 {
+ nvidia,function = "displaya";
+ };
+ ld16 {
+ nvidia,function = "displaya";
+ };
+ ld17 {
+ nvidia,function = "displaya";
+ };
+ ld2 {
+ nvidia,function = "displaya";
+ };
+ ld3 {
+ nvidia,function = "displaya";
+ };
+ ld4 {
+ nvidia,function = "displaya";
+ };
+ ld5 {
+ nvidia,function = "displaya";
+ };
+ ld6 {
+ nvidia,function = "displaya";
+ };
+ ld7 {
+ nvidia,function = "displaya";
+ };
+ ld8 {
+ nvidia,function = "displaya";
+ };
+ ld9 {
+ nvidia,function = "displaya";
+ };
+ ldc {
+ nvidia,function = "rsvd4";
+ nvidia,tristate;
+ };
+ ldi {
+ nvidia,function = "displaya";
+ };
+ lhp0 {
+ nvidia,function = "displaya";
+ };
+ lhp1 {
+ nvidia,function = "displaya";
+ };
+ lhp2 {
+ nvidia,function = "displaya";
+ };
+ lhs {
+ nvidia,function = "displaya";
+ };
+ lm0 {
+ nvidia,function = "rsvd4";
+ };
+ lm1 {
+ nvidia,function = "crt";
+ nvidia,tristate;
+ };
+ lpp {
+ nvidia,function = "displaya";
+ };
+ lpw0 {
+ nvidia,function = "hdmi";
+ };
+ lpw1 {
+ nvidia,function = "rsvd4";
+ nvidia,tristate;
+ };
+ lpw2 {
+ nvidia,function = "hdmi";
+ };
+ lsc0 {
+ nvidia,function = "displaya";
+ };
+ lsc1 {
+ nvidia,function = "hdmi";
+ nvidia,tristate;
+ };
+ lsck {
+ nvidia,function = "hdmi";
+ nvidia,tristate;
+ };
+ lsda {
+ nvidia,function = "hdmi";
+ nvidia,tristate;
+ };
+ lsdi {
+ nvidia,function = "rsvd4";
+ nvidia,tristate;
+ };
+ lspi {
+ nvidia,function = "displaya";
+ };
+ lvp0 {
+ nvidia,function = "rsvd4";
+ nvidia,tristate;
+ };
+ lvp1 {
+ nvidia,function = "displaya";
+ };
+ lvs {
+ nvidia,function = "displaya";
+ };
+ owc {
+ nvidia,function = "rsvd2";
+ nvidia,tristate;
+ };
+ pmc {
+ nvidia,function = "pwr_on";
+ };
+ pta {
+ nvidia,function = "hdmi";
+ };
+ rm {
+ nvidia,function = "i2c";
+ };
+ sdb {
+ nvidia,function = "sdio3";
+ };
+ sdc {
+ nvidia,function = "sdio3";
+ };
+ sdd {
+ nvidia,function = "sdio3";
+ };
+ sdio1 {
+ nvidia,function = "sdio1";
+ nvidia,pull-up;
+ };
+ slxa {
+ nvidia,function = "pcie";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ slxc {
+ nvidia,function = "spdif";
+ nvidia,tristate;
+ };
+ slxd {
+ nvidia,function = "spdif";
+ };
+ slxk {
+ nvidia,function = "pcie";
+ };
+ spdi {
+ nvidia,function = "rsvd2";
+ };
+ spdo {
+ nvidia,function = "rsvd2";
+ };
+ spia {
+ nvidia,function = "gmi";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ spib {
+ nvidia,function = "gmi";
+ nvidia,tristate;
+ };
+ spic {
+ nvidia,function = "gmi";
+ nvidia,pull-up;
+ };
+ spid {
+ nvidia,function = "spi1";
+ nvidia,tristate;
+ };
+ spie {
+ nvidia,function = "spi1";
+ nvidia,tristate;
+ };
+ spif {
+ nvidia,function = "spi1";
+ nvidia,pull-down;
+ nvidia,tristate;
+ };
+ spig {
+ nvidia,function = "spi2_alt";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ spih {
+ nvidia,function = "spi2_alt";
+ nvidia,pull-up;
+ nvidia,tristate;
+ };
+ uaa {
+ nvidia,function = "ulpi";
+ nvidia,pull-up;
+ };
+ uab {
+ nvidia,function = "ulpi";
+ nvidia,pull-up;
+ };
+ uac {
+ nvidia,function = "rsvd2";
+ };
+ uad {
+ nvidia,function = "irda";
+ };
+ uca {
+ nvidia,function = "uartc";
+ };
+ ucb {
+ nvidia,function = "uartc";
+ };
+ uda {
+ nvidia,function = "ulpi";
+ };
+ ck32 {
+ nvidia,function = "none";
+ };
+ ddrc {
+ nvidia,function = "none";
+ };
+ pmca {
+ nvidia,function = "none";
+ };
+ pmcb {
+ nvidia,function = "none";
+ };
+ pmcc {
+ nvidia,function = "none";
+ };
+ pmcd {
+ nvidia,function = "none";
+ };
+ pmce {
+ nvidia,function = "none";
+ };
+ xm2c {
+ nvidia,function = "none";
+ };
+ xm2d {
+ nvidia,function = "none";
+ };
+ };
+ nvidia,drive-groups {
+ sdio1 {
+ nvidia,schmitt;
+ nvidia,drive-power = <3>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <3>;
+ nvidia,slew-rate-falling = <3>;
+ };
+ };
+ };
+
serial@70006300 {
clock-frequency = < 216000000 >;
};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 5727595..5921c1d 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -77,6 +77,11 @@
gpio-controller;
};
+ pinmux: pinmux@70000000 {
+ compatible = "nvidia,tegra20-pinmux";
+ reg = < 0x70000000 0xc00 >;
+ };
+
serial@70006000 {
compatible = "nvidia,tegra20-uart";
reg = <0x70006000 0x40>;
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 08/13] gpio/tegra: Convert to a platform device
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Sergei Shtylyov, Belisko Marek,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313440100-17131-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
drivers/gpio/gpio-tegra.c | 25 ++++++++++++++-----------
1 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index df64536..4da4839 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -20,10 +20,10 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
-
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/of.h>
+#include <linux/platform_device.h>
#include <asm/mach/irq.h>
@@ -332,7 +332,7 @@ static struct irq_chip tegra_gpio_irq_chip = {
*/
static struct lock_class_key gpio_lock_class;
-static int __init tegra_gpio_init(void)
+static int __init tegra_gpio_probe(struct platform_device *pdev)
{
struct tegra_gpio_bank *bank;
int gpio;
@@ -346,15 +346,6 @@ static int __init tegra_gpio_init(void)
}
}
-#ifdef CONFIG_OF_GPIO
- /*
- * This isn't ideal, but it gets things hooked up until this
- * driver is converted into a platform_device
- */
- tegra_gpio_chip.of_node = of_find_compatible_node(NULL, NULL,
- "nvidia,tegra20-gpio");
-#endif /* CONFIG_OF_GPIO */
-
gpiochip_add(&tegra_gpio_chip);
for (gpio = 0; gpio < TEGRA_NR_GPIOS; gpio++) {
@@ -383,6 +374,18 @@ static int __init tegra_gpio_init(void)
return 0;
}
+static struct platform_driver tegra_gpio_driver = {
+ .driver = {
+ .name = "tegra-gpio",
+ .owner = THIS_MODULE,
+ },
+ .probe = tegra_gpio_probe,
+};
+
+static int __init tegra_gpio_init(void)
+{
+ return platform_driver_register(&tegra_gpio_driver);
+}
postcore_initcall(tegra_gpio_init);
void __init tegra_gpio_config(struct tegra_gpio_table *table, int num)
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 09/13] gpio/tegra: Add device tree support
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Arnd Bergmann, devicetree-discuss, linux-tegra,
linux-arm-kernel, linux-kernel, Belisko Marek, Jamie Iles,
Shawn Guo, Sergei Shtylyov, Stephen Warren
In-Reply-To: <1313440100-17131-1-git-send-email-swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
drivers/gpio/gpio-tegra.c | 32 ++++++++++++++++++++++++++++++++
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 4da4839..1d0a764 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -326,6 +326,30 @@ static struct irq_chip tegra_gpio_irq_chip = {
#endif
};
+#ifdef CONFIG_OF
+static void __init tegra_gpio_probe_dt(struct platform_device *pdev)
+{
+ const __be32 *gpios;
+ u32 gpioslen;
+ int i;
+
+ gpios = of_get_property(pdev->dev.of_node, "nvidia,enabled-gpios",
+ &gpioslen);
+ if (gpios == NULL)
+ return;
+
+ gpioslen /= sizeof(*gpios);
+ for (i = 0; i < gpioslen; i++, gpios++) {
+ u32 gpio = be32_to_cpup(gpios);
+ dev_dbg(&pdev->dev, "Enabling GPIO %d\n", gpio);
+ tegra_gpio_enable(gpio);
+ }
+}
+#else
+static inline void __init tegra_gpio_probe_dt(struct platform_device *pdev)
+{
+}
+#endif
/* This lock class tells lockdep that GPIO irqs are in a different
* category than their parents, so it won't report false recursion.
@@ -371,13 +395,21 @@ static int __init tegra_gpio_probe(struct platform_device *pdev)
spin_lock_init(&bank->lvl_lock[j]);
}
+ tegra_gpio_probe_dt(pdev);
+
return 0;
}
+static struct of_device_id tegra_gpio_of_match[] __devinitdata = {
+ { .compatible = "nvidia,tegra20-gpio", },
+ { },
+};
+
static struct platform_driver tegra_gpio_driver = {
.driver = {
.name = "tegra-gpio",
.owner = THIS_MODULE,
+ .of_match_table = tegra_gpio_of_match,
},
.probe = tegra_gpio_probe,
};
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 10/13] arm/tegra: Convert pinmux driver to a platform device
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Sergei Shtylyov, Belisko Marek,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1313440100-17131-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/mach-tegra/pinmux.c | 20 ++++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
index f80d507..ed316f9 100644
--- a/arch/arm/mach-tegra/pinmux.c
+++ b/arch/arm/mach-tegra/pinmux.c
@@ -20,6 +20,7 @@
#include <linux/errno.h>
#include <linux/spinlock.h>
#include <linux/io.h>
+#include <linux/platform_device.h>
#include <mach/iomap.h>
#include <mach/pinmux.h>
@@ -665,6 +666,25 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
}
}
+static int __init tegra_pinmux_probe(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static struct platform_driver tegra_pinmux_driver = {
+ .driver = {
+ .name = "tegra-pinmux",
+ .owner = THIS_MODULE,
+ },
+ .probe = tegra_pinmux_probe,
+};
+
+static int __init tegra_pinmux_init(void)
+{
+ return platform_driver_register(&tegra_pinmux_driver);
+}
+postcore_initcall(tegra_pinmux_init);
+
#ifdef CONFIG_DEBUG_FS
#include <linux/debugfs.h>
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 11/13] arm/tegra: Add device tree support to pinmux driver
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Arnd Bergmann, devicetree-discuss, linux-tegra,
linux-arm-kernel, linux-kernel, Belisko Marek, Jamie Iles,
Shawn Guo, Sergei Shtylyov, Stephen Warren
In-Reply-To: <1313440100-17131-1-git-send-email-swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/mach-tegra/pinmux.c | 249 ++++++++++++++++++++++++++++++++++++++++++
1 files changed, 249 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
index ed316f9..5dfe6c1 100644
--- a/arch/arm/mach-tegra/pinmux.c
+++ b/arch/arm/mach-tegra/pinmux.c
@@ -20,6 +20,7 @@
#include <linux/errno.h>
#include <linux/spinlock.h>
#include <linux/io.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
#include <mach/iomap.h>
@@ -124,6 +125,21 @@ static const char *pingroup_name(enum tegra_pingroup pg)
return pingroups[pg].name;
}
+#ifdef CONFIG_OF
+static int pingroup_enum(const char *name, enum tegra_pingroup *pg_out)
+{
+ int pg;
+
+ for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++)
+ if (!strcasecmp(name, tegra_soc_pingroups[pg].name)) {
+ *pg_out = pg;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+#endif
+
static const char *func_name(enum tegra_mux_func func)
{
if (func == TEGRA_MUX_RSVD1)
@@ -147,6 +163,41 @@ static const char *func_name(enum tegra_mux_func func)
return tegra_mux_names[func];
}
+#ifdef CONFIG_OF
+static int func_enum(const char *name, enum tegra_mux_func *func_out)
+{
+ int func;
+
+ if (!strcasecmp(name, "RSVD1")) {
+ *func_out = TEGRA_MUX_RSVD1;
+ return 0;
+ }
+ if (!strcasecmp(name, "RSVD2")) {
+ *func_out = TEGRA_MUX_RSVD2;
+ return 0;
+ }
+ if (!strcasecmp(name, "RSVD3")) {
+ *func_out = TEGRA_MUX_RSVD3;
+ return 0;
+ }
+ if (!strcasecmp(name, "RSVD4")) {
+ *func_out = TEGRA_MUX_RSVD4;
+ return 0;
+ }
+ if (!strcasecmp(name, "NONE")) {
+ *func_out = TEGRA_MUX_NONE;
+ return 0;
+ }
+
+ for (func = 0; func < TEGRA_MAX_MUX; func++)
+ if (!strcasecmp(name, tegra_mux_names[func])) {
+ *func_out = func;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+#endif
static const char *tri_name(unsigned long val)
{
@@ -329,6 +380,22 @@ static const char *drive_pinmux_name(enum tegra_drive_pingroup pg)
return drive_pingroups[pg].name;
}
+#ifdef CONFIG_OF
+static int drive_pinmux_enum(const char *name,
+ enum tegra_drive_pingroup *pg_out)
+{
+ int pg;
+
+ for (pg = 0; pg < TEGRA_MAX_DRIVE_PINGROUP; pg++)
+ if (!strcasecmp(name, drive_pingroups[pg].name)) {
+ *pg_out = pg;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+#endif
+
static const char *enable_name(unsigned long val)
{
return val ? "ENABLE" : "DISABLE";
@@ -666,15 +733,197 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
}
}
+#ifdef CONFIG_OF
+static void __init tegra_pinmux_parse_mux_groups(
+ struct platform_device *pdev,
+ struct device_node *mux_node)
+{
+ struct device_node *node;
+
+ for_each_child_of_node(mux_node, node) {
+ struct tegra_pingroup_config config;
+ int ret;
+ const char *func;
+
+ ret = pingroup_enum(node->name, &config.pingroup);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(mux) %s: Invalid pingroup name\n",
+ node->name);
+ continue;
+ }
+
+ ret = of_property_read_string(node, "nvidia,function",
+ &func);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(mux) %s: Missing property nvidia,function\n",
+ node->name);
+ continue;
+ }
+ ret = func_enum(func, &config.func);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(mux) %s: Invalid nvidia,function value %s\n",
+ node->name, func);
+ continue;
+ }
+
+ if (of_find_property(node, "nvidia,pull-up", NULL))
+ config.pupd = TEGRA_PUPD_PULL_UP;
+ else if (of_find_property(node, "nvidia,pull-down", NULL))
+ config.pupd = TEGRA_PUPD_PULL_DOWN;
+ else
+ config.pupd = TEGRA_PUPD_NORMAL;
+
+ if (of_find_property(node, "nvidia,tristate", NULL))
+ config.tristate = TEGRA_TRI_TRISTATE;
+ else
+ config.tristate = TEGRA_TRI_NORMAL;
+
+ dev_dbg(&pdev->dev, "(mux) %s: func %d (%s) pull %d tri %d\n",
+ node->name, config.func, func, config.pupd,
+ config.tristate);
+
+ tegra_pinmux_config_pingroup(&config);
+ }
+}
+
+static void __init tegra_pinmux_parse_drive_groups(
+ struct platform_device *pdev,
+ struct device_node *drive_node)
+{
+ struct device_node *node;
+
+ for_each_child_of_node(drive_node, node) {
+ enum tegra_drive_pingroup pg;
+ enum tegra_hsm hsm;
+ enum tegra_schmitt schmitt;
+ enum tegra_drive drive;
+ enum tegra_pull_strength pull_down;
+ enum tegra_pull_strength pull_up;
+ enum tegra_slew slew_rising;
+ enum tegra_slew slew_falling;
+ int ret;
+
+ ret = drive_pinmux_enum(node->name, &pg);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(drive) %s: Invalid pingroup name\n",
+ node->name);
+ continue;
+ }
+
+ if (of_find_property(node, "nvidia,high-speed-mode", NULL))
+ hsm = TEGRA_HSM_ENABLE;
+ else
+ hsm = TEGRA_HSM_DISABLE;
+
+ if (of_find_property(node, "nvidia,schmitt", NULL))
+ schmitt = TEGRA_SCHMITT_ENABLE;
+ else
+ schmitt = TEGRA_SCHMITT_DISABLE;
+
+ ret = of_property_read_u32(node, "nvidia,drive-power", &drive);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(drive) %s: Missing property "
+ "nvidia,drive-power\n",
+ node->name);
+ continue;
+ }
+
+ ret = of_property_read_u32(node, "nvidia,pull-down-strength",
+ &pull_down);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(drive) %s: Missing property "
+ "nvidia,pull-down-strength\n",
+ node->name);
+ continue;
+ }
+
+ ret = of_property_read_u32(node, "nvidia,pull-up-strength",
+ &pull_up);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(drive) %s: Missing property "
+ "nvidia,pull-up-strength\n",
+ node->name);
+ continue;
+ }
+
+ ret = of_property_read_u32(node, "nvidia,slew-rate-rising",
+ &slew_rising);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(drive) %s: Missing property "
+ "nvidia,slew_rate-rising\n",
+ node->name);
+ continue;
+ }
+
+ ret = of_property_read_u32(node, "nvidia,slew-rate-falling",
+ &slew_rising);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "(drive) %s: Missing property "
+ "nvidia,slew_rate-falling\n",
+ node->name);
+ continue;
+ }
+
+ dev_dbg(&pdev->dev,
+ "(drive) %s: hsm %d schmitt %d drive %d "
+ "pull_down %d pull_up %d slew_r %d slew_f %d\n",
+ node->name,
+ hsm, schmitt, drive,
+ pull_down, pull_up,
+ slew_rising, slew_falling);
+
+ tegra_drive_pinmux_config_pingroup(pg, hsm, schmitt, drive,
+ pull_down, pull_up,
+ slew_rising, slew_falling);
+ }
+}
+
+static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
+{
+ struct device_node *node;
+
+ for_each_child_of_node(pdev->dev.of_node, node) {
+ if (!strcmp(node->name, "nvidia,mux-groups"))
+ tegra_pinmux_parse_mux_groups(pdev, node);
+ else if (!strcmp(node->name, "nvidia,drive-groups"))
+ tegra_pinmux_parse_drive_groups(pdev, node);
+ else
+ dev_err(&pdev->dev, "%s: Unknown child node\n",
+ node->name);
+ }
+}
+#else
+static inline void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
+{
+}
+#endif
+
static int __init tegra_pinmux_probe(struct platform_device *pdev)
{
+ tegra_pinmux_probe_dt(pdev);
+
return 0;
}
+static struct of_device_id tegra_pinmux_of_match[] __devinitdata = {
+ { .compatible = "nvidia,tegra20-pinmux", },
+ { },
+};
+
static struct platform_driver tegra_pinmux_driver = {
.driver = {
.name = "tegra-pinmux",
.owner = THIS_MODULE,
+ .of_match_table = tegra_pinmux_of_match,
},
.probe = tegra_pinmux_probe,
};
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 12/13] arm/tegra: board-dt: Remove dependency on non-dt pinmux functions
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Arnd Bergmann, devicetree-discuss, linux-tegra,
linux-arm-kernel, linux-kernel, Belisko Marek, Jamie Iles,
Shawn Guo, Sergei Shtylyov, Stephen Warren
In-Reply-To: <1313440100-17131-1-git-send-email-swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/mach-tegra/Makefile | 1 -
arch/arm/mach-tegra/board-dt.c | 10 ----------
2 files changed, 0 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index f11b910..bab6544 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -30,7 +30,6 @@ obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o
obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o
-obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o
obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o
obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index 1995b79..06e82c4 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -41,14 +41,9 @@
#include <mach/irqs.h>
#include "board.h"
-#include "board-harmony.h"
#include "clock.h"
#include "devices.h"
-void harmony_pinmux_init(void);
-void seaboard_pinmux_init(void);
-
-
struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE, "tegra-pinmux", NULL),
@@ -93,11 +88,6 @@ static void __init tegra_dt_init(void)
tegra_clk_init_from_table(tegra_dt_clk_init_table);
- if (of_machine_is_compatible("nvidia,harmony"))
- harmony_pinmux_init();
- else if (of_machine_is_compatible("nvidia,seaboard"))
- seaboard_pinmux_init();
-
/*
* Finished with the static registrations now; fill in the missing
* devices
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 13/13] arm/tegra: Remove temporary gpio/pinmux registration workaround
From: Stephen Warren @ 2011-08-15 20:28 UTC (permalink / raw)
To: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson
Cc: Russell King, Arnd Bergmann, devicetree-discuss, linux-tegra,
linux-arm-kernel, linux-kernel, Belisko Marek, Jamie Iles,
Shawn Guo, Sergei Shtylyov, Stephen Warren
In-Reply-To: <1313440100-17131-1-git-send-email-swarren@nvidia.com>
This reverts commit "arm/tegra: Avoid duplicate gpio/pinmux devices with
dt"; board-dt.c no long calls harmony/seaboard_pinmux_init(), so the
workaround is no longer needed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/mach-tegra/board-harmony-pinmux.c | 5 +----
arch/arm/mach-tegra/board-seaboard-pinmux.c | 5 +----
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 130018d..e99b456 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -14,8 +14,6 @@
*
*/
-#include <asm/mach-types.h>
-
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <mach/pinmux.h>
@@ -163,8 +161,7 @@ static struct tegra_gpio_table gpio_table[] = {
void harmony_pinmux_init(void)
{
- if (machine_is_harmony())
- platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+ platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index bc4dc17..f092298 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -12,8 +12,6 @@
*
*/
-#include <asm/mach-types.h>
-
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
@@ -178,8 +176,7 @@ static struct tegra_gpio_table gpio_table[] = {
void __init seaboard_pinmux_init(void)
{
- if (machine_is_seaboard())
- platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+ platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
--
1.7.0.4
^ permalink raw reply related
* Re: [RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver
From: Jamie Iles @ 2011-08-15 20:36 UTC (permalink / raw)
To: Jamie Iles
Cc: Stephen Warren, Grant Likely, Colin Cross, Erik Gilling,
Olof Johansson, Russell King,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20110815200716.GA22355@gallagher>
On Mon, Aug 15, 2011 at 09:07:16PM +0100, Jamie Iles wrote:
> Hi Stephen,
>
> On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> > Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > ---
> > arch/arm/mach-tegra/pinmux.c | 115 ++++++++++++++++++++++++++++++++++++++++++
> > 1 files changed, 115 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
> > index 05fa1a3..33246c2 100644
> > --- a/arch/arm/mach-tegra/pinmux.c
> > +++ b/arch/arm/mach-tegra/pinmux.c
> > @@ -20,6 +20,7 @@
> > #include <linux/errno.h>
> > #include <linux/spinlock.h>
> > #include <linux/io.h>
> > +#include <linux/of.h>
> > #include <linux/platform_device.h>
> >
> > #include <mach/iomap.h>
> > @@ -147,6 +148,41 @@ static const char *func_name(enum tegra_mux_func func)
> > return tegra_mux_names[func];
> > }
> >
> [...]
> >
> > static const char *tri_name(unsigned long val)
> > {
> > @@ -666,15 +702,94 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
> > }
> > }
> >
> > +#ifdef CONFIG_OF
> > +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> > +{
> > + int pg;
> > +
> > + for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> > + const char *pg_name = pingroup_name(pg);
> > + struct tegra_pingroup_config config;
> > + struct device_node *pg_node;
> > + int ret;
> > + const char *s;
> > +
> > + pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> > + pg_name);
> > + if (pg_node == NULL)
> > + continue;
> > +
> > + config.pingroup = pg;
> > +
> > + ret = of_property_read_string(pg_node, "nvidia,function", &s);
> > + if (ret < 0) {
> > + dev_err(&pdev->dev,
> > + "%s: Missing property nvidia,function\n",
> > + pg_name);
> > + continue;
> > + }
> > + ret = func_enum(s, &config.func);
> > + if (ret < 0) {
> > + dev_err(&pdev->dev,
> > + "%s: Invalid nvidia,function value %s\n",
> > + pg_name, s);
> > + continue;
> > + }
> > +
> > + ret = of_property_read_string(pg_node, "nvidia,pull", &s);
> > + if (ret >= 0) {
> > + if (!strcmp(s, "up"))
> > + config.pupd = TEGRA_PUPD_PULL_UP;
> > + else if (!strcmp(s, "down"))
> > + config.pupd = TEGRA_PUPD_PULL_DOWN;
> > + else if (!strcmp(s, "normal"))
> > + config.pupd = TEGRA_PUPD_NORMAL;
> > + else {
> > + dev_err(&pdev->dev,
> > + "%s: Invalid nvidia,pull value %s\n",
> > + pg_name, s);
> > + continue;
> > + }
> > + } else
> > + config.pupd = TEGRA_PUPD_NORMAL;
> > +
> > + if (of_find_property(pg_node, "nvidia,tristate", NULL))
> > + config.tristate = TEGRA_TRI_TRISTATE;
> > + else
> > + config.tristate = TEGRA_TRI_NORMAL;
> > +
> > + dev_err(&pdev->dev, "%s: func %d (%s) pull %d tri %d\n",
> > + pg_name, config.func, func_name(config.func),
> > + config.pupd, config.tristate);
> > +
> > + tegra_pinmux_config_pingroup(&config);
> > +
> > + of_node_put(pg_node);
> > + }
> > +}
>
> I need to implement DT muxing configuration for my platform, and I believe
> that what you have here would work fine for me too, and to avoid duplicating
> the same thing, I wonder if this could be a little more generic.
>
> So if the platform specific pinmux driver called the pinmux parser with a
> callback for a pingroup configuration function then this wouldn't need the
> nvidia specific properties. I'd envisage the setup callback to be something
> like:
>
> int pingroup_configure(const char *name, unsigned long flags);
and it if this took the device_node too then the platform specific bits could
handle more esoteric properties if required. I'll have a go at prototyping
this tomorrow unless there are any obvious reasons that this is a stupid idea!
Jamie
^ permalink raw reply
* RE: [RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver
From: Stephen Warren @ 2011-08-15 20:44 UTC (permalink / raw)
To: Jamie Iles
Cc: Grant Likely, Colin Cross, Erik Gilling, Olof Johansson,
Russell King,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Linus Walleij (linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org)
In-Reply-To: <20110815203617.GB22355@gallagher>
Jamie Iles wrote at Monday, August 15, 2011 2:36 PM:
> On Mon, Aug 15, 2011 at 09:07:16PM +0100, Jamie Iles wrote:
> > Hi Stephen,
> >
> > On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> > > Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
...
> > > diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
...
> > > +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> > > +{
> > > + int pg;
> > > +
> > > + for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> > > + const char *pg_name = pingroup_name(pg);
> > > + struct tegra_pingroup_config config;
> > > + struct device_node *pg_node;
> > > + int ret;
> > > + const char *s;
> > > +
> > > + pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> > > + pg_name);
> > > + if (pg_node == NULL)
> > > + continue;
> > > +
> > > + config.pingroup = pg;
> > > +
> > > + ret = of_property_read_string(pg_node, "nvidia,function", &s);
...
> > > + ret = of_property_read_string(pg_node, "nvidia,pull", &s);
...
> > > + if (of_find_property(pg_node, "nvidia,tristate", NULL))
...
> > > + tegra_pinmux_config_pingroup(&config);
> > > +
> > > + of_node_put(pg_node);
> > > + }
> > > +}
> >
> > I need to implement DT muxing configuration for my platform, and I believe
> > that what you have here would work fine for me too, and to avoid duplicating
> > the same thing, I wonder if this could be a little more generic.
> >
> > So if the platform specific pinmux driver called the pinmux parser with a
> > callback for a pingroup configuration function then this wouldn't need the
> > nvidia specific properties. I'd envisage the setup callback to be something
> > like:
> >
> > int pingroup_configure(const char *name, unsigned long flags);
>
> and it if this took the device_node too then the platform specific bits could
> handle more esoteric properties if required. I'll have a go at prototyping
> this tomorrow unless there are any obvious reasons that this is a stupid idea!
I expect some of the code could be shared.
The only worry I have is whether some SoCs don't configure things like
pinmux function in the same place as pad function (pullup/down, tristate),
and hence whether a generic binding is generally applicable. I suppose the
code could always ignore unused properties.
I wonder how much of this is relevant to Linus W's pinctrl API?
Note that in the updated patch series I just posted, I reworked the binding
a little; Tegra has two sets of pin-groups, one configuring muxing, pullup/
down, and tri-state, and the other configuring various driver strength/
rate properties. Hence, the tree is now e.g.:
pinmux: pinmux@70000000 {
compatible = "nvidia,tegra20-pinmux";
reg = < 0x70000000 0xc00 >;
nvidia,mux-groups {
cdev1 {
nvidia,function = "plla_out";
};
cdev2 {
nvidia,function = "pllp_out4";
nvidia,pull-down;
nvidia,tristate;
};
};
nvidia,drive-groups {
sdio1 {
nvidia,schmitt;
nvidia,drive-power = <1>;
nvidia,pull-down-strength = <31>;
nvidia,pull-up-strength = <31>;
nvidia,slew-rate-rising = <3>;
nvidia,slew-rate-falling = <3>;
};
};
};
But it's probably still reasonably easy to make the parser for the mux-groups
node generic. Perhaps it makes sense for all SoCs to have a "mux-settings"
node, even if they don't have any other custom nodes?
--
nvpublic
^ permalink raw reply
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