messages from 2026-10-29 12:43:31 to 2026-10-29 18:09:17 UTC [more...]
[PATCH] PCI/CXL: Flush host and device caches for CXL bus reset
2026-10-29 18:09 UTC (2+ messages)
[RFC PATCH 0/6] dma-buf: Phase out is_signaled() race
2026-10-29 16:00 UTC (8+ messages)
` [RFC PATCH 1/6] dma-buf: dma-fence: Add flags parameter to dma_fence_init()
` [RFC PATCH 5/6] dma-buf: dma-fence: Close race in dma_fence_is_signaled() by default
[PATCH v5 00/11] drm/tegra: Add support for Tegra20/Tegra30 8-bit CPU interface
2026-10-29 15:29 UTC (12+ messages)
` [PATCH v5 01/11] drm: Add MIPI DBI bus support
` [PATCH v5 02/11] dt-bindings: display: panel: Document Hitachi TX10D07VM0BAA and LG LH400WV3 panels
` [PATCH v5 03/11] drm/panel: Add Hitachi TX10D07VM0BAA MIPI DBI Type B panel driver
` [PATCH v5 04/11] drm/panel: Add LG LH400WV3-SD04 "
` [PATCH v5 05/11] drm/tegra: dc: Refactor and expand header
` [PATCH v5 06/11] dt-bindings: display: tegra: Document Tegra20 DSI port
` [PATCH v5 07/11] drm/tegra: Make panel parsing by tegra_output_probe() optional
` [PATCH v5 08/11] drm/tegra: Convert to use atomic versions of drm_encoder_helper_funcs
` [PATCH v5 09/11] drm/tegra: rgb: Parameterize configuration based on bus flags
` [PATCH v5 10/11] dt-bindings: display: tegra: Document 8-bit CPU parallel interface
` [PATCH v5 11/11] drm/tegra: Add support for 8-bit CPU interface
[PATCH v16 00/18] PCI/CXL: Add CXL reset support for Type 2 devices
2026-10-29 14:57 UTC (19+ messages)
` [PATCH v16 01/18] cxl: Clarify decoder interleave limit
` [PATCH v16 02/18] cxl: Share CXL port upstream PCI device lookup
` [PATCH v16 03/18] cxl: Move decoder declarations to shared header
` [PATCH v16 04/18] cxl: Embed decoder configuration in a standalone structure
` [PATCH v16 05/18] cxl: Introduce endpoint HDM decoder settings
` [PATCH v16 06/18] cxl: Move HDM decoder helpers to built-in code
` [PATCH v16 07/18] cxl: Share HDM decoder register unpacking
` [PATCH v16 08/18] cxl: Move cxl_rwsem into built-in code
` [PATCH v16 09/18] cxl: Refresh cached PCI HDM decoder settings
` [PATCH v16 10/18] cxl: Build register block helpers into the kernel
` [PATCH v16 11/18] PCI/CXL: Cache endpoint HDM state during PCI enumeration
` [PATCH v16 12/18] PCI/CXL: Add CXL Device Reset sequencing
` [PATCH v16 13/18] cxl: Validate and synchronize HDM ranges around reset
` [PATCH v16 14/18] PCI/CXL: Reject reset with unsafe function scope
` [PATCH v16 15/18] PCI/CXL: Restore CXL state after PCI reset
` [PATCH v16 16/18] PCI/CXL: Expose CXL Reset as a PCI reset method
` [PATCH v16 17/18] PCI/CXL: Restore CXL state after CXL bus reset
` [PATCH v16 18/18] cxl: Add KUnit checks for HDM decoder unpacking
[PATCH v7 00/16] iommufd: vIOMMUs and TSM guest requests for confidential guests
2026-10-29 13:01 UTC (9+ messages)
` [PATCH v7 10/16] iommufd: Add the vdevice TSM request ioctl
` [PATCH v7 13/16] iommufd/viommu: Select vIOMMU operations before allocation
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