messages from 2026-11-05 15:36:41 to 2026-11-05 22:58:26 UTC [more...]
[PATCH v6 00/10] drm/tegra: Add support for Tegra20/Tegra30 8-bit CPU interface
2026-11-05 22:58 UTC (3+ messages)
` [PATCH v6 09/10] dt-bindings: display: tegra: Document 8-bit CPU parallel interface
[PATCH v8 00/15] iommufd: TSM-backed virtual IOMMUs for confidential guests
2026-11-05 20:07 UTC (13+ messages)
` [PATCH v8 12/15] iommufd/viommu: Allow PCI TSM backends to provide vIOMMU operations
` [PATCH v8 13/15] iommufd/viommu: Allow vIOMMUs without a parent HWPT
[PATCH v17 00/19] PCI/CXL: Add CXL reset support for Type 2 devices
2026-11-05 19:31 UTC (21+ messages)
` [PATCH v17 01/19] cxl: Clarify decoder interleave limit
` [PATCH v17 02/19] cxl: Share CXL port upstream PCI device lookup
` [PATCH v17 03/19] cxl: Move decoder declarations to shared header
` [PATCH v17 04/19] cxl: Embed decoder configuration in a standalone structure
` [PATCH v17 05/19] cxl: Introduce endpoint HDM decoder settings
` [PATCH v17 06/19] cxl: Move HDM decoder helpers to built-in code
` [PATCH v17 07/19] cxl: Share HDM decoder register unpacking
` [PATCH v17 08/19] cxl: Move cxl_rwsem into built-in code
` [PATCH v17 09/19] cxl: Refresh cached PCI HDM decoder settings
` [PATCH v17 10/19] cxl: Build register block helpers into the kernel
` [PATCH v17 11/19] PCI/CXL: Cache endpoint HDM state during PCI enumeration
` [PATCH v17 12/19] PCI/CXL: Add CXL Device Reset sequencing
` [PATCH v17 13/19] cxl: Validate and synchronize HDM ranges around reset
` [PATCH v17 14/19] PCI/CXL: Reject reset with unsafe function scope
` [PATCH v17 15/19] PCI/CXL: Restore CXL state after PCI reset
` [PATCH v17 16/19] PCI/CXL: Expose CXL Reset as a PCI reset method
` [PATCH v17 17/19] PCI/CXL: Restore CXL state after CXL bus reset
` [PATCH v17 18/19] PCI/CXL: Flush host and device caches for "
` [PATCH v17 19/19] cxl: Add KUnit checks for HDM decoder unpacking
[PATCH v15 00/16] PCI/CXL: Add CXL reset support for Type 2 devices
2026-11-05 19:13 UTC (5+ messages)
` [PATCH v15 11/16] cxl: Validate and synchronize HDM ranges around reset
[PATCH v16 00/18] PCI/CXL: Add CXL reset support for Type 2 devices
2026-11-05 19:09 UTC (23+ messages)
` [PATCH v16 07/18] cxl: Share HDM decoder register unpacking
` [PATCH v16 11/18] PCI/CXL: Cache endpoint HDM state during PCI enumeration
` [PATCH v16 12/18] PCI/CXL: Add CXL Device Reset sequencing
` [PATCH v16 13/18] cxl: Validate and synchronize HDM ranges around reset
` [PATCH v16 14/18] PCI/CXL: Reject reset with unsafe function scope
` [PATCH v16 17/18] PCI/CXL: Restore CXL state after CXL bus reset
[PATCH 1/1] tty: serial: use dmaengine_desc_set_callback()
2026-11-05 18:02 UTC (14+ messages)
[PATCH 0/3] dma-buf: dma-fence: Remove dma_fence_init64()
2026-11-05 16:32 UTC (2+ messages)
[PATCH 29/47] clocksource/drivers/timer-tegra: Move CPUHP_AP_TEGRA_TIMER_STARTING post stop_machine()
2026-11-05 16:30 UTC
[PATCH] cpufreq: CPPC: Set CPPC Enable register in cpu_init
2026-11-05 16:08 UTC (3+ messages)
[PATCH RESEND 00/83] drm: Switch drivers to drm_mode_config_create_initial_state
2026-11-05 15:51 UTC (3+ messages)
` [PATCH RESEND 53/83] drm/tegra: Switch "
[PATCH 0/8] pwm: Fix various bugs reported by Sashiko
2026-11-05 15:46 UTC (3+ messages)
` [PATCH 1/8] pwm: tegra: Prevent 32-bit period truncation and division by zero
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