Re: [PATCH v3 02/13] dt-bindings: usb: Add NVIDIA Tegra234 XUSB host controller binding

Jon Hunter
2022-11-15T12:14:54Z

On 14/11/2022 12:40, Wayne Chang wrote:
> Add device-tree binding documentation for the XUSB host controller present
> on Tegra234 SoC. This controller supports the USB 3.1 specification.
>
> Signed-off-by: Wayne Chang <waynec@nvidia.com>
> ---
> depends on the following change
> https://lore.kernel.org/all/20221003125141.123759-1-jonathanh@nvidia.com/
> V2 -> V3:nothing has changed but added the dependency here
> V1 -> V2:new change for adding nvidia,tegra234-xusb.yaml
> .../bindings/usb/nvidia,tegra234-xusb.yaml | 159 ++++++++++++++++++
> 1 file changed, 159 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
> new file mode 100644
> index 000000000000..d78ee88ed208
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
> @@ -0,0 +1,159 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/nvidia,tegra234-xusb.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra234 xHCI controller
> +
> +maintainers:
> + - Thierry Reding <thierry.reding@gmail.com>
> + - Jon Hunter <jonathanh@nvidia.com>
> +
> +description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
> + exposed by the Tegra XUSB pad controller.
> +
> +properties:
> + compatible:
> + const: nvidia,tegra234-xusb
> +
> + reg:
> + items:
> + - description: base and length of the xHCI host registers
> + - description: base and length of the XUSB FPCI registers
> + - description: base and length of the XUSB bar2 registers
> +
> + reg-names:
> + items:
> + - const: hcd
> + - const: fpci
> + - const: bar2
> +
> + interrupts:
> + items:
> + - description: xHCI host interrupt
> + - description: mailbox interrupt
> +
> + clocks:
> + items:
> + - description: XUSB host clock
> + - description: XUSB Falcon source clock
> + - description: XUSB SuperSpeed clock
> + - description: XUSB SuperSpeed source clock
> + - description: XUSB HighSpeed clock source
> + - description: XUSB FullSpeed clock source
> + - description: USB PLL
> + - description: reference clock
> + - description: I/O PLL
> +
> + clock-names:
> + items:
> + - const: xusb_host
> + - const: xusb_falcon_src
> + - const: xusb_ss
> + - const: xusb_ss_src
> + - const: xusb_hs_src
> + - const: xusb_fs_src
> + - const: pll_u_480m
> + - const: clk_m
> + - const: pll_e
> +
> + interconnects:
> + items:
> + - description: read client
> + - description: write client
> +
> + interconnect-names:
> + items:
> + - const: dma-mem # read
> + - const: write
> +
> + iommus:
> + maxItems: 1
> +
> + nvidia,xusb-padctl:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: phandle to the XUSB pad controller that is used to configure
> + the USB pads used by the XHCI controller
> +
> + phys:
> + minItems: 1
> + maxItems: 8
> +
> + phy-names:
> + minItems: 1
> + maxItems: 8
> + items:
> + enum:
> + - usb2-0
> + - usb2-1
> + - usb2-2
> + - usb2-3
> + - usb3-0
> + - usb3-1
> + - usb3-2
> + - usb3-3
> +
> + power-domains:
> + items:
> + - description: XUSBC power domain
> + - description: XUSBA power domain
> +
> + power-domain-names:
> + items:
> + - const: xusb_host
> + - const: xusb_ss
> +
> + dma-coherent:
> + type: boolean
> +
> +allOf:
> + - $ref: usb-xhci.yaml
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/tegra234-gpio.h>
> + #include <dt-bindings/clock/tegra234-clock.h>
> + #include <dt-bindings/memory/tegra234-mc.h>
> + #include <dt-bindings/power/tegra234-powergate.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + usb@3610000 {
> + compatible = "nvidia,tegra234-xusb";
> + reg = <0x03610000 0x40000>,
> + <0x03600000 0x10000>,
> + <0x03650000 0x10000>;
> + reg-names = "hcd", "fpci", "bar2";
> +
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
> + <&bpmp TEGRA234_CLK_XUSB_FALCON>,
> + <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
> + <&bpmp TEGRA234_CLK_XUSB_SS>,
> + <&bpmp TEGRA234_CLK_CLK_M>,
> + <&bpmp TEGRA234_CLK_XUSB_FS>,
> + <&bpmp TEGRA234_CLK_UTMIP_PLL>,
> + <&bpmp TEGRA234_CLK_CLK_M>,
> + <&bpmp TEGRA234_CLK_PLLE>;
> + clock-names = "xusb_host", "xusb_falcon_src",
> + "xusb_ss", "xusb_ss_src", "xusb_hs_src",
> + "xusb_fs_src", "pll_u_480m", "clk_m",
> + "pll_e";
> + interconnects = <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTR &emc>,
> + <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTW &emc>;
> + interconnect-names = "dma-mem", "write";
> + iommus = <&smmu_niso1 TEGRA234_SID_XUSB_HOST>;
> +
> + power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
> + <&bpmp TEGRA234_POWER_DOMAIN_XUSBA>;
> + power-domain-names = "xusb_host", "xusb_ss";
> +
> + nvidia,xusb-padctl = <&xusb_padctl>;
> +
> + phys = <&pad_lanes_usb2_0>;
> + phy-names = "usb2-0";
> +
> + };

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Thanks
Jon

--
nvpublic