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Thu, 8 Jun 2023 04:22:24 -0700 Date: Thu, 8 Jun 2023 14:22:23 +0300 From: Peter De Schrijver To: Thierry Reding CC: , , , , , , , , Subject: Re: [PATCH v4 6/6] firmware: tegra: bpmp: Add support for DRAM MRQ GSCs Message-ID: References: <20230511132048.1122075-1-pdeschrijver@nvidia.com> <20230511132048.1122075-7-pdeschrijver@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-NVConfidentiality: public X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT109:EE_|DS0PR12MB8575:EE_ X-MS-Office365-Filtering-Correlation-Id: 8fed3349-8bc0-4751-6e4d-08db6812a774 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: x8WwRFPzillpobBpmB0acOrJo83HiDUrx7TZlOdZwkURbDSwkZjdp/kVrZdD2wUyy6Fpo0Zcn072Ko0Jd6GZjS82i1M2zHIxOaLotpB7CSdQFmAIvkShBobx3e2R34unliO2vyJ8tKr71HY8w9+tGrcKJgS/s6qwtJ2JAojpqTEx2WOk6Fxiji35jRVMgFiQcGHak7WzaV2cyHHt60UsdFq6ExbeERSLubjuds5R93hYtbqsl1UrdJ3p+wMR+J74nwZnkKY+0S/ovOLrGG+JGEGxcl6fDe4nbf4tMSIzvLbhulEpN8ipBSGb0Ep0wbftX2BvwM0Y2zN1m4bqVsvEnEU47woI7/7/4wEWNHDYZ82nurrx/aGyduSt18eHUg9PwVd1ndIfV6nBZvJd1487CZW3RpeztO1sDFxgt+p2CP/7tHDqW30oTddmsDxvvHj2BKx3Jpg5hOcfP5o3MJuoeeyGZRL8+KXGWb6vLDQJ/43odFKsQkx3jOqr6kaC5hO4pETmkTUDjlPEPHwveeyPqGga+sI0e0KabDx8lhvzJOG0yUAtzdDs4a7B/7G76qfvK34n5k5EFD84DsZquSc2EaL++XKmWcPz36n13HvJfyr0np3wLjN7koSmj/oAY4J/I7Jv97xeuo8vDnG2A9nyhAtWSJ/sPs9iU80R8WGy6XbGHkkW5odOWaIayv5XofLYMpltw40JVFczRvaIVX4stRm2AoVaHbQxiCuC3VSi9GL/cFy/QpOpKOmbgm+lca8b X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230028)(4636009)(7916004)(396003)(376002)(346002)(39860400002)(136003)(451199021)(36840700001)(40470700004)(46966006)(83380400001)(426003)(336012)(478600001)(8936002)(8676002)(316002)(41300700001)(70586007)(356005)(54906003)(70206006)(86362001)(40460700003)(4326008)(6916009)(5660300002)(7636003)(40480700001)(47076005)(82310400005)(36860700001)(82740400003)(2906002)(26005)(186003)(33716001)(9686003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jun 2023 11:22:32.9620 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8fed3349-8bc0-4751-6e4d-08db6812a774 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT109.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8575 Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On Wed, Jun 07, 2023 at 05:57:39PM +0200, Thierry Reding wrote: > > No, on the contrary, now it's clear you can either have void __iomem * > > and struct gen_pool * or void *virt but not both. > > No, it's not clear. You can have one part of your driver write the > sram.virt field and another read dram.virt and they'll end up pointing > at the same memory location but with different meaning. That's why you > need to introduce the enumeration in order to specify which one of the > two you want to pick. > > And that's exactly where you start introducing the potential for > inconsistency: now you need to be extra careful that the enumeration and > the unions are set correctly. You effectively have two sources of truth > and they don't necessarily match. You can also end up (at least > theoretically) with the invalid value, so you need an extra check for > that too. > > You can avoid all of those inconsistencies if you reduce this to one > source of truth, namely the pointers that you're going to use. > There are 4 possible states for these pointers: both NULL both non-NULL sram pointer NULL, dram pointer non-NULL dram pointer NULL, sram pointer non-NULL So how is this one source of truth? Peter.