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[2003:e4:1f4b:7100:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id y24-20020a17090629d800b0098822e05539sm8801848eje.191.2023.07.17.00.16.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jul 2023 00:16:45 -0700 (PDT) Date: Mon, 17 Jul 2023 09:16:44 +0200 From: Thierry Reding To: Svyatoslav Ryhel Cc: Dmitry Osipenko , David Heidelberg , Raffaele Tranquillini , Ion Agorria , Maxim Schwalm , Pedro =?utf-8?Q?=C3=82ngelo?= , Matt Merhar , Zack Pearsall , linux-tegra@vger.kernel.org Subject: Re: LVDS panel compatible strings Message-ID: References: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="d1wotkiI0vZrTaFJ" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.2.10 (2023-03-25) Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org --d1wotkiI0vZrTaFJ Content-Type: multipart/mixed; boundary="k/CojhKxWPI8Y+Qc" Content-Disposition: inline --k/CojhKxWPI8Y+Qc Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jul 14, 2023 at 06:57:01PM +0300, Svyatoslav Ryhel wrote: > =D0=BF=D1=82, 14 =D0=BB=D0=B8=D0=BF. 2023=E2=80=AF=D1=80. =D0=BE 18:16 Th= ierry Reding =D0=BF=D0=B8=D1=88=D0=B5: > > > > On Fri, Jul 14, 2023 at 06:00:43PM +0300, Svyatoslav Ryhel wrote: > > > =D0=BF=D1=82, 14 =D0=BB=D0=B8=D0=BF. 2023=E2=80=AF=D1=80. =D0=BE 17:3= 8 Thierry Reding =D0=BF=D0=B8=D1=88=D0=B5: > > > > > > > > Hi everyone, > > > > > > > > I've been working on converting all Tegra-related device tree bindi= ngs > > > > to json-schema so that eventually we can fully validate device tree > > > > files. Getting all the bindings reviewed and merged has been slow, = but > > > > I have a local tree where pretty much all validation errors and war= nings > > > > have been fixed. The remaining warnings that I'm not sure how to re= solve > > > > are these: > > > > > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-tilapia-E1565.dtb:= display-panel: compatible:0: 'panel-lvds' is not one of ['auo,b101ew05', '= tbs,a711-panel'] > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-tilapia-E1565.dtb:= display-panel: compatible: ['panel-lvds'] is too short > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-tilapia-E1565.dtb:= display-panel: Unevaluated properties are not allowed ('compatible' was un= expected) > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-E1565.dtb:= display-panel: compatible:0: 'panel-lvds' is not one of ['auo,b101ew05', '= tbs,a711-panel'] > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-E1565.dtb:= display-panel: compatible: ['panel-lvds'] is too short > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-E1565.dtb:= display-panel: Unevaluated properties are not allowed ('compatible' was un= expected) > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-PM269.dtb:= display-panel: compatible:0: 'panel-lvds' is not one of ['auo,b101ew05', '= tbs,a711-panel'] > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-PM269.dtb:= display-panel: compatible: ['panel-lvds'] is too short > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-PM269.dtb:= display-panel: Unevaluated properties are not allowed ('compatible' was un= expected) > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dtb: display-= panel: compatible:0: 'panel-lvds' is not one of ['auo,b101ew05', 'tbs,a711-= panel'] > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dtb: display-= panel: compatible: ['panel-lvds'] is too short > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dtb: display-= panel: Unevaluated properties are not allowed ('compatible' was unexpected) > > > > from schema $id: http://devicetree.org/schemas/display/pane= l/panel-lvds.yaml# > > > > > > Hello Thierry! Pegatron Chagall uses a Hannstar similar to one used in > > > ASUS TF201 but unfortunately it is not compatible with existing simple > > > panel setup (blurry image if used). My assumption is that chagall as > > > different revision of this panel like HSD101PWW3-B00 or > > > HSD101PWW1-A00 which is more likely or panel is highly modified which > > > is unlikely. I propose to use "hannstar,hsd101pww1" which is more wide > > > spread. > > > > Interesting. So is the problem the HSD101PWW2 timings that are off, or > > is it because the panel-lvds code does something special to make this > > blurry image go away? > > > timings are different For cases where the timings are the only things that differ, the DT bindings allow overriding the timings specifically. So you might get away with using one of the existing panels if it is close enough and patch up the timings in DT. Comparing what you've got for Chagall, the porches exceed what the HSD101PWW2 allows, but the timing values in the simple-panel driver look a little arbitrary, to be honest, so I think those could be extended. Looking at a datasheet that I found online, it's very unspecific about the porch lengths since it only mentions minimum, typical and maximum values for the total frame blanking times: vertical: 3, 23, 223 horizontal: 54, 160, 681 So I think we can be more generous in how these are split up. So we could for example do this: --- >8 --- diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/p= anel-simple.c index 18dc251749fb..b2fb7943f2ed 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -2108,13 +2108,13 @@ static const struct panel_desc hannstar_hsd100pxn1 = =3D { static const struct display_timing hannstar_hsd101pww2_timing =3D { .pixelclock =3D { 64300000, 71100000, 82000000 }, .hactive =3D { 1280, 1280, 1280 }, - .hfront_porch =3D { 1, 1, 10 }, - .hback_porch =3D { 1, 1, 10 }, - .hsync_len =3D { 58, 158, 661 }, + .hfront_porch =3D { 1, 1, 64 }, + .hback_porch =3D { 1, 1, 64 }, + .hsync_len =3D { 58, 158, 553 }, .vactive =3D { 800, 800, 800 }, - .vfront_porch =3D { 1, 1, 10 }, - .vback_porch =3D { 1, 1, 10 }, - .vsync_len =3D { 1, 21, 203 }, + .vfront_porch =3D { 1, 1, 32 }, + .vback_porch =3D { 1, 1, 32 }, + .vsync_len =3D { 1, 21, 159 }, .flags =3D DISPLAY_FLAGS_DE_HIGH, }; =20 --- >8 --- And then we could move the compatible string from simple to LVDS: --- >8 --- diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yam= l b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml index 929fe046d1e7..344e5df40c2f 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml @@ -40,6 +40,8 @@ properties: items: - enum: - auo,b101ew05 + # HannStar Display Corp. HSD101PWW2 10.1" WXGA (1280x800) LVDS p= anel + - hannstar,hsd101pww2 - tbs,a711-panel =20 - const: panel-lvds diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.y= aml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index df1cec8fd21b..f4d9da4afefd 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -168,8 +168,6 @@ properties: - hannstar,hsd070pww1 # HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel - hannstar,hsd100pxn1 - # HannStar Display Corp. HSD101PWW2 10.1" WXGA (1280x800) LVDS pan= el - - hannstar,hsd101pww2 # Hitachi Ltd. Corporation 9" WVGA (800x480) TFT LCD panel - hit,tx23d38vm0caa # InfoVision Optoelectronics M133NWF4 R0 13.3" FHD (1920x1080) TFT= LCD panel diff --git a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts b/arch/a= rm/boot/dts/nvidia/tegra30-pegatron-chagall.dts index c81d5875c31c..4012f9c799a8 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts +++ b/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts @@ -2628,7 +2628,7 @@ cpu3: cpu@3 { }; =20 display-panel { - compatible =3D "panel-lvds"; + compatible =3D "hannstar,hsd101pww2", "panel-lvds"; =20 width-mm =3D <217>; height-mm =3D <136>; --- >8 --- That gets rid of the DT validation warning for me. Would you be able to test this on actual hardware? I think the compatible matching would result in this matching the simple-panel driver and that does have some support for LVDS, but I'm not sure if it's exactly equal to what you get with only the panel-lvds matching, which makes this get handled by the panel-lvds driver. I'm attaching the full patch to make it a bit easier to apply this. Thierry --k/CojhKxWPI8Y+Qc Content-Type: text/plain; charset=us-ascii Content-Disposition: inline; filename="0001-WIP-Use-Hannstar-HSD101PWW2-on-Pegatron-Chagall.patch" Content-Transfer-Encoding: quoted-printable =46rom d45f49a40b0e9db07cb4fcdcaafd29e1453e8001 Mon Sep 17 00:00:00 2001 =46rom: Thierry Reding Date: Mon, 17 Jul 2023 09:15:33 +0200 Subject: [PATCH] WIP: Use Hannstar HSD101PWW2 on Pegatron Chagall Signed-off-by: Thierry Reding --- .../bindings/display/panel/panel-lvds.yaml | 2 ++ .../bindings/display/panel/panel-simple.yaml | 2 -- .../arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts | 2 +- drivers/gpu/drm/panel/panel-simple.c | 12 ++++++------ 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yam= l b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml index 929fe046d1e7..344e5df40c2f 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml @@ -40,6 +40,8 @@ properties: items: - enum: - auo,b101ew05 + # HannStar Display Corp. HSD101PWW2 10.1" WXGA (1280x800) LVDS p= anel + - hannstar,hsd101pww2 - tbs,a711-panel =20 - const: panel-lvds diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.y= aml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index df1cec8fd21b..f4d9da4afefd 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -168,8 +168,6 @@ properties: - hannstar,hsd070pww1 # HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel - hannstar,hsd100pxn1 - # HannStar Display Corp. HSD101PWW2 10.1" WXGA (1280x800) LVDS pan= el - - hannstar,hsd101pww2 # Hitachi Ltd. Corporation 9" WVGA (800x480) TFT LCD panel - hit,tx23d38vm0caa # InfoVision Optoelectronics M133NWF4 R0 13.3" FHD (1920x1080) TFT= LCD panel diff --git a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts b/arch/a= rm/boot/dts/nvidia/tegra30-pegatron-chagall.dts index c81d5875c31c..4012f9c799a8 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts +++ b/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts @@ -2628,7 +2628,7 @@ cpu3: cpu@3 { }; =20 display-panel { - compatible =3D "panel-lvds"; + compatible =3D "hannstar,hsd101pww2", "panel-lvds"; =20 width-mm =3D <217>; height-mm =3D <136>; diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/p= anel-simple.c index 18dc251749fb..b2fb7943f2ed 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -2108,13 +2108,13 @@ static const struct panel_desc hannstar_hsd100pxn1 = =3D { static const struct display_timing hannstar_hsd101pww2_timing =3D { .pixelclock =3D { 64300000, 71100000, 82000000 }, .hactive =3D { 1280, 1280, 1280 }, - .hfront_porch =3D { 1, 1, 10 }, - .hback_porch =3D { 1, 1, 10 }, - .hsync_len =3D { 58, 158, 661 }, + .hfront_porch =3D { 1, 1, 64 }, + .hback_porch =3D { 1, 1, 64 }, + .hsync_len =3D { 58, 158, 553 }, .vactive =3D { 800, 800, 800 }, - .vfront_porch =3D { 1, 1, 10 }, - .vback_porch =3D { 1, 1, 10 }, - .vsync_len =3D { 1, 21, 203 }, + .vfront_porch =3D { 1, 1, 32 }, + .vback_porch =3D { 1, 1, 32 }, + .vsync_len =3D { 1, 21, 159 }, .flags =3D DISPLAY_FLAGS_DE_HIGH, }; =20 --=20 2.41.0 --k/CojhKxWPI8Y+Qc-- --d1wotkiI0vZrTaFJ Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmS06tkACgkQ3SOs138+ s6EqBhAAhXBUoN7Ma8R6yJF18SNPmoxHy8UJLA+Nec+j+8v/lgeIOKv+Loi93SyA s3wv9d2SVN1Y5UXs4bmMj4ywdxi9WKGQqV24YYNJ4SztodxeYfG+Q9M3WH72zEN/ 1sIA7rVnx29x4fCmhMgzFi8T6YwFlQrH6DD2qF2awERIDIjmekaqfD1kTFLuUvby 7iQtFFUeYJkjWIod1H/4lWL8rKH2T/MbuVFJ8Jrvuco7jXTCQyr1+N7gZU37fzUn M6a3y1BsYWTZcHAam2vZ2ahZLw0HHv0vrxssbQudSCCg7y5nSEzEO3yaP2e8JLwC 7axojOlK0EjRh38zcYyHqCmByA/AVTi6zZKGFcO0idIf2O9dXw0cjysu8umotkLe dKZOvRG3oeeU6z8dLfUHadHnkD7cZfnpVgwaoDUKza2KqAirVLxvsDdidWYOKWip VssnsE19Na1Rgu+/v/paZ1u3T79xis0REXPHydXAkjnlQjll2WZiTxBwR7YoVI7K +HtTfwcWbTBdiXR2NN7e7FL2Wh6sbDu4pddJ6EJq1lslBRtsQQXedsXYotntO/gC pWU4PEUVIww5Nad08Osv1/47BNZYJBazaQjobx0dDya/H/bRRrAC+vakTUdXZgYD eEE//VqglHFUJftpMl7dUAThrJzlS80ioEUCg2316lIqyP5BG4U= =0yiq -----END PGP SIGNATURE----- --d1wotkiI0vZrTaFJ--