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[94.29.46.111]) by smtp.googlemail.com with ESMTPSA id v10sm335570ljp.125.2021.12.10.07.15.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 Dec 2021 07:15:29 -0800 (PST) Subject: Re: [PATCH 01/25] ARM: tegra: Clean up external memory controller nodes To: Thierry Reding Cc: Jon Hunter , linux-tegra@vger.kernel.org References: <20211209173356.618460-1-thierry.reding@gmail.com> <20211209173356.618460-2-thierry.reding@gmail.com> From: Dmitry Osipenko Message-ID: Date: Fri, 10 Dec 2021 18:15:27 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org 10.12.2021 15:17, Thierry Reding пишет: > On Thu, Dec 09, 2021 at 11:01:10PM +0300, Dmitry Osipenko wrote: >> 09.12.2021 20:33, Thierry Reding пишет: >>> From: Thierry Reding >>> >>> The external memory controller should be sorted after the memory >>> controller to keep the ordering by unit-address intact. >> >> "sorted after the memory controller, I don't understand what this means. >> Please clarify. > > In device tree we sort nodes by unit-address. In these files the > external memory controller device tree nodes (which have a higher unit- > address than the memory controller device tree nodes) was listed before > the memory controller device tree node. This fixes the order by sorting > the nodes correctly. > > Guess "sort after" doesn't really exist, but I thought it'd be clear > enough in the context to avoid using so many words. Guess I was wrong. Now I see what you did, thanks. >>> While at it, >>> rename the emc-timings and timing nodes to avoid including the RAM code >>> and clock frequency in their names. There is no requirement to do this, >>> so we can use simple enumerations instead. >>> >>> Signed-off-by: Thierry Reding >>> --- >>> arch/arm/boot/dts/tegra124-apalis-emc.dtsi | 483 +++-- >>> .../arm/boot/dts/tegra124-jetson-tk1-emc.dtsi | 699 +++--- >>> arch/arm/boot/dts/tegra124-nyan-big-emc.dtsi | 1918 +++++++++-------- >>> .../arm/boot/dts/tegra124-nyan-blaze-emc.dtsi | 639 +++--- >>> 4 files changed, 1900 insertions(+), 1839 deletions(-) >> >> It's very suspicious that you changed only T124. This all doesn't look >> good to me. >> >> Please either explain it all or drop this patch. > > Well, on other SoCs the order of the MC vs. EMC was correct, so I didn't > have to touch those and therefore didn't fix up the numbering while at > it. What exactly is suspicous about that? > > I'll go and update all of those files as well if that makes you happy. You renamed only the T124 timings here. This is similar to another patch where you partially removed the reg-shift, which is incorrect to do. If you'll split this patch into two and rename all the timings consistently in a separate patch, then I'll be happy. Please note that you'll also have to change the new DTs if you're going to take them into 5.17.