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From: Thierry Reding <thierry.reding@kernel.org>
To: Mikko Perttunen <mperttunen@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>,
	 Jonathan Hunter <jonathanh@nvidia.com>,
	Nicolas Chauvet <kwizart@gmail.com>,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH] [RFC] drm/tegra: fixup primary/overlay format for tegra210
Date: Tue, 24 Mar 2026 12:42:16 +0100	[thread overview]
Message-ID: <acJ3g4_DXDLBw5oO@orome> (raw)
In-Reply-To: <10027014.CDJkKcVGEf@senjougahara>

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On Tue, Mar 24, 2026 at 04:05:19PM +0900, Mikko Perttunen wrote:
> On Monday, March 23, 2026 10:07 PM Nicolas Chauvet wrote:
> > The primary_format and overlay_format were picked from earlier tegra114
> > generation instead of using the previous tegra124 format leading to
> > missing format.
> > 
> > This patch is RFC because while it's unlikely that format availability
> > have skipped to earlier tegra210 soc generation I haven't confirmed
> > any runtime error nor experienced any regression by the lack of
> > availability of theses format.
> > 
> > Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
> > ---
> >  drivers/gpu/drm/tegra/dc.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> > index 06370b7e0e56..d5896f12f25f 100644
> > --- a/drivers/gpu/drm/tegra/dc.c
> > +++ b/drivers/gpu/drm/tegra/dc.c
> > @@ -2942,10 +2942,10 @@ static const struct tegra_dc_soc_info
> > tegra210_dc_soc_info = { .has_powergate = true,
> >  	.coupled_pm = false,
> >  	.has_nvdisplay = false,
> > -	.num_primary_formats = ARRAY_SIZE(tegra114_primary_formats),
> > -	.primary_formats = tegra114_primary_formats,
> > -	.num_overlay_formats = ARRAY_SIZE(tegra114_overlay_formats),
> > -	.overlay_formats = tegra114_overlay_formats,
> > +	.num_primary_formats = ARRAY_SIZE(tegra124_primary_formats),
> > +	.primary_formats = tegra124_primary_formats,
> > +	.num_overlay_formats = ARRAY_SIZE(tegra124_overlay_formats),
> > +	.overlay_formats = tegra124_overlay_formats,
> >  	.modifiers = tegra124_modifiers,
> >  	.has_win_a_without_filters = false,
> >  	.has_win_b_vfilter_mem_client = false,
> > --
> > 2.53.0
> 
> Looking at the TRMs, I think indeed Tegra210 also supports the 
> DRM_FORMAT_RGBX8888/DRM_FORMAT_BGRX8888 formats, so this patch should be 
> correct. Functionality-wise, the formats aren't handled currently in plane.c, 
> so I don't think there's any change in functionality.
> 
> These formats require enabling byteswap -- so do RGBA8888/BGRA8888, but 
> plane.c doesn't currently do that, so I wonder if these formats are just not 
> working right now.

It's been a really long time that I've looked at this, but if I recall
correctly at least on pre-Tegra186 we properly program the byteswap
registers (see DC_WIN_BYTE_SWAP in dc.c's tegra_dc_setup_window()). It
is possible that I never implemented this for Tegra186 and later, where
all the plane programming happens in hub.c with the shared planes.

I suspect that for Tegra210 we could add a bunch more formats, and I
have a vague recollection that I had prototypes a few more a long time
ago (notable some more YUV variants) but may never have submitted those
patches because I couldn't find a good way to test them.

Thierry

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  parent reply	other threads:[~2026-03-24 11:42 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-23 13:07 [PATCH] [RFC] drm/tegra: fixup primary/overlay format for tegra210 Nicolas Chauvet
2026-03-23 13:07 ` Nicolas Chauvet
2026-03-24  7:05 ` Mikko Perttunen
2026-03-24 11:32   ` Nicolas Chauvet
2026-03-24 11:42   ` Thierry Reding [this message]
2026-03-25  0:50     ` Mikko Perttunen

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