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[34.124.234.44]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2baf1d26944sm25742125ad.10.2026.05.08.10.00.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 10:00:39 -0700 (PDT) Date: Fri, 8 May 2026 17:00:32 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Jonathan Hunter , Joerg Roedel , linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, Robin Murphy , Thierry Reding , Krishna Reddy , Will Deacon , David Matlack , Pasha Tatashin , patches@lists.linux.dev, Samiullah Khawaja , Mostafa Saleh Subject: Re: [PATCH 3/9] iommu/arm-smmu-v3: Use the HW arm_smmu_cmd in cmdq submission functions Message-ID: References: <0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> <3-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> <20260508160041.GF9254@nvidia.com> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260508160041.GF9254@nvidia.com> On Fri, May 08, 2026 at 01:00:41PM -0300, Jason Gunthorpe wrote: > On Fri, May 08, 2026 at 08:27:26AM +0000, Pranjal Shrivastava wrote: > > > /* Should be installed after arm_smmu_install_ste_for_dev() */ > > > @@ -4823,7 +4826,8 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > > > { > > > int ret; > > > u32 reg, enables; > > > - struct arm_smmu_cmdq_ent cmd; > > > + struct arm_smmu_cmdq_ent ent; > > > > This shouldn't be uninitialized, we only seem to be setting ent.opcode > > later in the function. > > Yes, that's how the existing code is. > > struct arm_smmu_cmdq_ent cmd; > > cmd.opcode = CMDQ_OP_CFGI_ALL; > arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); > > cmd.opcode = CMDQ_OP_TLBI_EL2_ALL; > arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); > > cmd.opcode = CMDQ_OP_TLBI_NSNH_ALL; > arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); > > > Since arm_smmu_cmdq_build_cmd reads other fields > > of ent to build the cmd, we are potentially sending stack garbage in ent > > Ah, it is tricky, it doesn't: > > static int arm_smmu_cmdq_build_cmd(u64 *cmd, struct arm_smmu_cmdq_ent *ent) > { > memset(cmd, 0, 1 << CMDQ_ENT_SZ_SHIFT); > cmd[0] |= FIELD_PREP(CMDQ_0_OP, ent->opcode); > > switch (ent->opcode) { Right! > case CMDQ_OP_TLBI_EL2_ALL: > case CMDQ_OP_TLBI_NSNH_ALL: > break; > [..] > case CMDQ_OP_CFGI_ALL: > /* Cover the entire SID range */ > cmd[1] |= FIELD_PREP(CMDQ_CFGI_1_RANGE, 31); > break; > > Only opcode is used, so it's "fine" > > Later patches remove ent and this trickyness so let's just leave it: Ack. Sure. No strong feelings here. Praan