From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B11A131F987; Thu, 14 May 2026 01:42:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778722975; cv=none; b=jh5uu7dOUPhqnFCZYN0GVcdEUJg0oaiI8Y+WNUpHxySfwX671UdquLcRY/ruvps12MeXrtLUFxeaKq60XUdhYSAWkt1GhMx+wq1Eu9UrjiYFT0lt+iiWG1ekpN8uydYIL1al/nDPGRdiCDYcKq0bQ1KrwZZu78Vu3emz1rpnzkM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778722975; c=relaxed/simple; bh=oBhCuHah8JcJzRxbSplEMoBSn9c7+hDNbVI06xJE8n0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=S8mXB6oDdHQcSKOs2I6FVy9UeC7mlfqTEH4CmJj90lC4yflZvAsBpABnfmIEVlb8OvQxDHoh7y0gvF/T3C1PB/08oLcr0U5lvgSRcRBCbJKmFbWYWn4VMKTFhDp8h2s1ypguwx1hXo3iPmpUoq4BMs7VvjjZBwNRcGjxHmRlT5c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LUQEggTA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LUQEggTA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 35F06C19425; Thu, 14 May 2026 01:42:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778722975; bh=oBhCuHah8JcJzRxbSplEMoBSn9c7+hDNbVI06xJE8n0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=LUQEggTAnbX4mghOtvtXKy799oS38unx1v4B51VTgl0oxzaZHIsTAk+Ry6m2ICAjM wuw0qSH0EwNXwcWMmVOf5X7kiasv6J0sX73J3K2IbLorAOx1KyIpASgpQMO4lpMRFE 1855QjA+/cHbABktGQpZ0j14oMOIDBq4PAV73j+WRSUU4eraKAR4mtxxPFqzH2c+pm //n86azelmDEacVYHBeumOhiBw3QOBqA4YibPkhizu4H6x7KWZiYmpeiQ3Q1YkgGSG ZAhLaPm/eegbbHtNhauBtVT0viC+mYbmzzq7l9BXpOzcneBho3WnJaOtsgA3FZvkyN 50leu6uVsOc9w== Date: Thu, 14 May 2026 09:42:49 +0800 From: "Peter Chen (CIX)" To: Svyatoslav Ryhel Cc: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Neil Armstrong , Thierry Reding , Jonathan Hunter , Greg Kroah-Hartman , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-tegra@vger.kernel.org, linux-usb@vger.kernel.org Subject: Re: [PATCH v1 2/6] usb: chipidea: tegra: Avoid controller/PHY init if bus is externally controlled Message-ID: References: <20260511135703.62470-1-clamor95@gmail.com> <20260511135703.62470-3-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On 26-05-13 20:30:10, Svyatoslav Ryhel wrote: > вт, 12 трав. 2026 р. о 10:51 Peter Chen (CIX) пише: > > > > On 26-05-12 09:13:40, Svyatoslav Ryhel wrote: > > > вт, 12 трав. 2026 р. о 04:16 Peter Chen (CIX) пише: > > > > > > > > On 26-05-11 16:56:57, Svyatoslav Ryhel wrote: > > > > > If the USB controller and PHY are externally controlled, then the > > > > > registration of the controller and the PHY initialization should be > > > > > skipped, since these configurations must be done by the device that > > > > > controls the bus to work correctly. > > > > > > > > > > > > > I find you only control USB controller device add at PHY driver, most of USB drivers > > > > has PHY control, for chipidea, it has PHY control at core.c, would please try to > > > > adapt for it? > > > > > > > > > > Usually yes, but this is not the case for Tegra unfortunately. As you > > > can see Tegra specific section of Chipidea driver specifically > > > describes why it has to set PHY manually. > > > > > > /* > > > * USB controller registers shouldn't be touched before PHY is > > > * initialized, otherwise CPU will hang because clocks are gated. > > > * PHY driver controls gating of internal USB clocks on Tegra. > > > */ > > > > > > So in order to provide correct work of USB when set by an external > > > device, both PHY and controller init/add must be skipped. > > > > You could call generic PHY APIs at ci_hdrc_tegra.c, after PHY init or power on, > > call controller initialization. > > > > I was tinkering with Chipidea driver for Tegra a bit. If you meant to > use flag only to control usb controller device init and leave PHY to > be handled by controller, then yes, that is possible and that is > better approach. > Yes, you may summarize the initialization sequence, and see if put PHY control at Tegra glue layer or at Chipidea core. -- Best regards, Peter