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Tue, 2 Jun 2026 13:08:27 -0700 Date: Tue, 2 Jun 2026 13:08:26 -0700 From: Nicolin Chen To: Will Deacon CC: Ashish Mhetre , , , , , , , Subject: Re: [PATCH v3 1/3] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions Message-ID: References: <20260601104845.995005-1-amhetre@nvidia.com> <20260601104845.995005-2-amhetre@nvidia.com> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A349:EE_|CH2PR12MB4248:EE_ X-MS-Office365-Filtering-Correlation-Id: 88cb20eb-8eaf-4a29-68e6-08dec0e2c2eb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700016|56012099006|4143699003|11063799006|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: PQJzXfpb8SG3q8VkRZZdBPCobKHjcwDlWTS+wUyO9Il5+MAbuVfJXyseY5fBeKVxci0JSJkrwMmAeTD/bWcIfQJpXxAocCKaN9ptBYFDsYLKLaMe7aSMMufDswdMDx+ZwkJleQSHTuK6rA2FTa9LBZk2kZHgRwmD7MarY5ogrfAC9ksn8PWChysJ0wb0NcB4ms/rPHq9YrEOVB3SeniPZQElAV4YngaE6qem/8Fni8gcSB5bN9vdjArzlQR3n1Edx1rBI1YsrAeTUJ7gQL8RfpWJYgOBcM8jaYaQQYKTTO7FuirpyQ2d4YcRuQXl3+WlGYsQbwasMbRUGrkTR6xsdNuVAzBoieENX1PrrJvZ6Me/KZeZq84e0A5p17vIPpu0OoSf4AI3S1dmv+QtreatD6UJroPP5lOZeHw3Rl3qqzpSC7ZHDrnHxPrVyY/Lh1taEn7FZ5PB8m1UC/dmmVr1Z8un9T5rVJyuI7mdOzVDtIdgubaR1cMoyJWGG+Uoqg4U1eg/GdRvQJUx0YKf9z3rQkqWEcqR24BQo4oJeZXCKo19UG76DvpHep3JicZL+4ZWuV/DVnMvu2i6VKwGuvu/XBPkzM+t8/dMjrVhQ6Po0NwC5QdhnC360XnSByP3YwUUUOjs+XuNnguuBJ9AEpjmHgjb6gUAbvbhpOq00DT8tmASTZOq7f3uaaoswfl4V9o2G/TuFbfmi8RF+jIJRg2vFGPCUbFBZdfwDD/JXHxqE64= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(36860700016)(56012099006)(4143699003)(11063799006)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 12/JF6ehxvEA7Wlt4eeIV9GZxGdwMosZZwqEVTGLKdR+EKVawrxmcScVL0KcM4G4N+xts2zf4jpqpZLCrArjzHxnift+mP2MrESdHgKvlhNuvGmoGDEBVG1UFM+CCK5//vVyNaeVwPxFKchOpfqbLCSse18fMo/sqfFs9BOZ6kGqOTBQ1kkenrj0akCiMfdYyFmI44uDEgr+kQbi7HGw15LhYVgD4VqWXq/1WwkQcP2lA5eljkbJcUzvZLq78shxijIIDP9J0MIkID+X3vOdqWsfHWIB/tFs2JZXVxzxYrtlluH4LVNnqrxHvyaI3rAaKeWZB1qB2ZM/MjIGQspvzJW3M/BCiHueq0sZzmAtwurO9qqmFmeqoib+D7bP31tJD+KcUo5PeKMPL02RagqtgGL43bXtWQCN1VfLsnhpeirKD02a9Bh8+zrPj0awrWc+ X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2026 20:08:49.7273 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 88cb20eb-8eaf-4a29-68e6-08dec0e2c2eb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A349.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4248 On Tue, Jun 02, 2026 at 08:55:10PM +0100, Will Deacon wrote: > On Mon, Jun 01, 2026 at 10:48:43AM +0000, Ashish Mhetre wrote: > > From: Nicolin Chen > > > > arm_smmu_cmdq_batch_add_cmd_p() carries two distinct reasons for > > flushing the current batch with a CMD_SYNC before appending the > > new command: > > > > - The batch's pre-assigned cmdq does not support the new command. > > - The Arm erratum 2812531 workaround (ARM_SMMU_OPT_CMDQ_FORCE_SYNC) > > forces a SYNC at one entry before the batch is full. > > > > Lift those checks into a new arm_smmu_cmdq_batch_force_sync() helper > > so that adding another force-sync condition becomes a one-line > > addition. No functional change. > > > > Signed-off-by: Nicolin Chen > > Signed-off-by: Ashish Mhetre > > --- > > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 26 ++++++++++++++++----- > > 1 file changed, 20 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > index 9be589d14a3b..4d29bd343460 100644 > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > @@ -847,16 +847,30 @@ static void arm_smmu_cmdq_batch_init_cmd(struct arm_smmu_device *smmu, > > cmds->cmdq = arm_smmu_get_cmdq(smmu, cmd); > > } > > > > +static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu, > > + struct arm_smmu_cmdq_batch *cmds, > > + struct arm_smmu_cmd *cmd) > > +{ > > + if (!cmds->num) > > + return false; > > This check seems new? You are right. Maybe the commit message should have mentioned that there is a slight behavior change to the unsupported_cmd path: - Before: if cmds->num = 0 && unsupported_cmd, it would issue an empty batch (one CMD_SYNC) - After : if cmds->num = 0, no issue on the empty batch With that, I think it's good to have? Thanks Nicolin