From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: "bhelgaas@google.com" <bhelgaas@google.com>,
"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
"kwilczynski@kernel.org" <kwilczynski@kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
Jon Hunter <jonathanh@nvidia.com>,
"kishon@kernel.org" <kishon@kernel.org>,
"arnd@arndb.de" <arnd@arndb.de>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"Frank.Li@nxp.com" <Frank.Li@nxp.com>,
"den@valinux.co.jp" <den@valinux.co.jp>,
"hongxing.zhu@nxp.com" <hongxing.zhu@nxp.com>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
Vidya Sagar <vidyas@nvidia.com>,
"cassel@kernel.org" <cassel@kernel.org>,
"18255117159@163.com" <18255117159@163.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v7 08/13] PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP
Date: Mon, 16 Mar 2026 09:11:53 +0530 [thread overview]
Message-ID: <b60bd5ae-eeb7-4e17-801c-5791f6bbf0b3@nvidia.com> (raw)
In-Reply-To: <gnescgbeasa6x5orwtji76qia4e7pwmjsjiehq6ox2a2apzpxq@cfwwzkyjmdlo>
On 16/03/26 7:01 am, Manivannan Sadhasivam wrote:
> On Sun, Mar 15, 2026 at 07:24:48PM +0530, Manikanta Maddireddy wrote:
>>
>>
>> On 05/03/26 3:49 pm, Manivannan Sadhasivam wrote:
>>> On Tue, Mar 03, 2026 at 12:24:43PM +0530, Manikanta Maddireddy wrote:
>>>> From: Vidya Sagar <vidyas@nvidia.com>
>>>>
>>>> PERST# and CLKREQ# pinctrl settings should be applied for both Root Port
>>>> and Endpoint mode. Move pinctrl_pm_select_default_state() function call
>>>> from Root Port specific configuration function to probe().
>>>>
>>>
>>> Why should this driver care about setting default pinctrl state? Why can't it
>>> rely on the pinctrl framework as like other drivers?
>>>
>>> - Mani
>>
>> pinctrl framework doesn't know if PCIe controller is going to be configured
>> in Endpoint or Root port mode. In Root port mode PERST# signal should be
>> configured as special function IO pin(SFIO) and in Endpoint mode it should
>> be configured as general purpose IO pin(GPIO). So, PCIe driver should
>> request appropriate pinctl values.
>>
>
> So you are saying that irrespective of board design, you can configure the
> controller in host/endpoint mode? Is it possible? Dual mode controllers are
> quite common in other SoCs, but they rely on devicetree to either configure the
> controller in host or endpoint mode.
>
> If the devicetree enables the endpoint node, why can't it also define the
> pinctrl config?
>
> - Mani
>
Root Port and Endpoint role switch is through device tree only.
pinctrl settings are defined in Root Port/Endpoint device tree node, but
to apply the pinctrl settings respective driver need to call
pinctrl_pm_select_default_state().
arch/arm64/boot/dts/nvidia/tegra234.dtsi
pcie-ep@140e0000 {
compatible = "nvidia,tegra234-pcie-ep";
...
pinctrl-names = "default";
pinctrl-0 = <&pex_rst_c10_in_state>;
...
}
arch/arm64/boot/dts/nvidia/tegra194.dtsi
pcie@141a0000 {
compatible = "nvidia,tegra194-pcie";
...
pinctrl-names = "default";
pinctrl-0 = <&pex_rst_c5_out_state>,
<&pex_clkreq_c5_bi_dir_state>;
...
}
- Manikanta
--
nvpublic
next prev parent reply other threads:[~2026-03-16 3:42 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-03 6:54 [PATCH v7 00/13] Fixes to pcie-tegra194 driver Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 01/13] PCI: tegra194: Fix polling delay for L2 state Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 02/13] PCI: tegra194: Refactor LTSSM state polling on surprise down Manikanta Maddireddy
2026-03-05 9:31 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 03/13] PCI: tegra194: Don't force the device into the D0 state before L2 Manikanta Maddireddy
2026-03-05 9:40 ` Manivannan Sadhasivam
2026-03-15 13:21 ` Manikanta Maddireddy
2026-03-16 1:25 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 04/13] PCI: tegra194: Disable PERST IRQ only in Endpoint mode Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 05/13] PCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select" Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 06/13] PCI: tegra194: Disable direct speed change for EP Manikanta Maddireddy
2026-03-05 9:43 ` Manivannan Sadhasivam
2026-03-15 13:44 ` Manikanta Maddireddy
2026-03-16 1:27 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 07/13] PCI: tegra194: Set LTR message request before PCIe link up Manikanta Maddireddy
2026-03-05 10:18 ` Manivannan Sadhasivam
2026-03-15 13:49 ` Manikanta Maddireddy
2026-03-16 1:28 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 08/13] PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP Manikanta Maddireddy
2026-03-05 10:19 ` Manivannan Sadhasivam
2026-03-15 13:54 ` Manikanta Maddireddy
2026-03-16 1:31 ` Manivannan Sadhasivam
2026-03-16 3:41 ` Manikanta Maddireddy [this message]
2026-03-16 4:26 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 09/13] PCI: tegra194: Allow system suspend when the Endpoint link is not up Manikanta Maddireddy
2026-03-05 10:29 ` Manivannan Sadhasivam
2026-03-15 14:10 ` Manikanta Maddireddy
2026-03-16 1:34 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 10/13] PCI: tegra194: Free up EP resources during remove() Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 11/13] PCI: tegra194: Use HW version number Manikanta Maddireddy
2026-03-05 10:34 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 12/13] PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 13/13] PCI: tegra194: Free resources during controller deinitialization Manikanta Maddireddy
2026-03-05 10:43 ` Manivannan Sadhasivam
2026-03-15 14:16 ` Manikanta Maddireddy
2026-03-16 1:35 ` Manivannan Sadhasivam
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