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Without the pinctrl definition, we do not get an IRQ when PERST# > is deasserted, so the PCIe controller never gets initialized. > > Add the missing definitions, so that the controller actually gets > initialized. > > Fixes: ec142c44b026 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT") > Fixes: 0580286d0d22 ("arm64: tegra: Add Tegra234 PCIe C4 EP definition") > Signed-off-by: Niklas Cassel > --- > Changes since v2: > -Add pinctrl definitions to all pcie-ep nodes, not just C4 controller. > > arch/arm64/boot/dts/nvidia/tegra234.dtsi | 57 ++++++++++++++++++++++++ > 1 file changed, 57 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi > index df034dbb82853..cc929e1a00744 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi > @@ -9,6 +9,7 @@ > #include > #include > #include > +#include > > / { > compatible = "nvidia,tegra234"; > @@ -127,6 +128,52 @@ gpio: gpio@2200000 { > pinmux: pinmux@2430000 { > compatible = "nvidia,tegra234-pinmux"; > reg = <0x0 0x2430000 0x0 0x19100>; > + > + pex_rst_c4_in_state: pinmux-pex-rst-c4-in { > + pex_rst { > + nvidia,pins = "pex_l4_rst_n_pl1"; > + nvidia,function = "rsvd1"; > + nvidia,pull = ; > + nvidia,tristate = ; > + nvidia,enable-input = ; > + }; > + }; > + pex_rst_c5_in_state: pinmux-pex-rst-c5-in { > + pex_rst { > + nvidia,pins = "pex_l5_rst_n_paf1"; > + nvidia,function = "rsvd1"; > + nvidia,pull = ; > + nvidia,tristate = ; > + nvidia,enable-input = ; > + }; > + }; > + pex_rst_c6_in_state: pinmux-pex-rst-c6-in { > + pex_rst { > + nvidia,pins = "pex_l6_rst_n_paf3"; > + nvidia,function = "rsvd1"; > + nvidia,pull = ; > + nvidia,tristate = ; > + nvidia,enable-input = ; > + }; > + }; > + pex_rst_c7_in_state: pinmux-pex-rst-c7-in { > + pex_rst { > + nvidia,pins = "pex_l7_rst_n_pag1"; > + nvidia,function = "rsvd1"; > + nvidia,pull = ; > + nvidia,tristate = ; > + nvidia,enable-input = ; > + }; > + }; > + pex_rst_c10_in_state: pinmux-pex-rst-c10-in { > + pex_rst { > + nvidia,pins = "pex_l10_rst_n_pag7"; > + nvidia,function = "rsvd1"; > + nvidia,pull = ; > + nvidia,tristate = ; > + nvidia,enable-input = ; > + }; > + }; > }; > > gpcdma: dma-controller@2600000 { > @@ -4630,6 +4677,8 @@ pcie-ep@140e0000 { > <&bpmp TEGRA234_RESET_PEX2_CORE_10>; > reset-names = "apb", "core"; > > + pinctrl-names = "default"; > + pinctrl-0 = <&pex_rst_c10_in_state>; > interrupts = ; /* controller interrupt */ > interrupt-names = "intr"; > > @@ -4881,6 +4930,8 @@ pcie-ep@14160000 { > <&bpmp TEGRA234_RESET_PEX0_CORE_4>; > reset-names = "apb", "core"; > > + pinctrl-names = "default"; > + pinctrl-0 = <&pex_rst_c4_in_state>; > interrupts = ; /* controller interrupt */ > interrupt-names = "intr"; > nvidia,bpmp = <&bpmp 4>; > @@ -5023,6 +5074,8 @@ pcie-ep@141a0000 { > <&bpmp TEGRA234_RESET_PEX1_CORE_5>; > reset-names = "apb", "core"; > > + pinctrl-names = "default"; > + pinctrl-0 = <&pex_rst_c5_in_state>; > interrupts = ; /* controller interrupt */ > interrupt-names = "intr"; > > @@ -5115,6 +5168,8 @@ pcie-ep@141c0000 { > <&bpmp TEGRA234_RESET_PEX1_CORE_6>; > reset-names = "apb", "core"; > > + pinctrl-names = "default"; > + pinctrl-0 = <&pex_rst_c6_in_state>; > interrupts = ; /* controller interrupt */ > interrupt-names = "intr"; > > @@ -5207,6 +5262,8 @@ pcie-ep@141e0000 { > <&bpmp TEGRA234_RESET_PEX2_CORE_7>; > reset-names = "apb", "core"; > > + pinctrl-names = "default"; > + pinctrl-0 = <&pex_rst_c7_in_state>; > interrupts = ; /* controller interrupt */ > interrupt-names = "intr"; > > -- > 2.51.0 > >