From: Dmitry Osipenko <dmitry.osipenko@collabora.com>
To: Ashish Mhetre <amhetre@nvidia.com>,
digetx@gmail.com, krzysztof.kozlowski@linaro.org,
thierry.reding@gmail.com, jonathanh@nvidia.com,
robh+dt@kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
krzysztof.kozlowski+dt@linaro.org
Cc: vdumpa@nvidia.com, Snikam@nvidia.com
Subject: Re: [Patch v7 2/4] memory: tegra: Add MC error logging on tegra186 onward
Date: Thu, 14 Apr 2022 00:17:41 +0300 [thread overview]
Message-ID: <c3af41bc-5d7e-660d-37b6-d0be80cd63b1@collabora.com> (raw)
In-Reply-To: <20220413094012.13589-3-amhetre@nvidia.com>
On 4/13/22 12:40, Ashish Mhetre wrote:
> +static inline u32 mc_ch_readl(const struct tegra_mc *mc, int ch,
> + unsigned long offset)
> +{
return 0 if mc->bcast_ch_regs==NULL
> + if (ch == MC_BROADCAST_CHANNEL)
> + return readl_relaxed(mc->bcast_ch_regs + offset);
> +
> + return readl_relaxed(mc->ch_regs[ch] + offset);
> +}
> +
> +static inline void mc_ch_writel(const struct tegra_mc *mc, int ch,
> + u32 value, unsigned long offset)
> +{
return if mc->bcast_ch_regs==NULL
> + if (ch == MC_BROADCAST_CHANNEL)
> + writel_relaxed(value, mc->bcast_ch_regs + offset);
> + else
> + writel_relaxed(value, mc->ch_regs[ch] + offset);
> +}
next prev parent reply other threads:[~2022-04-13 21:17 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-13 9:40 [Patch v7 0/4] memory: tegra: Add MC channels and error logging Ashish Mhetre
2022-04-13 9:40 ` [Patch v7 1/4] memory: tegra: Add memory controller channels support Ashish Mhetre
2022-04-13 21:17 ` Dmitry Osipenko
2022-04-14 5:35 ` Ashish Mhetre
2022-04-14 21:11 ` Dmitry Osipenko
2022-04-13 9:40 ` [Patch v7 2/4] memory: tegra: Add MC error logging on tegra186 onward Ashish Mhetre
2022-04-13 21:13 ` Dmitry Osipenko
2022-04-14 5:31 ` Ashish Mhetre
2022-04-14 21:14 ` Dmitry Osipenko
2022-04-13 21:17 ` Dmitry Osipenko [this message]
2022-04-14 20:36 ` Dmitry Osipenko
2022-04-13 9:40 ` [Patch v7 3/4] dt-bindings: memory: Update reg/reg-names validation Ashish Mhetre
2022-04-13 12:26 ` Rob Herring
2022-04-13 13:37 ` Rob Herring
2022-04-13 14:04 ` Dmitry Osipenko
2022-04-13 16:17 ` Ashish Mhetre
2022-04-13 21:09 ` Dmitry Osipenko
2022-04-14 4:07 ` Ashish Mhetre
2022-04-14 20:35 ` Dmitry Osipenko
2022-04-17 9:27 ` Ashish Mhetre
2022-04-24 5:20 ` Ashish Mhetre
2022-04-24 14:34 ` Krzysztof Kozlowski
2022-04-25 4:48 ` Ashish Mhetre
2022-04-13 9:40 ` [Patch v7 4/4] arm64: tegra: Add memory controller channels Ashish Mhetre
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