Re: [PATCH 07/12] PCI: tegra: Disable AFI dynamic clock gating

Vidya Sagar
2017-10-29T09:42:32Z

On Saturday 28 October 2017 12:59 AM, Manikanta Maddireddy wrote:
> When there are 32 outstanding writes from AFI to memory, the outstanding
> write counter overflows and indicates that there are "0" outstanding write
> transactions. This outstanding write counter is used to generate IDLE
> signal to dynamically gate the AFI clock.
>
> When memory controller is under heavy load, its possible that write
> completions will come back to AFI after long delay and AFI write counter
> overflows. AFI clock gets gated even when there are outstanding
> transactions towards memory controller resutling in system hang.
>
> Disable dynamic clock gating of AFI clock to avoid system hang.
>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
> drivers/pci/host/pci-tegra.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
> index 27a8211c48b2..b8cac871712b 100644
> --- a/drivers/pci/host/pci-tegra.c
> +++ b/drivers/pci/host/pci-tegra.c
> @@ -103,8 +103,9 @@
> #define AFI_MSI_EN_VEC6 0xa4
> #define AFI_MSI_EN_VEC7 0xa8
>
> -#define AFI_CONFIGURATION 0xac
> -#define AFI_CONFIGURATION_EN_FPCI (1 << 0)
> +#define AFI_CONFIGURATION 0xac
> +#define AFI_CONFIGURATION_EN_FPCI (1 << 0)
> +#define AFI_CONFIGURATION_CLKEN_OVERRIDE (1 << 31)
BIT macro is preferred here.
>
> #define AFI_FPCI_ERROR_MASKS 0xb0
>
> @@ -1057,9 +1058,10 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
> }
> }
>
> - /* finally enable PCIe */
> + /* Disable AFI dynamic clock gating and enable PCIe */
> value = afi_readl(pcie, AFI_CONFIGURATION);
> - value |= AFI_CONFIGURATION_EN_FPCI;
> + value |= (AFI_CONFIGURATION_EN_FPCI |
> + AFI_CONFIGURATION_CLKEN_OVERRIDE);
> afi_writel(pcie, value, AFI_CONFIGURATION);
>
> value = AFI_INTR_EN_INI_SLVERR | AFI_INTR_EN_INI_DECERR |