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It assists in > virtualizing the command queue for the SMMU. > > Update SMMU compatible strings to use nvidia,tegra264-smmu to enable > CMDQV support. Add device tree nodes for the CMDQV hardware and enable > them on the tegra264-p3834 platform where SMMUs are enabled. Each SMMU > instance is paired with its corresponding CMDQV instance via the > nvidia,cmdqv property. > > Signed-off-by: Ashish Mhetre > --- > .../arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 8 +++ > arch/arm64/boot/dts/nvidia/tegra264.dtsi | 55 +++++++++++++++++-- > 2 files changed, 58 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi > index 06795c82427a..375d122b92fa 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi > @@ -26,5 +26,13 @@ iommu@5000000 { > iommu@6000000 { > status = "okay"; > }; > + > + cmdqv@5200000 { > + status = "okay"; > + }; This needs to be ordered in the file according to its address. > + > + cmdqv@6200000 { > + status = "okay"; > + }; > }; > }; > diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi > index f137565da804..d8287b95221e 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi > @@ -3361,7 +3361,7 @@ bus@8100000000 { > <0x02 0x00000000 0xd0 0x00000000 0x08 0x80000000>; /* ECAM, prefetchable memory, I/O */ > > smmu1: iommu@5000000 { > - compatible = "arm,smmu-v3"; > + compatible = "nvidia,tegra264-smmu", "arm,smmu-v3"; > reg = <0x00 0x5000000 0x0 0x200000>; > interrupts = , > ; > @@ -3370,10 +3370,11 @@ smmu1: iommu@5000000 { > > #iommu-cells = <1>; > dma-coherent; > + nvidia,cmdqv = <&cmdqv1>; > }; > > smmu2: iommu@6000000 { > - compatible = "arm,smmu-v3"; > + compatible = "nvidia,tegra264-smmu", "arm,smmu-v3"; > reg = <0x00 0x6000000 0x0 0x200000>; > interrupts = , > ; > @@ -3382,6 +3383,23 @@ smmu2: iommu@6000000 { > > #iommu-cells = <1>; > dma-coherent; > + nvidia,cmdqv = <&cmdqv2>; > + }; > + > + cmdqv1: cmdqv@5200000 { Same here. Please order according to the address. > + compatible = "nvidia,tegra264-cmdqv"; > + status = "disabled"; > + > + reg = <0x00 0x5200000 0x0 0x830000>; > + interrupts = ; > + }; > + > + cmdqv2: cmdqv@6200000 { > + compatible = "nvidia,tegra264-cmdqv"; > + status = "disabled"; > + > + reg = <0x00 0x6200000 0x0 0x830000>; > + interrupts = ; > }; > > mc: memory-controller@8020000 { > @@ -3437,7 +3455,7 @@ emc: external-memory-controller@8800000 { > }; > > smmu0: iommu@a000000 { > - compatible = "arm,smmu-v3"; > + compatible = "nvidia,tegra264-smmu", "arm,smmu-v3"; > reg = <0x00 0xa000000 0x0 0x200000>; > interrupts = , > ; > @@ -3446,10 +3464,11 @@ smmu0: iommu@a000000 { > > #iommu-cells = <1>; > dma-coherent; > + nvidia,cmdqv = <&cmdqv0>; > }; > > smmu4: iommu@b000000 { > - compatible = "arm,smmu-v3"; > + compatible = "nvidia,tegra264-smmu", "arm,smmu-v3"; > reg = <0x00 0xb000000 0x0 0x200000>; > interrupts = , > ; > @@ -3458,6 +3477,23 @@ smmu4: iommu@b000000 { > > #iommu-cells = <1>; > dma-coherent; > + nvidia,cmdqv = <&cmdqv4>; > + }; > + > + cmdqv0: cmdqv@a200000 { And here. > + compatible = "nvidia,tegra264-cmdqv"; > + status = "disabled"; > + > + reg = <0x00 0xa200000 0x0 0x830000>; > + interrupts = ; > + }; > + > + cmdqv4: cmdqv@b200000 { > + compatible = "nvidia,tegra264-cmdqv"; > + status = "disabled"; > + > + reg = <0x00 0xb200000 0x0 0x830000>; > + interrupts = ; > }; > > i2c14: i2c@c410000 { > @@ -3690,7 +3726,7 @@ bus@8800000000 { > ranges = <0x00 0x00000000 0x88 0x00000000 0x01 0x00000000>; > > smmu3: iommu@6000000 { > - compatible = "arm,smmu-v3"; > + compatible = "nvidia,tegra264-smmu", "arm,smmu-v3"; > reg = <0x00 0x6000000 0x0 0x200000>; > interrupts = , > ; > @@ -3699,6 +3735,15 @@ smmu3: iommu@6000000 { > > #iommu-cells = <1>; > dma-coherent; > + nvidia,cmdqv = <&cmdqv3>; > + }; > + > + cmdqv3: cmdqv@6200000 { > + compatible = "nvidia,tegra264-cmdqv"; > + status = "disabled"; > + > + reg = <0x00 0x6200000 0x0 0x830000>; > + interrupts = ; > }; > > hda@90b0000 { -- nvpublic