[PATCH] dmaengine: tegra210-adma: fix global intr clear

[PATCH] dmaengine: tegra210-adma: fix global intr clear

[Mohan Kumar]

The current global interrupt clear programming register offset
was not correct. Fix the programming with right offset

fixes: 'commit ded1f3db4cd6
	("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")'

Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
---
 drivers/dma/tegra210-adma.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
index ae39b52012b2..487f8fb411b5 100644
--- a/drivers/dma/tegra210-adma.c
+++ b/drivers/dma/tegra210-adma.c
@@ -221,7 +221,9 @@ static int tegra_adma_init(struct tegra_adma *tdma)
 	int ret;
 
 	/* Clear any interrupts */
-	tdma_write(tdma, tdma->cdata->global_int_clear, 0x1);
+	tdma_write(tdma,
+		   tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear,
+		   0x1);
 
 	/* Assert soft reset */
 	tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);
-- 
2.17.1

Re: [PATCH] dmaengine: tegra210-adma: fix global intr clear

[Vinod Koul]

On 26-12-22, 12:21, Mohan Kumar wrote:
> The current global interrupt clear programming register offset
> was not correct. Fix the programming with right offset
> 
> fixes: 'commit ded1f3db4cd6
> 	("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")'

Ugh, this is not the format for fixes tag, see Documentation/process/5.Posting.rst
> 
> Signed-off-by: Mohan Kumar <mkumard@nvidia.com>

Why did you CC stable for this email? Again read the process!

> ---
>  drivers/dma/tegra210-adma.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
> index ae39b52012b2..487f8fb411b5 100644
> --- a/drivers/dma/tegra210-adma.c
> +++ b/drivers/dma/tegra210-adma.c
> @@ -221,7 +221,9 @@ static int tegra_adma_init(struct tegra_adma *tdma)
>  	int ret;
>  
>  	/* Clear any interrupts */
> -	tdma_write(tdma, tdma->cdata->global_int_clear, 0x1);
> +	tdma_write(tdma,
> +		   tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear,
> +		   0x1);

This looks _very_ ugly, one line should look and read better:
        tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);
We are no longer 80 char limited!

-- 
~Vinod

Re: [PATCH] dmaengine: tegra210-adma: fix global intr clear

[Mohan Kumar D]

On 28-12-2022 11:44, Vinod Koul wrote:
> External email: Use caution opening links or attachments
>
>
> On 26-12-22, 12:21, Mohan Kumar wrote:
>> The current global interrupt clear programming register offset
>> was not correct. Fix the programming with right offset
>>
>> fixes: 'commit ded1f3db4cd6
>>        ("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")'
> Ugh, this is not the format for fixes tag, see Documentation/process/5.Posting.rst
Thanks for the pointers. Will fix the tag in the next patch for review
>> Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
> Why did you CC stable for this email? Again read the process!
My mistake, will add cc to stable in the commit message of the change as 
per process in the patch V2
>
>> ---
>>   drivers/dma/tegra210-adma.c | 4 +++-
>>   1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
>> index ae39b52012b2..487f8fb411b5 100644
>> --- a/drivers/dma/tegra210-adma.c
>> +++ b/drivers/dma/tegra210-adma.c
>> @@ -221,7 +221,9 @@ static int tegra_adma_init(struct tegra_adma *tdma)
>>        int ret;
>>
>>        /* Clear any interrupts */
>> -     tdma_write(tdma, tdma->cdata->global_int_clear, 0x1);
>> +     tdma_write(tdma,
>> +                tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear,
>> +                0x1);
> This looks _very_ ugly, one line should look and read better:
>          tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);
> We are no longer 80 char limited!
Ack. Will fix in the Patch V2
>
> --
> ~Vinod