Re: [Patch v6 1/4] memory: tegra: Add memory controller channels support

[Ashish Mhetre <amhetre@nvidia.com>]

On 4/10/2022 8:34 PM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
> 
> 
> 06.04.2022 08:24, Ashish Mhetre пишет:
>> diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h
>> index 1066b1194a5a..c3c121fbfbb7 100644
>> --- a/include/soc/tegra/mc.h
>> +++ b/include/soc/tegra/mc.h
>> @@ -13,6 +13,9 @@
>>   #include <linux/irq.h>
>>   #include <linux/reset-controller.h>
>>   #include <linux/types.h>
>> +#include <linux/platform_device.h>
>> +
>> +#define MC_MAX_CHANNELS 16
>>
>>   struct clk;
>>   struct device;
>> @@ -181,6 +184,7 @@ struct tegra_mc_ops {
>>        int (*resume)(struct tegra_mc *mc);
>>        irqreturn_t (*handle_irq)(int irq, void *data);
>>        int (*probe_device)(struct tegra_mc *mc, struct device *dev);
>> +     int (*map_regs)(struct tegra_mc *mc, struct platform_device *pdev);
>>   };
>>
>>   struct tegra_mc_soc {
>> @@ -194,6 +198,7 @@ struct tegra_mc_soc {
>>        unsigned int atom_size;
>>
>>        u8 client_id_mask;
>> +     u8 num_channels;
>>
>>        const struct tegra_smmu_soc *smmu;
>>
>> @@ -212,6 +217,8 @@ struct tegra_mc {
>>        struct tegra_smmu *smmu;
>>        struct gart_device *gart;
>>        void __iomem *regs;
>> +     void __iomem *bcast_ch_regs;
>> +     void __iomem *ch_regs[MC_MAX_CHANNELS];
> 
> Why not to allocate ch_regs at runtime?

Yes, we can do that. I'll make necessary changes in v7.