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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , , Andrew Halaney , "Russell King (Oracle)" , Heiner Kallweit , Bartosz Golaszewski , "linux-tegra@vger.kernel.org" , Brad Griffis , Vladimir Oltean , Jon Hunter , Maxime Chevallier , References: <20240924055251.3074850-1-quic_abchauha@quicinc.com> <8a6611fd-bd7b-4d32-8cea-ea925a9979ab@lunn.ch> <32ce1fd1-5bf1-4772-9a1a-4089fd87e3f1@quicinc.com> Content-Language: en-US In-Reply-To: <32ce1fd1-5bf1-4772-9a1a-4089fd87e3f1@quicinc.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: _wIK4WZD5yYCwkOXMflg3xRn4Qj6rQZy X-Proofpoint-GUID: _wIK4WZD5yYCwkOXMflg3xRn4Qj6rQZy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 lowpriorityscore=0 priorityscore=1501 malwarescore=0 mlxscore=0 suspectscore=0 impostorscore=0 spamscore=0 phishscore=0 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409250004 On 9/24/2024 8:19 AM, Abhishek Chauhan (ABC) wrote: > > > On 9/24/2024 5:04 AM, Andrew Lunn wrote: >>> +static void aqr_supported_speed(struct phy_device *phydev, u32 max_speed) >>> +{ >>> + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; >>> + >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); >>> + >>> + if (max_speed == SPEED_2500) { >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); >>> + } else if (max_speed == SPEED_5000) { >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); >>> + linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); >>> + } >>> + >>> + linkmode_copy(phydev->supported, supported); >>> +} >> >> So you have got lots of comments.... >> >> Please split this into two patches. One patch for the PHY you are >> interested in, and a second patch to remove phy_set_max_speed() and >> fix up that PHY. >> > Noted! > >> Also, i would prefer you do the normal feature discovery, calling >> genphy_read_abilities() and/or genphy_c45_pma_read_abilities() and >> then fixup the results by removing the modes which should not be >> there. >> > Sounds good! >> Take a look at bcm84881_get_features() as an example. >> > Thanks Andrew! Andrew, (Let me know if this is okay with you) On doing the normal feature discovery today I observed that AQR115C i want to document this misbehavior here for future reference //Print added by me in the AQR driver [ 5.583440] AQR supported mask=00,00000000,00018000,000e102c key points :- AQR115c supports 10Mbps(F/H) but feature discovery says no AQR115C supports 1Gbps(F/H) but feature discovery says no AQR115C supports 2500BaseX but feature discovery says no AQR115C supports Autoneg but feature discovery says Hell no! AQR115C does not support 10GBaseT/KX4/KR but feature discovery says yes AQR115c does not support 5GbaseT but feature discovery says yes I have got 2 different FW from Marvell but none seem to help. I also got the confirmation from Marvell folks that Autoneg is supported but the feature discovery says otherwise. Here is the thing what i am going to do for now. (Let me know if this is okay with you) 1. Raise FIXUP for AQR115c patch - remove all the features which are not support - Add supported features which we really requires such as Autoneg/phy_gbit_features/2500BaseX/BaseT(Clearly see them supported in the NDA internal docs) Reference for other folks for information which is public : https://www.marvell.com/content/dam/marvell/en/public-collateral/transceivers/marvell-phys-transceivers-aqrate-gen4-product-brief.pdf 2. Raise FIXUP patch by removing phy_set_max_speed and call - Generic function which sets speeds up to 2.5Gbps for AQCS109 (2.5Gbps max speed) - Generic function which sets speeds up to 5 Gbps for AQR111/B0/114c (5Gbps max speed) Both points 1 and 2 will be a patch series with cover letter. >> Andrew