Re: [REGRESSION] EMEM address decode error when using Tegra210 media engines

[Robin Murphy <robin.murphy@arm.com>]

On 2025-06-03 5:52 pm, Diogo Ivo wrote:
> 
> On 6/3/25 4:32 PM, Jason Gunthorpe wrote:
>> On Tue, Jun 03, 2025 at 04:06:47PM +0100, Diogo Ivo wrote:
>>> Hello,
>>>
>>> Commit 50568f87d1e233e introduced a regression when trying to use the 
>>> media
>>> accelerators present on the Tegra X1 SoC.
>>>
>>> I came across this regression when testing the branch [1] that leverages
>>> the NVJPG engine in the Tegra X1 for decoding a JPEG file. After commit
>>> 50568f87d1e233e we see the following error messages after submitting 
>>> a job
>>> through the TEGRA_CHANNEL_SUBMIT IOCTL:
>>
>> Maybe this?
>>
>> @@ -567,7 +567,7 @@ static void tegra_smmu_set_pde(struct 
>> tegra_smmu_as *as, unsigned long iova,
>>          /* The flush the page directory entry from caches */
>>          dma_sync_single_range_for_device(smmu->dev, as->pd_dma, offset,
>> -                                        sizeof(*pd), DMA_TO_DEVICE);
>> +                                        sizeof(pd->val[0]), 
>> DMA_TO_DEVICE);
>>          /* And flush the iommu */
>>          smmu_flush_ptc(smmu, as->pd_dma, offset);
>>
>> It is the only mistake I was able to notice.
>>
>> But I'd be puzzled - I'd expect bigger sizeof would make it slower not
>> broken.. Though your crash sure looks like either missing cache
>> coherency or a bad PTE construction.

I reckon the "unsigned long offset = pd_index * sizeof(*pd);" a few 
lines above is probably more impactful ;)

Robin.

>>
> 
> With this change there is still an error:
> 
> [   21.794016] tegra-mc 70019000.memory-controller: nvjpgsrd: read 
> @0x00000000ffffbe00: EMEM address decode error (SMMU translation error 
> [--S])
> [   21.804409] tegra-mc 70019000.memory-controller: nvjpgsrd: read 
> @0x00000000ffffbe00: Page fault (SMMU translation error [--S])
> 
> the difference being that we only get it for one address compared to the
> previous log.
> 
> Diogo