Re: [PATCH] clk: tegra: mark TEGRA210_CLK_DBGAPB as always on

[Jon Hunter <jonathanh@nvidia.com>]

Hi Peter,

On 06/03/17 15:53, Geert Uytterhoeven wrote:
> Hi Peter,
> 
> On Mon, Mar 6, 2017 at 3:28 PM, Peter De Schrijver
> <pdeschrijver@nvidia.com> wrote:
>> On Mon, Mar 06, 2017 at 09:58:29AM +0000, Jon Hunter wrote:
>>> On 06/03/17 08:38, Peter De Schrijver wrote:
>>>> On Thu, Mar 02, 2017 at 05:56:49PM +0000, Jon Hunter wrote:
>>>>> On 28/02/17 15:19, Peter De Schrijver wrote:
>>>>>> This is needed to make the JTAG debugging interface work.
>>>>>>
>>>>>> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
>>>>>> ---
>>>>>>  drivers/clk/tegra/clk-tegra210.c | 1 +
>>>>>>  1 file changed, 1 insertion(+)
>>>>>>
>>>>>> diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
>>>>>> index 9a2512a..708f5f1 100644
>>>>>> --- a/drivers/clk/tegra/clk-tegra210.c
>>>>>> +++ b/drivers/clk/tegra/clk-tegra210.c
>>>>>> @@ -2680,6 +2680,7 @@ static void tegra210_cpu_clock_resume(void)
>>>>>>   { TEGRA210_CLK_EMC, TEGRA210_CLK_CLK_MAX, 0, 1 },
>>>>>>   { TEGRA210_CLK_MSELECT, TEGRA210_CLK_CLK_MAX, 0, 1 },
>>>>>>   { TEGRA210_CLK_CSITE, TEGRA210_CLK_CLK_MAX, 0, 1 },
>>>>>> + { TEGRA210_CLK_DBGAPB, TEGRA210_CLK_CLK_MAX, 0, 1 },
>>>>>>   { TEGRA210_CLK_TSENSOR, TEGRA210_CLK_CLK_M, 400000, 0 },
>>>>>>   { TEGRA210_CLK_I2C1, TEGRA210_CLK_PLL_P, 0, 0 },
>>>>>>   { TEGRA210_CLK_I2C2, TEGRA210_CLK_PLL_P, 0, 0 },
>>>>>
>>>>> Should there be some dependency on say CONFIG_DEBUG_KERNEL? I am not
>>>>> sure we always want this on for all cases.
>>>>
>>>> Why would you not want it to be always on?
>>>
>>> Purely for power reasons. I do not know how much power keeping this
>>
>> I don't expect it to be significant but I don't have any numbers.
>>
>>> clock running consumes, but I don't like the idea of clocks running all
>>> the time when they are not needed.
>>
>> Problem is that in this case there is no easy way to determine if the clock
>> needs to be on.
> 
> I had a similar issue with SH-Mobile AG5, where the power domain containing
> the JTAG interface is powered down.

This reminds me, does your patch assume that the DFD power domain is
enabled? I am guessing that it needs to be for JTAG to work.

Cheers
Jon

-- 
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