From: Jon Hunter <jonathanh@nvidia.com>
To: Piyush Patle <piyushpatle228@gmail.com>, Mark Brown <broonie@kernel.org>
Cc: Sheetal <sheetal@nvidia.com>,
Thierry Reding <thierry.reding@gmail.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
linux-sound@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] ASoC: tegra210_adx: simplify byte map get/put logic
Date: Wed, 8 Apr 2026 18:38:45 +0100 [thread overview]
Message-ID: <f837da45-2b31-4788-a957-085d3f0570d0@nvidia.com> (raw)
In-Reply-To: <20260408170818.70322-2-piyushpatle228@gmail.com>
On 08/04/2026 18:08, Piyush Patle wrote:
> The byte-map controls ("Byte Map N") already expose a value range of
> [0, 256] to userspace via SOC_SINGLE_EXT(), where 256 is the
> "disabled" sentinel. The driver stored this state as a byte-packed
> u32 map[] array plus a separate byte_mask[] bitmap tracking which
> slots were enabled, because 256 does not fit in a byte. As a result
> get_byte_map() had to consult byte_mask[] to decide whether to
> report the stored byte or 256, and put_byte_map() had to keep the
> two arrays in sync on every write.
>
> Store each slot as a u16 holding the control value directly
> (0..255 enabled, 256 disabled). This is the native representation
> for what userspace already sees, so get_byte_map() becomes a direct
> return and put_byte_map() becomes a compare-and-store. The
> hardware-facing packed RAM word and the IN_BYTE_EN mask are now
> derived on the fly inside tegra210_adx_write_map_ram() from the
> slot array, which is the only place that needs to know about the
> hardware layout.
>
> The byte_mask scratch buffer is allocated dynamically using
> kcalloc() based on soc_data->byte_mask_size, removing dependency
> on SoC-specific constants. The byte_mask field is dropped from
> struct tegra210_adx.
So this was already the case. However ...
> -static void tegra210_adx_write_map_ram(struct tegra210_adx *adx)
> +static int tegra210_adx_write_map_ram(struct tegra210_adx *adx)
> {
> + const unsigned int bits_per_mask = BITS_PER_TYPE(*adx->map) * BITS_PER_BYTE;
> + unsigned int *byte_mask;
> int i;
>
> + byte_mask = kcalloc(adx->soc_data->byte_mask_size, sizeof(*byte_mask),
> + GFP_KERNEL);
> + if (!byte_mask)
> + return -ENOMEM;
> +
Now you are allocating this everytime this function is called (which
happens on RPM resume) instead of ...
> @@ -700,16 +706,15 @@ static int tegra210_adx_platform_probe(struct platform_device *pdev)
>
> regcache_cache_only(adx->regmap, true);
>
> - adx->map = devm_kzalloc(dev, soc_data->ram_depth * sizeof(*adx->map),
> - GFP_KERNEL);
> + adx->map = devm_kcalloc(dev,
> + soc_data->ram_depth * TEGRA_ADX_SLOTS_PER_WORD,
> + sizeof(*adx->map), GFP_KERNEL);
> if (!adx->map)
> return -ENOMEM;
>
> - adx->byte_mask = devm_kzalloc(dev,
> - soc_data->byte_mask_size * sizeof(*adx->byte_mask),
> - GFP_KERNEL);
> - if (!adx->byte_mask)
> - return -ENOMEM;
... here in the probe function, which makes more sense. IOW I am not
sure why you have changed this.
Jon
--
nvpublic
next prev parent reply other threads:[~2026-04-08 17:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-07 17:03 [PATCH 0/2] ASoC: tegra210: simplify byte map handling in ADX and AMX Piyush Patle
2026-04-07 17:03 ` [PATCH 1/2] ASoC: tegra210_adx: simplify byte map get/put logic Piyush Patle
2026-04-07 17:03 ` [PATCH 2/2] ASoC: tegra210_amx: " Piyush Patle
2026-04-08 14:08 ` Sheetal .
2026-04-08 17:08 ` [PATCH v2 0/2] ASoC: tegra210: simplify byte map handling in ADX and AMX Piyush Patle
2026-04-08 17:08 ` [PATCH v2 1/2] ASoC: tegra210_adx: simplify byte map get/put logic Piyush Patle
2026-04-08 17:38 ` Jon Hunter [this message]
2026-04-08 21:19 ` Piyush Patle
2026-04-08 17:47 ` Mark Brown
2026-04-08 21:25 ` Piyush Patle
2026-04-08 17:08 ` [PATCH v2 2/2] ASoC: tegra210_amx: " Piyush Patle
2026-04-08 17:49 ` Mark Brown
2026-04-08 17:41 ` [PATCH v2 0/2] ASoC: tegra210: simplify byte map handling in ADX and AMX Mark Brown
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