* [PATCH 05/73] ARM: tegra: roth: Use the correct DSI/CSI supply
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use
that instead of the wrong vdd-supply property.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114-roth.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts
index 5249afdca577..7378b5d6f2fa 100644
--- a/arch/arm/boot/dts/tegra114-roth.dts
+++ b/arch/arm/boot/dts/tegra114-roth.dts
@@ -37,7 +37,7 @@ host1x@50000000 {
dsi@54300000 {
status = "okay";
- vdd-supply = <&vdd_1v2_ap>;
+ avdd-dsi-csi-supply = <&vdd_1v2_ap>;
panel@0 {
compatible = "lg,lh500wx1-sd03";
--
2.24.1
^ permalink raw reply related
* [PATCH 06/73] ARM: tegra: tn7: Use the correct DSI/CSI supply
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use
that instead of the wrong vdd-supply property.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114-tn7.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra114-tn7.dts b/arch/arm/boot/dts/tegra114-tn7.dts
index 90935db591a5..0e520ae1109d 100644
--- a/arch/arm/boot/dts/tegra114-tn7.dts
+++ b/arch/arm/boot/dts/tegra114-tn7.dts
@@ -37,7 +37,7 @@ host1x@50000000 {
dsi@54300000 {
status = "okay";
- vdd-supply = <&vdd_1v2_ap>;
+ avdd-dsi-csi-supply = <&vdd_1v2_ap>;
panel@0 {
compatible = "lg,ld070wx3-sl01";
--
2.24.1
^ permalink raw reply related
* [PATCH 07/73] ARM: tegra: Do not mark host1x as simple bus
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The host1x is not a simple bus, so drop the corresponding compatible
string.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114.dtsi | 2 +-
arch/arm/boot/dts/tegra124.dtsi | 2 +-
arch/arm/boot/dts/tegra20.dtsi | 2 +-
arch/arm/boot/dts/tegra30.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 01a81d380f1f..be048aa553ee 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -18,7 +18,7 @@ memory@80000000 {
};
host1x@50000000 {
- compatible = "nvidia,tegra114-host1x", "simple-bus";
+ compatible = "nvidia,tegra114-host1x";
reg = <0x50000000 0x00028000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 94cac13d3e50..fc124343658e 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -85,7 +85,7 @@ pci@2,0 {
};
host1x@50000000 {
- compatible = "nvidia,tegra124-host1x", "simple-bus";
+ compatible = "nvidia,tegra124-host1x";
reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index c3b8ad53b967..7319df2fcd3e 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -31,7 +31,7 @@ vde_pool: vde@400 {
};
host1x@50000000 {
- compatible = "nvidia,tegra20-host1x", "simple-bus";
+ compatible = "nvidia,tegra20-host1x";
reg = <0x50000000 0x00024000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index d2d05f1da274..0b58863e570e 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -111,7 +111,7 @@ vde_pool: vde@400 {
};
host1x@50000000 {
- compatible = "nvidia,tegra30-host1x", "simple-bus";
+ compatible = "nvidia,tegra30-host1x";
reg = <0x50000000 0x00024000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
--
2.24.1
^ permalink raw reply related
* [PATCH 08/73] ARM: tegra: Add missing host1x properties
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The host1x device tree bindings require the clock- and interrupt-names
properties to be present, so add them where missing.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114.dtsi | 2 ++
arch/arm/boot/dts/tegra124.dtsi | 2 ++
arch/arm/boot/dts/tegra20.dtsi | 2 ++
arch/arm/boot/dts/tegra30.dtsi | 2 ++
4 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index be048aa553ee..a0ac9ea9ec9d 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -22,7 +22,9 @@ host1x@50000000 {
reg = <0x50000000 0x00028000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+ interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA114_CLK_HOST1X>;
+ clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
iommus = <&mc TEGRA_SWGROUP_HC>;
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index fc124343658e..1afed8496c95 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -89,7 +89,9 @@ host1x@50000000 {
reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+ interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
+ clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
iommus = <&mc TEGRA_SWGROUP_HC>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 7319df2fcd3e..f0a172c61b26 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -35,7 +35,9 @@ host1x@50000000 {
reg = <0x50000000 0x00024000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+ interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
+ clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 0b58863e570e..27000f0ba35b 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -115,7 +115,9 @@ host1x@50000000 {
reg = <0x50000000 0x00024000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+ interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA30_CLK_HOST1X>;
+ clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
iommus = <&mc TEGRA_SWGROUP_HC>;
--
2.24.1
^ permalink raw reply related
* [PATCH 09/73] ARM: tegra: gr2d is not backwards-compatible
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The instantiation of gr2d in Tegra114 is not backwards-compatible with
the version found on earlier chips. Remove the misleading compatible
string.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index a0ac9ea9ec9d..d583dfba688f 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -35,7 +35,7 @@ host1x@50000000 {
ranges = <0x54000000 0x54000000 0x01000000>;
gr2d@54140000 {
- compatible = "nvidia,tegra114-gr2d", "nvidia,tegra20-gr2d";
+ compatible = "nvidia,tegra114-gr2d";
reg = <0x54140000 0x00040000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_GR2D>;
--
2.24.1
^ permalink raw reply related
* [PATCH 10/73] ARM: tegra: gr3d is not backwards-compatible
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The instantiation of gr3d in Tegra114 is not backwards-compatible with
the version found on earlier chips. Remove the misleading compatible
string.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index d583dfba688f..392f06107b32 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -46,7 +46,7 @@ gr2d@54140000 {
};
gr3d@54180000 {
- compatible = "nvidia,tegra114-gr3d", "nvidia,tegra20-gr3d";
+ compatible = "nvidia,tegra114-gr3d";
reg = <0x54180000 0x00040000>;
clocks = <&tegra_car TEGRA114_CLK_GR3D>;
resets = <&tegra_car 24>;
--
2.24.1
^ permalink raw reply related
* [PATCH 11/73] ARM: tegra: The Tegra114 DC is not backwards-compatible
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The display controller on Tegra114 is in fact not backwards-compatible
with the instantiation found on earlier SoCs. Drop the misleading
compatible string.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 392f06107b32..a06b88b01ef3 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -56,7 +56,7 @@ gr3d@54180000 {
};
dc@54200000 {
- compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
+ compatible = "nvidia,tegra114-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_DISP1>,
@@ -75,7 +75,7 @@ rgb {
};
dc@54240000 {
- compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
+ compatible = "nvidia,tegra114-dc";
reg = <0x54240000 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_DISP2>,
--
2.24.1
^ permalink raw reply related
* [PATCH 12/73] ARM: tegra: Drop display controller parent clocks on Tegra114
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The parent clocks are determined by the output that will be used, not by
the display controller that drives the output. Drop the parent clocks
from the display controller device tree nodes.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114.dtsi | 10 ++++------
arch/arm/boot/dts/tegra124.dtsi | 10 ++++------
arch/arm/boot/dts/tegra20.dtsi | 10 ++++------
arch/arm/boot/dts/tegra30.dtsi | 10 ++++------
4 files changed, 16 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index a06b88b01ef3..23df7a5f37d3 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -59,9 +59,8 @@ dc@54200000 {
compatible = "nvidia,tegra114-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_DISP1>,
- <&tegra_car TEGRA114_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA114_CLK_DISP1>;
+ clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@@ -78,9 +77,8 @@ dc@54240000 {
compatible = "nvidia,tegra114-dc";
reg = <0x54240000 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_DISP2>,
- <&tegra_car TEGRA114_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA114_CLK_DISP2>;
+ clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 1afed8496c95..2c992e8e3594 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -105,9 +105,8 @@ dc@54200000 {
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54200000 0x0 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_DISP1>,
- <&tegra_car TEGRA124_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA124_CLK_DISP1>;
+ clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@@ -120,9 +119,8 @@ dc@54240000 {
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54240000 0x0 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_DISP2>,
- <&tegra_car TEGRA124_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA124_CLK_DISP2>;
+ clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index f0a172c61b26..8b6909839f59 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -103,9 +103,8 @@ dc@54200000 {
compatible = "nvidia,tegra20-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA20_CLK_DISP1>,
- <&tegra_car TEGRA20_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA20_CLK_DISP1>;
+ clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@@ -120,9 +119,8 @@ dc@54240000 {
compatible = "nvidia,tegra20-dc";
reg = <0x54240000 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA20_CLK_DISP2>,
- <&tegra_car TEGRA20_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA20_CLK_DISP2>;
+ clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 27000f0ba35b..23fedb76e5ae 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -200,9 +200,8 @@ dc@54200000 {
compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA30_CLK_DISP1>,
- <&tegra_car TEGRA30_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA30_CLK_DISP1>;
+ clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@@ -219,9 +218,8 @@ dc@54240000 {
compatible = "nvidia,tegra30-dc";
reg = <0x54240000 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA30_CLK_DISP2>,
- <&tegra_car TEGRA30_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA30_CLK_DISP2>;
+ clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
--
2.24.1
^ permalink raw reply related
* [PATCH 13/73] ARM: tegra: Rename sdhci nodes to mmc
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Marcel Ziswiler, Philippe Schenker
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.
Cc: Marcel Ziswiler <marcel.ziswiler-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Cc: Philippe Schenker <philippe.schenker-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114-dalmore.dts | 4 ++--
arch/arm/boot/dts/tegra114-roth.dts | 4 ++--
arch/arm/boot/dts/tegra114-tn7.dts | 2 +-
arch/arm/boot/dts/tegra114.dtsi | 8 ++++----
arch/arm/boot/dts/tegra124-apalis-eval.dts | 4 ++--
arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 4 ++--
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +-
arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +-
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 4 ++--
arch/arm/boot/dts/tegra124-nyan-big.dts | 2 +-
arch/arm/boot/dts/tegra124-nyan.dtsi | 6 +++---
arch/arm/boot/dts/tegra124-venice2.dts | 4 ++--
arch/arm/boot/dts/tegra124.dtsi | 8 ++++----
arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 2 +-
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 +-
arch/arm/boot/dts/tegra20-harmony.dts | 4 ++--
arch/arm/boot/dts/tegra20-paz00.dts | 4 ++--
arch/arm/boot/dts/tegra20-seaboard.dts | 6 +++---
arch/arm/boot/dts/tegra20-ventana.dts | 6 +++---
arch/arm/boot/dts/tegra20.dtsi | 8 ++++----
arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++--
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 4 ++--
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 2 +-
arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +-
arch/arm/boot/dts/tegra30-beaver.dts | 4 ++--
arch/arm/boot/dts/tegra30-cardhu.dtsi | 4 ++--
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +-
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
arch/arm/boot/dts/tegra30.dtsi | 8 ++++----
29 files changed, 59 insertions(+), 59 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index 584db54cd750..c04162ddec3c 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -1108,14 +1108,14 @@ i2s@70080400 {
};
};
- sdhci@78000400 {
+ mmc@78000400 {
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
status = "okay";
};
- sdhci@78000600 {
+ mmc@78000600 {
bus-width = <8>;
status = "okay";
non-removable;
diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts
index 7378b5d6f2fa..07960171fabe 100644
--- a/arch/arm/boot/dts/tegra114-roth.dts
+++ b/arch/arm/boot/dts/tegra114-roth.dts
@@ -962,7 +962,7 @@ pmc@7000e400 {
};
/* SD card */
- sdhci@78000400 {
+ mmc@78000400 {
status = "okay";
bus-width = <4>;
vqmmc-supply = <&vddio_sdmmc3>;
@@ -971,7 +971,7 @@ sdhci@78000400 {
};
/* eMMC */
- sdhci@78000600 {
+ mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra114-tn7.dts b/arch/arm/boot/dts/tegra114-tn7.dts
index 0e520ae1109d..745d234b105b 100644
--- a/arch/arm/boot/dts/tegra114-tn7.dts
+++ b/arch/arm/boot/dts/tegra114-tn7.dts
@@ -242,7 +242,7 @@ pmc@7000e400 {
};
/* eMMC */
- sdhci@78000600 {
+ mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 23df7a5f37d3..69e0e3eeffb4 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -644,7 +644,7 @@ mipi: mipi@700e3000 {
#nvidia,mipi-calibrate-cells = <1>;
};
- sdhci@78000000 {
+ mmc@78000000 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -655,7 +655,7 @@ sdhci@78000000 {
status = "disabled";
};
- sdhci@78000200 {
+ mmc@78000200 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -666,7 +666,7 @@ sdhci@78000200 {
status = "disabled";
};
- sdhci@78000400 {
+ mmc@78000400 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -677,7 +677,7 @@ sdhci@78000400 {
status = "disabled";
};
- sdhci@78000600 {
+ mmc@78000600 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts b/arch/arm/boot/dts/tegra124-apalis-eval.dts
index ceb3f6388c7d..28c29b6813a7 100644
--- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
@@ -130,7 +130,7 @@ usb@70090000 {
};
/* Apalis MMC1 */
- sdhci@700b0000 {
+ mmc@700b0000 {
status = "okay";
bus-width = <4>;
/* MMC1_CD# */
@@ -139,7 +139,7 @@ sdhci@700b0000 {
};
/* Apalis SD1 */
- sdhci@700b0400 {
+ mmc@700b0400 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
index 826b776fbe6f..f3afde410615 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
@@ -132,7 +132,7 @@ usb@70090000 {
};
/* Apalis MMC1 */
- sdhci@700b0000 {
+ mmc@700b0000 {
status = "okay";
bus-width = <4>;
/* MMC1_CD# */
@@ -141,7 +141,7 @@ sdhci@700b0000 {
};
/* Apalis SD1 */
- sdhci@700b0400 {
+ mmc@700b0400 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index 1cc080fd062e..3fdc6ff32b0c 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1909,7 +1909,7 @@ usb3-1 {
};
/* eMMC */
- sdhci@700b0600 {
+ mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index f2b243d98c7c..29ceeba1e7b1 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1901,7 +1901,7 @@ usb3-1 {
};
/* eMMC */
- sdhci@700b0600 {
+ mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index e97943871fd8..289bf6e99041 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -1797,7 +1797,7 @@ usb3-0 {
};
/* SD card */
- sdhci@700b0400 {
+ mmc@700b0400 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
@@ -1807,7 +1807,7 @@ sdhci@700b0400 {
};
/* eMMC */
- sdhci@700b0600 {
+ mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
index d97791b98958..4d14dec21af6 100644
--- a/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -20,7 +20,7 @@ panel: panel {
ddc-i2c-bus = <&dpaux>;
};
- sdhci@700b0400 { /* SD Card on this bus */
+ mmc@700b0400 { /* SD Card on this bus */
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
};
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
index b3b5c12cbda9..41a3db6649c5 100644
--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -491,7 +491,7 @@ sdhci0_pwrseq: sdhci0_pwrseq {
reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
};
- sdhci@700b0000 { /* WiFi/BT on this bus */
+ mmc@700b0000 { /* WiFi/BT on this bus */
status = "okay";
bus-width = <4>;
no-1-8-v;
@@ -502,7 +502,7 @@ sdhci@700b0000 { /* WiFi/BT on this bus */
keep-power-in-suspend;
};
- sdhci@700b0400 { /* SD Card on this bus */
+ mmc@700b0400 { /* SD Card on this bus */
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
@@ -511,7 +511,7 @@ sdhci@700b0400 { /* SD Card on this bus */
vqmmc-supply = <&vddio_sdmmc3>;
};
- sdhci@700b0600 { /* eMMC on this bus */
+ mmc@700b0600 { /* eMMC on this bus */
status = "okay";
bus-width = <8>;
no-1-8-v;
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index effdb303c7f7..584a3b2125cd 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -998,7 +998,7 @@ usb3-1 {
};
};
- sdhci@700b0400 {
+ mmc@700b0400 {
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
@@ -1007,7 +1007,7 @@ sdhci@700b0400 {
vqmmc-supply = <&vddio_sdmmc3>;
};
- sdhci@700b0600 {
+ mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 2c992e8e3594..76c1ef923213 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -833,7 +833,7 @@ usb3-1 {
};
};
- sdhci@700b0000 {
+ mmc@700b0000 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -843,7 +843,7 @@ sdhci@700b0000 {
status = "disabled";
};
- sdhci@700b0200 {
+ mmc@700b0200 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -853,7 +853,7 @@ sdhci@700b0200 {
status = "disabled";
};
- sdhci@700b0400 {
+ mmc@700b0400 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -863,7 +863,7 @@ sdhci@700b0400 {
status = "disabled";
};
- sdhci@700b0600 {
+ mmc@700b0600 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
index 37ad508b61d9..a05fb3853da8 100644
--- a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
@@ -183,7 +183,7 @@ can@0 {
};
/* SD/MMC */
- sdhci@c8000600 {
+ mmc@c8000600 {
status = "okay";
bus-width = <4>;
cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index af4740847769..425494b9ed54 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -171,7 +171,7 @@ spi@7000da00 {
};
/* SD/MMC */
- sdhci@c8000600 {
+ mmc@c8000600 {
status = "okay";
bus-width = <4>;
cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index b051d75d4642..86494cb4d5a1 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -613,7 +613,7 @@ usb-phy@c5008000 {
status = "okay";
};
- sdhci@c8000200 {
+ mmc@c8000200 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
@@ -621,7 +621,7 @@ sdhci@c8000200 {
bus-width = <4>;
};
- sdhci@c8000600 {
+ mmc@c8000600 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 2a0e5754f50f..91b6bb82e960 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -543,7 +543,7 @@ usb-phy@c5008000 {
status = "okay";
};
- sdhci@c8000000 {
+ mmc@c8000000 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
@@ -551,7 +551,7 @@ sdhci@c8000000 {
bus-width = <4>;
};
- sdhci@c8000600 {
+ mmc@c8000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 9a1ab4bd43e0..f1baf16c5010 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -760,14 +760,14 @@ usb-phy@c5008000 {
status = "okay";
};
- sdhci@c8000000 {
+ mmc@c8000000 {
status = "okay";
power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
keep-power-in-suspend;
};
- sdhci@c8000400 {
+ mmc@c8000400 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
@@ -775,7 +775,7 @@ sdhci@c8000400 {
bus-width = <4>;
};
- sdhci@c8000600 {
+ mmc@c8000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index ccc24674be03..b158771ac0b7 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -554,14 +554,14 @@ usb-phy@c5008000 {
status = "okay";
};
- sdhci@c8000000 {
+ mmc@c8000000 {
status = "okay";
power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
keep-power-in-suspend;
};
- sdhci@c8000400 {
+ mmc@c8000400 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
@@ -569,7 +569,7 @@ sdhci@c8000400 {
bus-width = <4>;
};
- sdhci@c8000600 {
+ mmc@c8000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 8b6909839f59..9e71ed84bf28 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -805,7 +805,7 @@ phy3: usb-phy@c5008000 {
status = "disabled";
};
- sdhci@c8000000 {
+ mmc@c8000000 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -815,7 +815,7 @@ sdhci@c8000000 {
status = "disabled";
};
- sdhci@c8000200 {
+ mmc@c8000200 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -825,7 +825,7 @@ sdhci@c8000200 {
status = "disabled";
};
- sdhci@c8000400 {
+ mmc@c8000400 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -835,7 +835,7 @@ sdhci@c8000400 {
status = "disabled";
};
- sdhci@c8000600 {
+ mmc@c8000600 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts
index b39c26806bf2..9f653ef41da4 100644
--- a/arch/arm/boot/dts/tegra30-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts
@@ -120,7 +120,7 @@ spi@7000dc00 {
};
/* Apalis SD1 */
- sdhci@78000000 {
+ mmc@78000000 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */
@@ -129,7 +129,7 @@ sdhci@78000000 {
};
/* Apalis MMC1 */
- sdhci@78000400 {
+ mmc@78000400 {
status = "okay";
bus-width = <8>;
/* MMC1_CD# */
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
index e29dca92ba0a..dc633e529822 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
@@ -121,7 +121,7 @@ spi@7000dc00 {
};
/* Apalis SD1 */
- sdhci@78000000 {
+ mmc@78000000 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */
@@ -130,7 +130,7 @@ sdhci@78000000 {
};
/* Apalis MMC1 */
- sdhci@78000400 {
+ mmc@78000400 {
status = "okay";
bus-width = <8>;
/* MMC1_CD# */
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index 387b17458e22..9421063cd86c 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -1112,7 +1112,7 @@ i2s@70080500 {
};
/* eMMC */
- sdhci@78000600 {
+ mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 6648506f3aa4..d13f6b0c7c0c 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -1094,7 +1094,7 @@ i2s@70080500 {
};
/* eMMC */
- sdhci@78000600 {
+ mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 3211c61f956c..e0624b74fb50 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -1922,7 +1922,7 @@ i2s@70080400 {
};
};
- sdhci@78000000 {
+ mmc@78000000 {
status = "okay";
vqmmc-supply = <&ldo5_reg>;
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
@@ -1931,7 +1931,7 @@ sdhci@78000000 {
bus-width = <4>;
};
- sdhci@78000600 {
+ mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index c8dc3b6ab2f6..dab9989fa760 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -384,7 +384,7 @@ i2s@70080400 {
};
};
- sdhci@78000000 {
+ mmc@78000000 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
@@ -392,7 +392,7 @@ sdhci@78000000 {
bus-width = <4>;
};
- sdhci@78000600 {
+ mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 8e106e784dce..7d4a6ca4936a 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -98,7 +98,7 @@ can@0 {
};
/* SD/MMC */
- sdhci@78000200 {
+ mmc@78000200 {
status = "okay";
bus-width = <4>;
cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index adba554381c7..a7bfe26f038d 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -933,7 +933,7 @@ i2s@70080500 {
};
/* eMMC */
- sdhci@78000600 {
+ mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 23fedb76e5ae..536cc5629440 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -851,7 +851,7 @@ tegra_i2s4: i2s@70080700 {
};
};
- sdhci@78000000 {
+ mmc@78000000 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -861,7 +861,7 @@ sdhci@78000000 {
status = "disabled";
};
- sdhci@78000200 {
+ mmc@78000200 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -871,7 +871,7 @@ sdhci@78000200 {
status = "disabled";
};
- sdhci@78000400 {
+ mmc@78000400 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -881,7 +881,7 @@ sdhci@78000400 {
status = "disabled";
};
- sdhci@78000600 {
+ mmc@78000600 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
--
2.24.1
^ permalink raw reply related
* [PATCH 14/73] ARM: tegra: Tegra114 SDHCI is not backwards-compatible
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The SDHCI controller instantiated on Tegra114 is not backwards-
compatible with the version on Tegra30, so remove the corresponding
compatible string.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 69e0e3eeffb4..88632d8d0bde 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -645,7 +645,7 @@ mipi: mipi@700e3000 {
};
mmc@78000000 {
- compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
+ compatible = "nvidia,tegra114-sdhci";
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
@@ -656,7 +656,7 @@ mmc@78000000 {
};
mmc@78000200 {
- compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
+ compatible = "nvidia,tegra114-sdhci";
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
@@ -667,7 +667,7 @@ mmc@78000200 {
};
mmc@78000400 {
- compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
+ compatible = "nvidia,tegra114-sdhci";
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
@@ -678,7 +678,7 @@ mmc@78000400 {
};
mmc@78000600 {
- compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
+ compatible = "nvidia,tegra114-sdhci";
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
--
2.24.1
^ permalink raw reply related
* [PATCH 15/73] ARM: tegra: Add missing #phy-cells property to USB PHYs
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
USB PHYs must have a #phy-cells property, so add one to the Tegra USB
PHYs which don't have one.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra114.dtsi | 2 ++
arch/arm/boot/dts/tegra124.dtsi | 3 +++
arch/arm/boot/dts/tegra20.dtsi | 3 +++
arch/arm/boot/dts/tegra30.dtsi | 3 +++
4 files changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 88632d8d0bde..d28d35dc3f5c 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -710,6 +710,7 @@ phy1: usb-phy@7d000000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -746,6 +747,7 @@ phy3: usb-phy@7d008000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 76c1ef923213..f00e962c8f55 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -1056,6 +1056,7 @@ phy1: usb-phy@7d000000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -1093,6 +1094,7 @@ phy2: usb-phy@7d004000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -1129,6 +1131,7 @@ phy3: usb-phy@7d008000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 9e71ed84bf28..77f6b3ee8418 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -735,6 +735,7 @@ phy1: usb-phy@c5000000 {
clock-names = "reg", "pll_u", "timer", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,has-legacy-mode;
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
@@ -769,6 +770,7 @@ phy2: usb-phy@c5004000 {
clock-names = "reg", "pll_u", "ulpi-link";
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
status = "disabled";
};
@@ -795,6 +797,7 @@ phy3: usb-phy@c5008000 {
clock-names = "reg", "pll_u", "timer", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 536cc5629440..3d0515f6db51 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -914,6 +914,7 @@ phy1: usb-phy@7d000000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -951,6 +952,7 @@ phy2: usb-phy@7d004000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -987,6 +989,7 @@ phy3: usb-phy@7d008000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
+ #phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
--
2.24.1
^ permalink raw reply related
* [PATCH 16/73] ARM: tegra: Add missing #sound-dai-cells property to codecs
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Marcel Ziswiler, Philippe Schenker
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Audio codecs need a #sound-dai-cells property, so add one to the audio
codecs on various Tegra-based boards that don't have one.
Cc: Marcel Ziswiler <marcel.ziswiler-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Cc: Philippe Schenker <philippe.schenker-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 1 +
arch/arm/boot/dts/tegra124-apalis.dtsi | 1 +
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 1 +
arch/arm/boot/dts/tegra30-apalis.dtsi | 1 +
arch/arm/boot/dts/tegra30-colibri.dtsi | 1 +
5 files changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index 3fdc6ff32b0c..0d6890af457e 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1559,6 +1559,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
+ #sound-dai-cells = <0>;
VDDA-supply = <®_module_3v3_audio>;
VDDD-supply = <®_1v8_vddio>;
VDDIO-supply = <®_1v8_vddio>;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 29ceeba1e7b1..8857a11332c2 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1552,6 +1552,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
+ #sound-dai-cells = <0>;
VDDA-supply = <®_module_3v3_audio>;
VDDD-supply = <®_1v8_vddio>;
VDDIO-supply = <®_1v8_vddio>;
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index 9421063cd86c..fdd3e4e3522b 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -855,6 +855,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
+ #sound-dai-cells = <0>;
VDDA-supply = <®_module_3v3_audio>;
VDDD-supply = <®_1v8_vio>;
VDDIO-supply = <®_module_3v3>;
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index d13f6b0c7c0c..90694d1a3b0c 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -846,6 +846,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
+ #sound-dai-cells = <0>;
VDDA-supply = <®_module_3v3_audio>;
VDDD-supply = <®_1v8_vio>;
VDDIO-supply = <®_module_3v3>;
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index a7bfe26f038d..933087ee45a8 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -723,6 +723,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
+ #sound-dai-cells = <0>;
VDDA-supply = <®_module_3v3_audio>;
VDDD-supply = <®_1v8_vio>;
VDDIO-supply = <®_module_3v3>;
--
2.24.1
^ permalink raw reply related
* [PATCH 17/73] ARM: tegra: Name GPIO hog nodes consistently
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Marcel Ziswiler, Philippe Schenker
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Use the common gpios- prefix for GPIO hog node names to make it clear
that they are all hogs. This helps with json-schema based validation.
Cc: Marcel Ziswiler <marcel.ziswiler-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Cc: Philippe Schenker <philippe.schenker-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-apalis-eval.dts | 2 +-
arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 2 +-
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 4 ++--
arch/arm/boot/dts/tegra124-apalis.dtsi | 4 ++--
arch/arm/boot/dts/tegra20-colibri.dtsi | 6 +++---
arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
8 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts b/arch/arm/boot/dts/tegra124-apalis-eval.dts
index 28c29b6813a7..89fafa39aa2a 100644
--- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
@@ -246,7 +246,7 @@ reg_usbh_vbus: regulator-usbh-vbus {
&gpio {
/* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
- pex-perst-n {
+ gpios-pex-perst-n {
gpio-hog;
gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
output-high;
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
index f3afde410615..441a244ef6c1 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
@@ -248,7 +248,7 @@ reg_usbh_vbus: regulator-usbh-vbus {
&gpio {
/* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
- pex-perst-n {
+ gpios-pex-perst-n {
gpio-hog;
gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
output-high;
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index 0d6890af457e..eb5f4ad0fe71 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -2048,7 +2048,7 @@ gpu-shutdown-trip {
&gpio {
/* I210 Gigabit Ethernet Controller Reset */
- lan-reset-n {
+ gpios-lan-reset-n {
gpio-hog;
gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
output-high;
@@ -2056,7 +2056,7 @@ lan-reset-n {
};
/* Control MXM3 pin 26 Reset Module Output Carrier Input */
- reset-moci-ctrl {
+ gpios-reset-moci-ctrl {
gpio-hog;
gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
output-high;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 8857a11332c2..64a18b525378 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -2040,7 +2040,7 @@ gpu-shutdown-trip {
&gpio {
/* I210 Gigabit Ethernet Controller Reset */
- lan-reset-n {
+ gpios-lan-reset-n {
gpio-hog;
gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
output-high;
@@ -2048,7 +2048,7 @@ lan-reset-n {
};
/* Control MXM3 pin 26 Reset Module Output Carrier Input */
- reset-moci-ctrl {
+ gpios-reset-moci-ctrl {
gpio-hog;
gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
output-high;
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 6162d193e12c..90f317117298 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -743,7 +743,7 @@ sound {
};
&gpio {
- lan-reset-n {
+ gpios-lan-reset-n {
gpio-hog;
gpios = <TEGRA_GPIO(V, 4) GPIO_ACTIVE_HIGH>;
output-high;
@@ -751,7 +751,7 @@ lan-reset-n {
};
/* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
- npwe {
+ gpios-npwe {
gpio-hog;
gpios = <TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
output-high;
@@ -759,7 +759,7 @@ npwe {
};
/* Not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR */
- rdnwr {
+ gpios-rdnwr {
gpio-hog;
gpios = <TEGRA_GPIO(T, 6) GPIO_ACTIVE_HIGH>;
output-low;
diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts
index 9f653ef41da4..01b2a9db77c8 100644
--- a/arch/arm/boot/dts/tegra30-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts
@@ -239,7 +239,7 @@ reg_usbh_vbus: regulator-usbh-vbus {
&gpio {
/* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
- pex-perst-n {
+ gpios-pex-perst-n {
gpio-hog;
gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
output-high;
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
index dc633e529822..d5a244351137 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
@@ -257,7 +257,7 @@ reg_vddio_sdmmc3: regulator-vddio-sdmmc3 {
&gpio {
/* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
- pex-perst-n {
+ gpios-pex-perst-n {
gpio-hog;
gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
output-high;
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 933087ee45a8..c209020e13fd 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -1043,7 +1043,7 @@ sound {
};
&gpio {
- lan-reset-n {
+ gpios-lan-reset-n {
gpio-hog;
gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
output-high;
--
2.24.1
^ permalink raw reply related
* [PATCH 18/73] ARM: tegra: Use standard name for Ethernet devices
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Marcel Ziswiler, Philippe Schenker
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Ethernet device should be named "ethernet@<unit-address>".
Cc: Marcel Ziswiler <marcel.ziswiler-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Cc: Philippe Schenker <philippe.schenker-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +-
arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +-
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 2 +-
arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index eb5f4ad0fe71..8f4c11f918b4 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -37,7 +37,7 @@ pci@2,0 {
phy-names = "pcie-0";
status = "okay";
- pcie@0 {
+ ethernet@0,0 {
reg = <0 0 0 0 0>;
local-mac-address = [00 00 00 00 00 00];
};
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 64a18b525378..39a5744dbcb4 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -36,7 +36,7 @@ pci@2,0 {
phy-names = "pcie-0";
status = "okay";
- pcie@0 {
+ ethernet@0,0 {
reg = <0 0 0 0 0>;
local-mac-address = [00 00 00 00 00 00];
};
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index fdd3e4e3522b..6a3a72f81c44 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -37,7 +37,7 @@ pci@3,0 {
status = "okay";
nvidia,num-lanes = <1>;
- pcie@0 {
+ ethernet@0,0 {
reg = <0 0 0 0 0>;
local-mac-address = [00 00 00 00 00 00];
};
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 90694d1a3b0c..6544ce70b46f 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -36,7 +36,7 @@ pci@3,0 {
status = "okay";
nvidia,num-lanes = <1>;
- pcie@0 {
+ ethernet@0,0 {
reg = <0 0 0 0 0>;
local-mac-address = [00 00 00 00 00 00];
};
--
2.24.1
^ permalink raw reply related
* [PATCH 19/73] ARM: tegra: Use proper tuple notation
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Marcel Ziswiler, Philippe Schenker
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
validation tooling to properly parse this data.
While at it, also remove the "immovable" bit from PCI addresses. All of
these addresses are in fact "movable".
Cc: Marcel Ziswiler <marcel.ziswiler-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Cc: Philippe Schenker <philippe.schenker-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124.dtsi | 16 +++++-----
arch/arm/boot/dts/tegra20.dtsi | 24 +++++++--------
.../arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 4 +--
arch/arm/boot/dts/tegra30.dtsi | 30 +++++++++----------
4 files changed, 37 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index f00e962c8f55..6d34742b56b9 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -22,9 +22,9 @@ memory@80000000 {
pcie@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
- reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
- 0x0 0x01003800 0x0 0x00000800 /* AFI registers */
- 0x0 0x02000000 0x0 0x10000000>; /* configuration space */
+ reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
+ <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
+ <0x0 0x02000000 0x0 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
@@ -38,11 +38,11 @@ pcie@1003000 {
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
- 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
- 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
- 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
- 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
+ ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
+ <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
+ <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
+ <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
+ <0x42000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
clocks = <&tegra_car TEGRA124_CLK_PCIE>,
<&tegra_car TEGRA124_CLK_AFI>,
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 77f6b3ee8418..90393d8f5ebc 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -172,8 +172,8 @@ timer@50040600 {
intc: interrupt-controller@50041000 {
compatible = "arm,cortex-a9-gic";
- reg = <0x50041000 0x1000
- 0x50040100 0x0100>;
+ reg = <0x50041000 0x1000>,
+ <0x50040100 0x0100>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&intc>;
@@ -649,12 +649,12 @@ fuse@7000f800 {
pcie@80003000 {
compatible = "nvidia,tegra20-pcie";
device_type = "pci";
- reg = <0x80003000 0x00000800 /* PADS registers */
- 0x80003800 0x00000200 /* AFI registers */
- 0x90000000 0x10000000>; /* configuration space */
+ reg = <0x80003000 0x00000800>, /* PADS registers */
+ <0x80003800 0x00000200>, /* AFI registers */
+ <0x90000000 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH /* controller interrupt */
- GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@@ -665,11 +665,11 @@ pcie@80003000 {
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x82000000 0 0x80000000 0x80000000 0 0x00001000 /* port 0 registers */
- 0x82000000 0 0x80001000 0x80001000 0 0x00001000 /* port 1 registers */
- 0x81000000 0 0 0x82000000 0 0x00010000 /* downstream I/O */
- 0x82000000 0 0xa0000000 0xa0000000 0 0x08000000 /* non-prefetchable memory */
- 0xc2000000 0 0xa8000000 0xa8000000 0 0x18000000>; /* prefetchable memory */
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x00001000>, /* port 0 registers */
+ <0x02000000 0 0x80001000 0x80001000 0 0x00001000>, /* port 1 registers */
+ <0x01000000 0 0 0x82000000 0 0x00010000>, /* downstream I/O */
+ <0x02000000 0 0xa0000000 0xa0000000 0 0x08000000>, /* non-prefetchable memory */
+ <0x42000000 0 0xa8000000 0xa8000000 0 0x18000000>; /* prefetchable memory */
clocks = <&tegra_car TEGRA20_CLK_PEX>,
<&tegra_car TEGRA20_CLK_AFI>,
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
index d5a244351137..1fa440d02e83 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
@@ -248,8 +248,8 @@ reg_vddio_sdmmc3: regulator-vddio-sdmmc3 {
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
gpios = <&gpio TEGRA_GPIO(J, 5) GPIO_ACTIVE_HIGH>;
- states = <1800000 0x0
- 3300000 0x1>;
+ states = <1800000 0x0>,
+ <3300000 0x1>;
startup-delay-us = <100000>;
vin-supply = <&vddio_sdmmc_1v8_reg>;
};
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 3d0515f6db51..9a8c07ccbb30 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -20,12 +20,12 @@ memory@80000000 {
pcie@3000 {
compatible = "nvidia,tegra30-pcie";
device_type = "pci";
- reg = <0x00003000 0x00000800 /* PADS registers */
- 0x00003800 0x00000200 /* AFI registers */
- 0x10000000 0x10000000>; /* configuration space */
+ reg = <0x00003000 0x00000800>, /* PADS registers */
+ <0x00003800 0x00000200>, /* AFI registers */
+ <0x10000000 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH /* controller interrupt */
- GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@@ -36,12 +36,12 @@ pcie@3000 {
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000 /* port 0 configuration space */
- 0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
- 0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */
- 0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
- 0x82000000 0 0x20000000 0x20000000 0 0x08000000 /* non-prefetchable memory */
- 0xc2000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */
+ ranges = <0x02000000 0 0x00000000 0x00000000 0 0x00001000>, /* port 0 configuration space */
+ <0x02000000 0 0x00001000 0x00001000 0 0x00001000>, /* port 1 configuration space */
+ <0x02000000 0 0x00004000 0x00004000 0 0x00001000>, /* port 2 configuration space */
+ <0x01000000 0 0 0x02000000 0 0x00010000>, /* downstream I/O */
+ <0x02000000 0 0x20000000 0x20000000 0 0x08000000>, /* non-prefetchable memory */
+ <0x42000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */
clocks = <&tegra_car TEGRA30_CLK_PCIE>,
<&tegra_car TEGRA30_CLK_AFI>,
@@ -185,8 +185,8 @@ gr2d@54140000 {
gr3d@54180000 {
compatible = "nvidia,tegra30-gr3d";
reg = <0x54180000 0x00040000>;
- clocks = <&tegra_car TEGRA30_CLK_GR3D
- &tegra_car TEGRA30_CLK_GR3D2>;
+ clocks = <&tegra_car TEGRA30_CLK_GR3D>,
+ <&tegra_car TEGRA30_CLK_GR3D2>;
clock-names = "3d", "3d2";
resets = <&tegra_car 24>,
<&tegra_car 98>;
@@ -273,8 +273,8 @@ timer@50040600 {
intc: interrupt-controller@50041000 {
compatible = "arm,cortex-a9-gic";
- reg = <0x50041000 0x1000
- 0x50040100 0x0100>;
+ reg = <0x50041000 0x1000>,
+ <0x50040100 0x0100>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&intc>;
--
2.24.1
^ permalink raw reply related
* [PATCH 20/73] ARM: tegra: Add micro-USB A/B port on Jetson TK1
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Run the micro-USB A/B port on Jetson TK1 in host mode by default.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index 289bf6e99041..6eaa39646221 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -1775,6 +1775,12 @@ sata-0 {
};
ports {
+ /* Micro A/B */
+ usb2-0 {
+ status = "okay";
+ mode = "host";
+ };
+
/* Mini PCIe */
usb2-1 {
status = "okay";
--
2.24.1
^ permalink raw reply related
* [PATCH 21/73] ARM: tegra: Add missing panel power supplies on Nyan
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Both Nyan boards are missing panel power supplies. Add them.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-nyan-big.dts | 1 +
arch/arm/boot/dts/tegra124-nyan-blaze.dts | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
index 4d14dec21af6..1d2aac2cb6d0 100644
--- a/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -16,6 +16,7 @@ / {
panel: panel {
compatible = "auo,b133xtn01";
+ power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
};
diff --git a/arch/arm/boot/dts/tegra124-nyan-blaze.dts b/arch/arm/boot/dts/tegra124-nyan-blaze.dts
index 2a029ee86dd7..677babde6460 100644
--- a/arch/arm/boot/dts/tegra124-nyan-blaze.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-blaze.dts
@@ -18,6 +18,7 @@ / {
panel: panel {
compatible = "samsung,ltn140at29-301";
+ power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
};
--
2.24.1
^ permalink raw reply related
* [PATCH 22/73] ARM: tegra: Add #reset-cells to Tegra124 memory controller
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The memory controller exposes a set of memory client resets and needs to
specify the #reset-cells property in order to advertise the number of
cells needed to describe each of the resets.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 6d34742b56b9..98cd7962a559 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -622,6 +622,7 @@ mc: memory-controller@70019000 {
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
+ #reset-cells = <1>;
};
emc: external-memory-controller@7001b000 {
--
2.24.1
^ permalink raw reply related
* [PATCH 23/73] ARM: tegra: Fix order of XUSB controller clocks
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
This is purely to make the json-schema validation tools happy because
they cannot deal with string arrays that may be in arbitrary order.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 98cd7962a559..3840019ed5c6 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -680,8 +680,8 @@ usb@70090000 {
<&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_SS>,
- <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
+ <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA124_CLK_PLL_U_480M>,
@@ -689,7 +689,7 @@ usb@70090000 {
<&tegra_car TEGRA124_CLK_PLL_E>;
clock-names = "xusb_host", "xusb_host_src",
"xusb_falcon_src", "xusb_ss",
- "xusb_ss_div2", "xusb_ss_src",
+ "xusb_ss_src", "xusb_ss_div2",
"xusb_hs_src", "xusb_fs_src",
"pll_u_480m", "clk_m", "pll_e";
resets = <&tegra_car 89>, <&tegra_car 156>,
--
2.24.1
^ permalink raw reply related
* [PATCH 24/73] ARM: tegra: Add missing clock-names for SDHCI controllers
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The Tegra SDHCI controllers need to have a clock-names property
according to the bindings.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124.dtsi | 4 ++++
arch/arm/boot/dts/tegra20.dtsi | 4 ++++
arch/arm/boot/dts/tegra30.dtsi | 4 ++++
3 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 3840019ed5c6..175d0bcd7a2b 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -839,6 +839,7 @@ mmc@700b0000 {
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC1>;
+ clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
@@ -849,6 +850,7 @@ mmc@700b0200 {
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC2>;
+ clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
@@ -859,6 +861,7 @@ mmc@700b0400 {
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC3>;
+ clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
@@ -869,6 +872,7 @@ mmc@700b0600 {
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC4>;
+ clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 90393d8f5ebc..ccd2995aef83 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -813,6 +813,7 @@ mmc@c8000000 {
reg = <0xc8000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
+ clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
@@ -823,6 +824,7 @@ mmc@c8000200 {
reg = <0xc8000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC2>;
+ clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
@@ -833,6 +835,7 @@ mmc@c8000400 {
reg = <0xc8000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC3>;
+ clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
@@ -843,6 +846,7 @@ mmc@c8000600 {
reg = <0xc8000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC4>;
+ clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 9a8c07ccbb30..f838e4775cf6 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -856,6 +856,7 @@ mmc@78000000 {
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC1>;
+ clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
@@ -866,6 +867,7 @@ mmc@78000200 {
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC2>;
+ clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
@@ -876,6 +878,7 @@ mmc@78000400 {
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
+ clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
@@ -886,6 +889,7 @@ mmc@78000600 {
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC4>;
+ clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
--
2.24.1
^ permalink raw reply related
* [PATCH 25/73] ARM: tegra: Use proper unit-addresses for OPPs
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Use commas rather than underscores to separate the various parts of the
unit-address in CPU OPPs to make them properly validate under the json-
schema bindings.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
.../boot/dts/tegra20-cpu-opp-microvolt.dtsi | 98 ++---
arch/arm/boot/dts/tegra20-cpu-opp.dtsi | 98 ++---
.../boot/dts/tegra30-cpu-opp-microvolt.dtsi | 398 +++++++++---------
arch/arm/boot/dts/tegra30-cpu-opp.dtsi | 398 +++++++++---------
4 files changed, 496 insertions(+), 496 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi b/arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi
index e85ffdbef876..dce85d39480d 100644
--- a/arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi
+++ b/arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi
@@ -2,199 +2,199 @@
/ {
cpu0_opp_table: cpu_opp_table0 {
- opp@216000000_750 {
+ opp@216000000,750 {
opp-microvolt = <750000 750000 1125000>;
};
- opp@216000000_800 {
+ opp@216000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@312000000_750 {
+ opp@312000000,750 {
opp-microvolt = <750000 750000 1125000>;
};
- opp@312000000_800 {
+ opp@312000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@456000000_750 {
+ opp@456000000,750 {
opp-microvolt = <750000 750000 1125000>;
};
- opp@456000000_800 {
+ opp@456000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@456000000_800_2_2 {
+ opp@456000000,800,2,2 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@456000000_800_3_2 {
+ opp@456000000,800,3,2 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@456000000_825 {
+ opp@456000000,825 {
opp-microvolt = <825000 825000 1125000>;
};
- opp@608000000_750 {
+ opp@608000000,750 {
opp-microvolt = <750000 750000 1125000>;
};
- opp@608000000_800 {
+ opp@608000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@608000000_800_3_2 {
+ opp@608000000,800,3,2 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@608000000_825 {
+ opp@608000000,825 {
opp-microvolt = <825000 825000 1125000>;
};
- opp@608000000_850 {
+ opp@608000000,850 {
opp-microvolt = <850000 850000 1125000>;
};
- opp@608000000_900 {
+ opp@608000000,900 {
opp-microvolt = <900000 900000 1125000>;
};
- opp@760000000_775 {
+ opp@760000000,775 {
opp-microvolt = <775000 775000 1125000>;
};
- opp@760000000_800 {
+ opp@760000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@760000000_850 {
+ opp@760000000,850 {
opp-microvolt = <850000 850000 1125000>;
};
- opp@760000000_875 {
+ opp@760000000,875 {
opp-microvolt = <875000 875000 1125000>;
};
- opp@760000000_875_1_1 {
+ opp@760000000,875,1,1 {
opp-microvolt = <875000 875000 1125000>;
};
- opp@760000000_875_0_2 {
+ opp@760000000,875,0,2 {
opp-microvolt = <875000 875000 1125000>;
};
- opp@760000000_875_1_2 {
+ opp@760000000,875,1,2 {
opp-microvolt = <875000 875000 1125000>;
};
- opp@760000000_900 {
+ opp@760000000,900 {
opp-microvolt = <900000 900000 1125000>;
};
- opp@760000000_975 {
+ opp@760000000,975 {
opp-microvolt = <975000 975000 1125000>;
};
- opp@816000000_800 {
+ opp@816000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
- opp@816000000_850 {
+ opp@816000000,850 {
opp-microvolt = <850000 850000 1125000>;
};
- opp@816000000_875 {
+ opp@816000000,875 {
opp-microvolt = <875000 875000 1125000>;
};
- opp@816000000_950 {
+ opp@816000000,950 {
opp-microvolt = <950000 950000 1125000>;
};
- opp@816000000_1000 {
+ opp@816000000,1000 {
opp-microvolt = <1000000 1000000 1125000>;
};
- opp@912000000_850 {
+ opp@912000000,850 {
opp-microvolt = <850000 850000 1125000>;
};
- opp@912000000_900 {
+ opp@912000000,900 {
opp-microvolt = <900000 900000 1125000>;
};
- opp@912000000_925 {
+ opp@912000000,925 {
opp-microvolt = <925000 925000 1125000>;
};
- opp@912000000_950 {
+ opp@912000000,950 {
opp-microvolt = <950000 950000 1125000>;
};
- opp@912000000_950_0_2 {
+ opp@912000000,950,0,2 {
opp-microvolt = <950000 950000 1125000>;
};
- opp@912000000_950_2_2 {
+ opp@912000000,950,2,2 {
opp-microvolt = <950000 950000 1125000>;
};
- opp@912000000_1000 {
+ opp@912000000,1000 {
opp-microvolt = <1000000 1000000 1125000>;
};
- opp@912000000_1050 {
+ opp@912000000,1050 {
opp-microvolt = <1050000 1050000 1125000>;
};
- opp@1000000000_875 {
+ opp@1000000000,875 {
opp-microvolt = <875000 875000 1125000>;
};
- opp@1000000000_900 {
+ opp@1000000000,900 {
opp-microvolt = <900000 900000 1125000>;
};
- opp@1000000000_950 {
+ opp@1000000000,950 {
opp-microvolt = <950000 950000 1125000>;
};
- opp@1000000000_975 {
+ opp@1000000000,975 {
opp-microvolt = <975000 975000 1125000>;
};
- opp@1000000000_1000 {
+ opp@1000000000,1000 {
opp-microvolt = <1000000 1000000 1125000>;
};
- opp@1000000000_1000_0_2 {
+ opp@1000000000,1000,0,2 {
opp-microvolt = <1000000 1000000 1125000>;
};
- opp@1000000000_1025 {
+ opp@1000000000,1025 {
opp-microvolt = <1025000 1025000 1125000>;
};
- opp@1000000000_1100 {
+ opp@1000000000,1100 {
opp-microvolt = <1100000 1100000 1125000>;
};
- opp@1200000000_1000 {
+ opp@1200000000,1000 {
opp-microvolt = <1000000 1000000 1125000>;
};
- opp@1200000000_1050 {
+ opp@1200000000,1050 {
opp-microvolt = <1050000 1050000 1125000>;
};
- opp@1200000000_1100 {
+ opp@1200000000,1100 {
opp-microvolt = <1100000 1100000 1125000>;
};
- opp@1200000000_1125 {
+ opp@1200000000,1125 {
opp-microvolt = <1125000 1125000 1125000>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-cpu-opp.dtsi b/arch/arm/boot/dts/tegra20-cpu-opp.dtsi
index c878f4231791..9b8fedb57a1b 100644
--- a/arch/arm/boot/dts/tegra20-cpu-opp.dtsi
+++ b/arch/arm/boot/dts/tegra20-cpu-opp.dtsi
@@ -5,295 +5,295 @@ cpu0_opp_table: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
- opp@216000000_750 {
+ opp@216000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0003>;
opp-hz = /bits/ 64 <216000000>;
};
- opp@216000000_800 {
+ opp@216000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0004>;
opp-hz = /bits/ 64 <216000000>;
};
- opp@312000000_750 {
+ opp@312000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0003>;
opp-hz = /bits/ 64 <312000000>;
};
- opp@312000000_800 {
+ opp@312000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0004>;
opp-hz = /bits/ 64 <312000000>;
};
- opp@456000000_750 {
+ opp@456000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0C 0x0003>;
opp-hz = /bits/ 64 <456000000>;
};
- opp@456000000_800 {
+ opp@456000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0006>;
opp-hz = /bits/ 64 <456000000>;
};
- opp@456000000_800_2_2 {
+ opp@456000000,800,2,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <456000000>;
};
- opp@456000000_800_3_2 {
+ opp@456000000,800,3,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <456000000>;
};
- opp@456000000_825 {
+ opp@456000000,825 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <456000000>;
};
- opp@608000000_750 {
+ opp@608000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0003>;
opp-hz = /bits/ 64 <608000000>;
};
- opp@608000000_800 {
+ opp@608000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0006>;
opp-hz = /bits/ 64 <608000000>;
};
- opp@608000000_800_3_2 {
+ opp@608000000,800,3,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <608000000>;
};
- opp@608000000_825 {
+ opp@608000000,825 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <608000000>;
};
- opp@608000000_850 {
+ opp@608000000,850 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0006>;
opp-hz = /bits/ 64 <608000000>;
};
- opp@608000000_900 {
+ opp@608000000,900 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <608000000>;
};
- opp@760000000_775 {
+ opp@760000000,775 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0003>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_800 {
+ opp@760000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850 {
+ opp@760000000,850 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0006>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_875 {
+ opp@760000000,875 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_875_1_1 {
+ opp@760000000,875,1,1 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0002>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_875_0_2 {
+ opp@760000000,875,0,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_875_1_2 {
+ opp@760000000,875,1,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900 {
+ opp@760000000,900 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0002>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_975 {
+ opp@760000000,975 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@816000000_800 {
+ opp@816000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0007>;
opp-hz = /bits/ 64 <816000000>;
};
- opp@816000000_850 {
+ opp@816000000,850 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <816000000>;
};
- opp@816000000_875 {
+ opp@816000000,875 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0005>;
opp-hz = /bits/ 64 <816000000>;
};
- opp@816000000_950 {
+ opp@816000000,950 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0006>;
opp-hz = /bits/ 64 <816000000>;
};
- opp@816000000_1000 {
+ opp@816000000,1000 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <816000000>;
};
- opp@912000000_850 {
+ opp@912000000,850 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0007>;
opp-hz = /bits/ 64 <912000000>;
};
- opp@912000000_900 {
+ opp@912000000,900 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <912000000>;
};
- opp@912000000_925 {
+ opp@912000000,925 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <912000000>;
};
- opp@912000000_950 {
+ opp@912000000,950 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0006>;
opp-hz = /bits/ 64 <912000000>;
};
- opp@912000000_950_0_2 {
+ opp@912000000,950,0,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0004>;
opp-hz = /bits/ 64 <912000000>;
};
- opp@912000000_950_2_2 {
+ opp@912000000,950,2,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <912000000>;
};
- opp@912000000_1000 {
+ opp@912000000,1000 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0002>;
opp-hz = /bits/ 64 <912000000>;
};
- opp@912000000_1050 {
+ opp@912000000,1050 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <912000000>;
};
- opp@1000000000_875 {
+ opp@1000000000,875 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0007>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_900 {
+ opp@1000000000,900 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_950 {
+ opp@1000000000,950 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975 {
+ opp@1000000000,975 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_1000 {
+ opp@1000000000,1000 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0006>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_1000_0_2 {
+ opp@1000000000,1000,0,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0004>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_1025 {
+ opp@1000000000,1025 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0002>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_1100 {
+ opp@1000000000,1100 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1200000000_1000 {
+ opp@1200000000,1000 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1050 {
+ opp@1200000000,1050 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1100 {
+ opp@1200000000,1100 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1125 {
+ opp@1200000000,1125 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
diff --git a/arch/arm/boot/dts/tegra30-cpu-opp-microvolt.dtsi b/arch/arm/boot/dts/tegra30-cpu-opp-microvolt.dtsi
index 5c40ef49894f..d682f7437146 100644
--- a/arch/arm/boot/dts/tegra30-cpu-opp-microvolt.dtsi
+++ b/arch/arm/boot/dts/tegra30-cpu-opp-microvolt.dtsi
@@ -2,799 +2,799 @@
/ {
cpu0_opp_table: cpu_opp_table0 {
- opp@51000000_800 {
+ opp@51000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
- opp@51000000_850 {
+ opp@51000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@51000000_912 {
+ opp@51000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
- opp@102000000_800 {
+ opp@102000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
- opp@102000000_850 {
+ opp@102000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@102000000_912 {
+ opp@102000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
- opp@204000000_800 {
+ opp@204000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
- opp@204000000_850 {
+ opp@204000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@204000000_912 {
+ opp@204000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
- opp@312000000_850 {
+ opp@312000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@312000000_912 {
+ opp@312000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
- opp@340000000_800 {
+ opp@340000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
- opp@340000000_850 {
+ opp@340000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@370000000_800 {
+ opp@370000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
- opp@456000000_850 {
+ opp@456000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@456000000_912 {
+ opp@456000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
- opp@475000000_800 {
+ opp@475000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
- opp@475000000_850 {
+ opp@475000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@475000000_850_0_1 {
+ opp@475000000,850,0,1 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@475000000_850_0_4 {
+ opp@475000000,850,0,4 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@475000000_850_0_7 {
+ opp@475000000,850,0,7 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@475000000_850_0_8 {
+ opp@475000000,850,0,8 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@608000000_850 {
+ opp@608000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@608000000_912 {
+ opp@608000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
- opp@620000000_850 {
+ opp@620000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850 {
+ opp@640000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_1_1 {
+ opp@640000000,850,1,1 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_2_1 {
+ opp@640000000,850,2,1 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_3_1 {
+ opp@640000000,850,3,1 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_1_4 {
+ opp@640000000,850,1,4 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_2_4 {
+ opp@640000000,850,2,4 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_3_4 {
+ opp@640000000,850,3,4 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_1_7 {
+ opp@640000000,850,1,7 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_2_7 {
+ opp@640000000,850,2,7 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_3_7 {
+ opp@640000000,850,3,7 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_4_7 {
+ opp@640000000,850,4,7 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_1_8 {
+ opp@640000000,850,1,8 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_2_8 {
+ opp@640000000,850,2,8 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_3_8 {
+ opp@640000000,850,3,8 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_850_4_8 {
+ opp@640000000,850,4,8 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@640000000_900 {
+ opp@640000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_850 {
+ opp@760000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_3_1 {
+ opp@760000000,850,3,1 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_3_2 {
+ opp@760000000,850,3,2 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_3_3 {
+ opp@760000000,850,3,3 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_3_4 {
+ opp@760000000,850,3,4 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_3_7 {
+ opp@760000000,850,3,7 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_4_7 {
+ opp@760000000,850,4,7 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_3_8 {
+ opp@760000000,850,3,8 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_4_8 {
+ opp@760000000,850,4,8 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_850_0_10 {
+ opp@760000000,850,0,10 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@760000000_900 {
+ opp@760000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_1_1 {
+ opp@760000000,900,1,1 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_2_1 {
+ opp@760000000,900,2,1 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_1_2 {
+ opp@760000000,900,1,2 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_2_2 {
+ opp@760000000,900,2,2 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_1_3 {
+ opp@760000000,900,1,3 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_2_3 {
+ opp@760000000,900,2,3 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_1_4 {
+ opp@760000000,900,1,4 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_2_4 {
+ opp@760000000,900,2,4 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_1_7 {
+ opp@760000000,900,1,7 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_2_7 {
+ opp@760000000,900,2,7 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_1_8 {
+ opp@760000000,900,1,8 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_900_2_8 {
+ opp@760000000,900,2,8 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@760000000_912 {
+ opp@760000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
- opp@760000000_975 {
+ opp@760000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@816000000_850 {
+ opp@816000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@816000000_912 {
+ opp@816000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
- opp@860000000_850 {
+ opp@860000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
- opp@860000000_900 {
+ opp@860000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_2_1 {
+ opp@860000000,900,2,1 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_3_1 {
+ opp@860000000,900,3,1 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_2_2 {
+ opp@860000000,900,2,2 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_3_2 {
+ opp@860000000,900,3,2 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_2_3 {
+ opp@860000000,900,2,3 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_3_3 {
+ opp@860000000,900,3,3 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_2_4 {
+ opp@860000000,900,2,4 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_3_4 {
+ opp@860000000,900,3,4 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_2_7 {
+ opp@860000000,900,2,7 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_3_7 {
+ opp@860000000,900,3,7 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_4_7 {
+ opp@860000000,900,4,7 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_2_8 {
+ opp@860000000,900,2,8 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_3_8 {
+ opp@860000000,900,3,8 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_900_4_8 {
+ opp@860000000,900,4,8 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@860000000_975 {
+ opp@860000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@860000000_975_1_1 {
+ opp@860000000,975,1,1 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@860000000_975_1_2 {
+ opp@860000000,975,1,2 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@860000000_975_1_3 {
+ opp@860000000,975,1,3 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@860000000_975_1_4 {
+ opp@860000000,975,1,4 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@860000000_975_1_7 {
+ opp@860000000,975,1,7 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@860000000_975_1_8 {
+ opp@860000000,975,1,8 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@860000000_1000 {
+ opp@860000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@910000000_900 {
+ opp@910000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@1000000000_900 {
+ opp@1000000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@1000000000_975 {
+ opp@1000000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_2_1 {
+ opp@1000000000,975,2,1 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_3_1 {
+ opp@1000000000,975,3,1 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_2_2 {
+ opp@1000000000,975,2,2 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_3_2 {
+ opp@1000000000,975,3,2 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_2_3 {
+ opp@1000000000,975,2,3 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_3_3 {
+ opp@1000000000,975,3,3 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_2_4 {
+ opp@1000000000,975,2,4 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_3_4 {
+ opp@1000000000,975,3,4 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_2_7 {
+ opp@1000000000,975,2,7 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_3_7 {
+ opp@1000000000,975,3,7 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_4_7 {
+ opp@1000000000,975,4,7 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_2_8 {
+ opp@1000000000,975,2,8 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_3_8 {
+ opp@1000000000,975,3,8 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_975_4_8 {
+ opp@1000000000,975,4,8 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1000000000_1000 {
+ opp@1000000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1000000000_1025 {
+ opp@1000000000,1025 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1100000000_900 {
+ opp@1100000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
- opp@1100000000_975 {
+ opp@1100000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_975_3_1 {
+ opp@1100000000,975,3,1 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_975_3_2 {
+ opp@1100000000,975,3,2 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_975_3_3 {
+ opp@1100000000,975,3,3 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_975_3_4 {
+ opp@1100000000,975,3,4 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_975_3_7 {
+ opp@1100000000,975,3,7 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_975_4_7 {
+ opp@1100000000,975,4,7 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_975_3_8 {
+ opp@1100000000,975,3,8 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_975_4_8 {
+ opp@1100000000,975,4,8 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1100000000_1000 {
+ opp@1100000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1100000000_1000_2_1 {
+ opp@1100000000,1000,2,1 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1100000000_1000_2_2 {
+ opp@1100000000,1000,2,2 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1100000000_1000_2_3 {
+ opp@1100000000,1000,2,3 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1100000000_1000_2_4 {
+ opp@1100000000,1000,2,4 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1100000000_1000_2_7 {
+ opp@1100000000,1000,2,7 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1100000000_1000_2_8 {
+ opp@1100000000,1000,2,8 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1100000000_1025 {
+ opp@1100000000,1025 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1100000000_1075 {
+ opp@1100000000,1075 {
opp-microvolt = <1075000 1075000 1250000>;
};
- opp@1150000000_975 {
+ opp@1150000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1200000000_975 {
+ opp@1200000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
- opp@1200000000_1000 {
+ opp@1200000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1000_3_1 {
+ opp@1200000000,1000,3,1 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1000_3_2 {
+ opp@1200000000,1000,3,2 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1000_3_3 {
+ opp@1200000000,1000,3,3 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1000_3_4 {
+ opp@1200000000,1000,3,4 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1000_3_7 {
+ opp@1200000000,1000,3,7 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1000_4_7 {
+ opp@1200000000,1000,4,7 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1000_3_8 {
+ opp@1200000000,1000,3,8 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1000_4_8 {
+ opp@1200000000,1000,4,8 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1200000000_1025 {
+ opp@1200000000,1025 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1200000000_1025_2_1 {
+ opp@1200000000,1025,2,1 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1200000000_1025_2_2 {
+ opp@1200000000,1025,2,2 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1200000000_1025_2_3 {
+ opp@1200000000,1025,2,3 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1200000000_1025_2_4 {
+ opp@1200000000,1025,2,4 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1200000000_1025_2_7 {
+ opp@1200000000,1025,2,7 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1200000000_1025_2_8 {
+ opp@1200000000,1025,2,8 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1200000000_1050 {
+ opp@1200000000,1050 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1200000000_1075 {
+ opp@1200000000,1075 {
opp-microvolt = <1075000 1075000 1250000>;
};
- opp@1200000000_1100 {
+ opp@1200000000,1100 {
opp-microvolt = <1100000 1100000 1250000>;
};
- opp@1300000000_1000 {
+ opp@1300000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1300000000_1000_4_7 {
+ opp@1300000000,1000,4,7 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1300000000_1000_4_8 {
+ opp@1300000000,1000,4,8 {
opp-microvolt = <1000000 1000000 1250000>;
};
- opp@1300000000_1025 {
+ opp@1300000000,1025 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1300000000_1025_3_1 {
+ opp@1300000000,1025,3,1 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1300000000_1025_3_7 {
+ opp@1300000000,1025,3,7 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1300000000_1025_3_8 {
+ opp@1300000000,1025,3,8 {
opp-microvolt = <1025000 1025000 1250000>;
};
- opp@1300000000_1050 {
+ opp@1300000000,1050 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_2_1 {
+ opp@1300000000,1050,2,1 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_3_2 {
+ opp@1300000000,1050,3,2 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_3_3 {
+ opp@1300000000,1050,3,3 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_3_4 {
+ opp@1300000000,1050,3,4 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_3_5 {
+ opp@1300000000,1050,3,5 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_3_6 {
+ opp@1300000000,1050,3,6 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_2_7 {
+ opp@1300000000,1050,2,7 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_2_8 {
+ opp@1300000000,1050,2,8 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_3_12 {
+ opp@1300000000,1050,3,12 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1050_3_13 {
+ opp@1300000000,1050,3,13 {
opp-microvolt = <1050000 1050000 1250000>;
};
- opp@1300000000_1075 {
+ opp@1300000000,1075 {
opp-microvolt = <1075000 1075000 1250000>;
};
- opp@1300000000_1075_2_2 {
+ opp@1300000000,1075,2,2 {
opp-microvolt = <1075000 1075000 1250000>;
};
- opp@1300000000_1075_2_3 {
+ opp@1300000000,1075,2,3 {
opp-microvolt = <1075000 1075000 1250000>;
};
- opp@1300000000_1075_2_4 {
+ opp@1300000000,1075,2,4 {
opp-microvolt = <1075000 1075000 1250000>;
};
- opp@1300000000_1100 {
+ opp@1300000000,1100 {
opp-microvolt = <1100000 1100000 1250000>;
};
- opp@1300000000_1125 {
+ opp@1300000000,1125 {
opp-microvolt = <1125000 1125000 1250000>;
};
- opp@1300000000_1150 {
+ opp@1300000000,1150 {
opp-microvolt = <1150000 1150000 1250000>;
};
- opp@1300000000_1175 {
+ opp@1300000000,1175 {
opp-microvolt = <1175000 1175000 1250000>;
};
- opp@1400000000_1100 {
+ opp@1400000000,1100 {
opp-microvolt = <1100000 1100000 1250000>;
};
- opp@1400000000_1125 {
+ opp@1400000000,1125 {
opp-microvolt = <1125000 1125000 1250000>;
};
- opp@1400000000_1150 {
+ opp@1400000000,1150 {
opp-microvolt = <1150000 1150000 1250000>;
};
- opp@1400000000_1150_2_4 {
+ opp@1400000000,1150,2,4 {
opp-microvolt = <1150000 1150000 1250000>;
};
- opp@1400000000_1175 {
+ opp@1400000000,1175 {
opp-microvolt = <1175000 1175000 1250000>;
};
- opp@1400000000_1237 {
+ opp@1400000000,1237 {
opp-microvolt = <1237000 1237000 1250000>;
};
- opp@1500000000_1125 {
+ opp@1500000000,1125 {
opp-microvolt = <1125000 1125000 1250000>;
};
- opp@1500000000_1125_4_5 {
+ opp@1500000000,1125,4,5 {
opp-microvolt = <1125000 1125000 1250000>;
};
- opp@1500000000_1125_4_6 {
+ opp@1500000000,1125,4,6 {
opp-microvolt = <1125000 1125000 1250000>;
};
- opp@1500000000_1125_4_12 {
+ opp@1500000000,1125,4,12 {
opp-microvolt = <1125000 1125000 1250000>;
};
- opp@1500000000_1125_4_13 {
+ opp@1500000000,1125,4,13 {
opp-microvolt = <1125000 1125000 1250000>;
};
- opp@1500000000_1150 {
+ opp@1500000000,1150 {
opp-microvolt = <1150000 1150000 1250000>;
};
- opp@1500000000_1150_3_5 {
+ opp@1500000000,1150,3,5 {
opp-microvolt = <1150000 1150000 1250000>;
};
- opp@1500000000_1150_3_6 {
+ opp@1500000000,1150,3,6 {
opp-microvolt = <1150000 1150000 1250000>;
};
- opp@1500000000_1150_3_12 {
+ opp@1500000000,1150,3,12 {
opp-microvolt = <1150000 1150000 1250000>;
};
- opp@1500000000_1150_3_13 {
+ opp@1500000000,1150,3,13 {
opp-microvolt = <1150000 1150000 1250000>;
};
- opp@1500000000_1200 {
+ opp@1500000000,1200 {
opp-microvolt = <1200000 1200000 1250000>;
};
- opp@1500000000_1237 {
+ opp@1500000000,1237 {
opp-microvolt = <1237000 1237000 1250000>;
};
- opp@1600000000_1212 {
+ opp@1600000000,1212 {
opp-microvolt = <1212000 1212000 1250000>;
};
- opp@1600000000_1237 {
+ opp@1600000000,1237 {
opp-microvolt = <1237000 1237000 1250000>;
};
- opp@1700000000_1212 {
+ opp@1700000000,1212 {
opp-microvolt = <1212000 1212000 1250000>;
};
- opp@1700000000_1237 {
+ opp@1700000000,1237 {
opp-microvolt = <1237000 1237000 1250000>;
};
};
diff --git a/arch/arm/boot/dts/tegra30-cpu-opp.dtsi b/arch/arm/boot/dts/tegra30-cpu-opp.dtsi
index d64fc262585e..8e434f6713cd 100644
--- a/arch/arm/boot/dts/tegra30-cpu-opp.dtsi
+++ b/arch/arm/boot/dts/tegra30-cpu-opp.dtsi
@@ -5,1195 +5,1195 @@ cpu0_opp_table: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
- opp@51000000_800 {
+ opp@51000000,800 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x31FE>;
opp-hz = /bits/ 64 <51000000>;
};
- opp@51000000_850 {
+ opp@51000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0C01>;
opp-hz = /bits/ 64 <51000000>;
};
- opp@51000000_912 {
+ opp@51000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <51000000>;
};
- opp@102000000_800 {
+ opp@102000000,800 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x31FE>;
opp-hz = /bits/ 64 <102000000>;
};
- opp@102000000_850 {
+ opp@102000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0C01>;
opp-hz = /bits/ 64 <102000000>;
};
- opp@102000000_912 {
+ opp@102000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <102000000>;
};
- opp@204000000_800 {
+ opp@204000000,800 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x31FE>;
opp-hz = /bits/ 64 <204000000>;
};
- opp@204000000_850 {
+ opp@204000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0C01>;
opp-hz = /bits/ 64 <204000000>;
};
- opp@204000000_912 {
+ opp@204000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <204000000>;
};
- opp@312000000_850 {
+ opp@312000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0C00>;
opp-hz = /bits/ 64 <312000000>;
};
- opp@312000000_912 {
+ opp@312000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <312000000>;
};
- opp@340000000_800 {
+ opp@340000000,800 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0192>;
opp-hz = /bits/ 64 <340000000>;
};
- opp@340000000_850 {
+ opp@340000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x0F 0x0001>;
opp-hz = /bits/ 64 <340000000>;
};
- opp@370000000_800 {
+ opp@370000000,800 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1E 0x306C>;
opp-hz = /bits/ 64 <370000000>;
};
- opp@456000000_850 {
+ opp@456000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0C00>;
opp-hz = /bits/ 64 <456000000>;
};
- opp@456000000_912 {
+ opp@456000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <456000000>;
};
- opp@475000000_800 {
+ opp@475000000,800 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1E 0x31FE>;
opp-hz = /bits/ 64 <475000000>;
};
- opp@475000000_850 {
+ opp@475000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x0F 0x0001>;
opp-hz = /bits/ 64 <475000000>;
};
- opp@475000000_850_0_1 {
+ opp@475000000,850,0,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0002>;
opp-hz = /bits/ 64 <475000000>;
};
- opp@475000000_850_0_4 {
+ opp@475000000,850,0,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0010>;
opp-hz = /bits/ 64 <475000000>;
};
- opp@475000000_850_0_7 {
+ opp@475000000,850,0,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0080>;
opp-hz = /bits/ 64 <475000000>;
};
- opp@475000000_850_0_8 {
+ opp@475000000,850,0,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0100>;
opp-hz = /bits/ 64 <475000000>;
};
- opp@608000000_850 {
+ opp@608000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0400>;
opp-hz = /bits/ 64 <608000000>;
};
- opp@608000000_912 {
+ opp@608000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <608000000>;
};
- opp@620000000_850 {
+ opp@620000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1E 0x306C>;
opp-hz = /bits/ 64 <620000000>;
};
- opp@640000000_850 {
+ opp@640000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x0F 0x0001>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_1_1 {
+ opp@640000000,850,1,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0002>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_2_1 {
+ opp@640000000,850,2,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_3_1 {
+ opp@640000000,850,3,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0002>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_1_4 {
+ opp@640000000,850,1,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0010>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_2_4 {
+ opp@640000000,850,2,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_3_4 {
+ opp@640000000,850,3,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0010>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_1_7 {
+ opp@640000000,850,1,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0080>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_2_7 {
+ opp@640000000,850,2,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0080>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_3_7 {
+ opp@640000000,850,3,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0080>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_4_7 {
+ opp@640000000,850,4,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0080>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_1_8 {
+ opp@640000000,850,1,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0100>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_2_8 {
+ opp@640000000,850,2,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0100>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_3_8 {
+ opp@640000000,850,3,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0100>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_850_4_8 {
+ opp@640000000,850,4,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0100>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@640000000_900 {
+ opp@640000000,900 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0192>;
opp-hz = /bits/ 64 <640000000>;
};
- opp@760000000_850 {
+ opp@760000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1E 0x3461>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_3_1 {
+ opp@760000000,850,3,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0002>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_3_2 {
+ opp@760000000,850,3,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_3_3 {
+ opp@760000000,850,3,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0008>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_3_4 {
+ opp@760000000,850,3,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0010>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_3_7 {
+ opp@760000000,850,3,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0080>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_4_7 {
+ opp@760000000,850,4,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0080>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_3_8 {
+ opp@760000000,850,3,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0100>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_4_8 {
+ opp@760000000,850,4,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0100>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_850_0_10 {
+ opp@760000000,850,0,10 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0400>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900 {
+ opp@760000000,900 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0001>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_1_1 {
+ opp@760000000,900,1,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0002>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_2_1 {
+ opp@760000000,900,2,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_1_2 {
+ opp@760000000,900,1,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_2_2 {
+ opp@760000000,900,2,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_1_3 {
+ opp@760000000,900,1,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0008>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_2_3 {
+ opp@760000000,900,2,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0008>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_1_4 {
+ opp@760000000,900,1,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0010>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_2_4 {
+ opp@760000000,900,2,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_1_7 {
+ opp@760000000,900,1,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0080>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_2_7 {
+ opp@760000000,900,2,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0080>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_1_8 {
+ opp@760000000,900,1,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0100>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_900_2_8 {
+ opp@760000000,900,2,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0100>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_912 {
+ opp@760000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@760000000_975 {
+ opp@760000000,975 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0192>;
opp-hz = /bits/ 64 <760000000>;
};
- opp@816000000_850 {
+ opp@816000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0400>;
opp-hz = /bits/ 64 <816000000>;
};
- opp@816000000_912 {
+ opp@816000000,912 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x1F 0x0200>;
opp-hz = /bits/ 64 <816000000>;
};
- opp@860000000_850 {
+ opp@860000000,850 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x0C 0x0001>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900 {
+ opp@860000000,900 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0001>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_2_1 {
+ opp@860000000,900,2,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_3_1 {
+ opp@860000000,900,3,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0002>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_2_2 {
+ opp@860000000,900,2,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_3_2 {
+ opp@860000000,900,3,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_2_3 {
+ opp@860000000,900,2,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0008>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_3_3 {
+ opp@860000000,900,3,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0008>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_2_4 {
+ opp@860000000,900,2,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_3_4 {
+ opp@860000000,900,3,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0010>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_2_7 {
+ opp@860000000,900,2,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0080>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_3_7 {
+ opp@860000000,900,3,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0080>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_4_7 {
+ opp@860000000,900,4,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0080>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_2_8 {
+ opp@860000000,900,2,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0100>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_3_8 {
+ opp@860000000,900,3,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0100>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_900_4_8 {
+ opp@860000000,900,4,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0100>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_975 {
+ opp@860000000,975 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0001>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_975_1_1 {
+ opp@860000000,975,1,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0002>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_975_1_2 {
+ opp@860000000,975,1,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0004>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_975_1_3 {
+ opp@860000000,975,1,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0008>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_975_1_4 {
+ opp@860000000,975,1,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0010>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_975_1_7 {
+ opp@860000000,975,1,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0080>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_975_1_8 {
+ opp@860000000,975,1,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0100>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@860000000_1000 {
+ opp@860000000,1000 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0192>;
opp-hz = /bits/ 64 <860000000>;
};
- opp@910000000_900 {
+ opp@910000000,900 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x18 0x3060>;
opp-hz = /bits/ 64 <910000000>;
};
- opp@1000000000_900 {
+ opp@1000000000,900 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x0C 0x0001>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975 {
+ opp@1000000000,975 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_2_1 {
+ opp@1000000000,975,2,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_3_1 {
+ opp@1000000000,975,3,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0002>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_2_2 {
+ opp@1000000000,975,2,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_3_2 {
+ opp@1000000000,975,3,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_2_3 {
+ opp@1000000000,975,2,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0008>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_3_3 {
+ opp@1000000000,975,3,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0008>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_2_4 {
+ opp@1000000000,975,2,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_3_4 {
+ opp@1000000000,975,3,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0010>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_2_7 {
+ opp@1000000000,975,2,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0080>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_3_7 {
+ opp@1000000000,975,3,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0080>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_4_7 {
+ opp@1000000000,975,4,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0080>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_2_8 {
+ opp@1000000000,975,2,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0100>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_3_8 {
+ opp@1000000000,975,3,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0100>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_975_4_8 {
+ opp@1000000000,975,4,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0100>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_1000 {
+ opp@1000000000,1000 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x019E>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1000000000_1025 {
+ opp@1000000000,1025 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0192>;
opp-hz = /bits/ 64 <1000000000>;
};
- opp@1100000000_900 {
+ opp@1100000000,900 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0001>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975 {
+ opp@1100000000,975 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x06 0x0001>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975_3_1 {
+ opp@1100000000,975,3,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0002>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975_3_2 {
+ opp@1100000000,975,3,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975_3_3 {
+ opp@1100000000,975,3,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0008>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975_3_4 {
+ opp@1100000000,975,3,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0010>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975_3_7 {
+ opp@1100000000,975,3,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0080>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975_4_7 {
+ opp@1100000000,975,4,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0080>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975_3_8 {
+ opp@1100000000,975,3,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0100>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_975_4_8 {
+ opp@1100000000,975,4,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0100>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1000 {
+ opp@1100000000,1000 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0001>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1000_2_1 {
+ opp@1100000000,1000,2,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1000_2_2 {
+ opp@1100000000,1000,2,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1000_2_3 {
+ opp@1100000000,1000,2,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0008>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1000_2_4 {
+ opp@1100000000,1000,2,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1000_2_7 {
+ opp@1100000000,1000,2,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0080>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1000_2_8 {
+ opp@1100000000,1000,2,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0100>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1025 {
+ opp@1100000000,1025 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x019E>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1100000000_1075 {
+ opp@1100000000,1075 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0192>;
opp-hz = /bits/ 64 <1100000000>;
};
- opp@1150000000_975 {
+ opp@1150000000,975 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x18 0x3060>;
opp-hz = /bits/ 64 <1150000000>;
};
- opp@1200000000_975 {
+ opp@1200000000,975 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0001>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000 {
+ opp@1200000000,1000 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000_3_1 {
+ opp@1200000000,1000,3,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0002>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000_3_2 {
+ opp@1200000000,1000,3,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000_3_3 {
+ opp@1200000000,1000,3,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0008>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000_3_4 {
+ opp@1200000000,1000,3,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0010>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000_3_7 {
+ opp@1200000000,1000,3,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0080>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000_4_7 {
+ opp@1200000000,1000,4,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0080>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000_3_8 {
+ opp@1200000000,1000,3,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0100>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1000_4_8 {
+ opp@1200000000,1000,4,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0100>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1025 {
+ opp@1200000000,1025 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0001>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1025_2_1 {
+ opp@1200000000,1025,2,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1025_2_2 {
+ opp@1200000000,1025,2,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1025_2_3 {
+ opp@1200000000,1025,2,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0008>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1025_2_4 {
+ opp@1200000000,1025,2,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1025_2_7 {
+ opp@1200000000,1025,2,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0080>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1025_2_8 {
+ opp@1200000000,1025,2,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0100>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1050 {
+ opp@1200000000,1050 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x019E>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1075 {
+ opp@1200000000,1075 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0001>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1200000000_1100 {
+ opp@1200000000,1100 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0192>;
opp-hz = /bits/ 64 <1200000000>;
};
- opp@1300000000_1000 {
+ opp@1300000000,1000 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0001>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1000_4_7 {
+ opp@1300000000,1000,4,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0080>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1000_4_8 {
+ opp@1300000000,1000,4,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0100>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1025 {
+ opp@1300000000,1025 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1025_3_1 {
+ opp@1300000000,1025,3,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0002>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1025_3_7 {
+ opp@1300000000,1025,3,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0080>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1025_3_8 {
+ opp@1300000000,1025,3,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0100>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050 {
+ opp@1300000000,1050 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x12 0x3061>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_2_1 {
+ opp@1300000000,1050,2,1 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_3_2 {
+ opp@1300000000,1050,3,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_3_3 {
+ opp@1300000000,1050,3,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0008>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_3_4 {
+ opp@1300000000,1050,3,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0010>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_3_5 {
+ opp@1300000000,1050,3,5 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0020>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_3_6 {
+ opp@1300000000,1050,3,6 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0040>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_2_7 {
+ opp@1300000000,1050,2,7 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0080>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_2_8 {
+ opp@1300000000,1050,2,8 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0100>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_3_12 {
+ opp@1300000000,1050,3,12 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x1000>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1050_3_13 {
+ opp@1300000000,1050,3,13 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x2000>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1075 {
+ opp@1300000000,1075 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0182>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1075_2_2 {
+ opp@1300000000,1075,2,2 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1075_2_3 {
+ opp@1300000000,1075,2,3 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0008>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1075_2_4 {
+ opp@1300000000,1075,2,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1100 {
+ opp@1300000000,1100 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x001C>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1125 {
+ opp@1300000000,1125 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0001>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1150 {
+ opp@1300000000,1150 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0182>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1300000000_1175 {
+ opp@1300000000,1175 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0010>;
opp-hz = /bits/ 64 <1300000000>;
};
- opp@1400000000_1100 {
+ opp@1400000000,1100 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x18 0x307C>;
opp-hz = /bits/ 64 <1400000000>;
};
- opp@1400000000_1125 {
+ opp@1400000000,1125 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x000C>;
opp-hz = /bits/ 64 <1400000000>;
};
- opp@1400000000_1150 {
+ opp@1400000000,1150 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x000C>;
opp-hz = /bits/ 64 <1400000000>;
};
- opp@1400000000_1150_2_4 {
+ opp@1400000000,1150,2,4 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <1400000000>;
};
- opp@1400000000_1175 {
+ opp@1400000000,1175 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0010>;
opp-hz = /bits/ 64 <1400000000>;
};
- opp@1400000000_1237 {
+ opp@1400000000,1237 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0010>;
opp-hz = /bits/ 64 <1400000000>;
};
- opp@1500000000_1125 {
+ opp@1500000000,1125 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0010>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1125_4_5 {
+ opp@1500000000,1125,4,5 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0020>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1125_4_6 {
+ opp@1500000000,1125,4,6 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x0040>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1125_4_12 {
+ opp@1500000000,1125,4,12 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x1000>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1125_4_13 {
+ opp@1500000000,1125,4,13 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x2000>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1150 {
+ opp@1500000000,1150 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x04 0x0010>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1150_3_5 {
+ opp@1500000000,1150,3,5 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0020>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1150_3_6 {
+ opp@1500000000,1150,3,6 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x0040>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1150_3_12 {
+ opp@1500000000,1150,3,12 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x1000>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1150_3_13 {
+ opp@1500000000,1150,3,13 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x2000>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1200 {
+ opp@1500000000,1200 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x02 0x0010>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1500000000_1237 {
+ opp@1500000000,1237 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x01 0x0010>;
opp-hz = /bits/ 64 <1500000000>;
};
- opp@1600000000_1212 {
+ opp@1600000000,1212 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x3060>;
opp-hz = /bits/ 64 <1600000000>;
};
- opp@1600000000_1237 {
+ opp@1600000000,1237 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x3060>;
opp-hz = /bits/ 64 <1600000000>;
};
- opp@1700000000_1212 {
+ opp@1700000000,1212 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x10 0x3060>;
opp-hz = /bits/ 64 <1700000000>;
};
- opp@1700000000_1237 {
+ opp@1700000000,1237 {
clock-latency-ns = <100000>;
opp-supported-hw = <0x08 0x3060>;
opp-hz = /bits/ 64 <1700000000>;
--
2.24.1
^ permalink raw reply related
* [PATCH 26/73] ARM: tegra: medcom-wide: Remove extra panel power supply
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Simple panels can only have a single power supply. The second listed
supply is not needed because it is also the input supply of the first
supply and therefore will always be on at the same time.
In retrospect the panel probably doesn't qualify as simple since it
apparently does need both of these supplies, even if in the case of the
Medcom Wide it isn't necessary to explicitly hook them up.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index 049181421a86..a348ca30e522 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -59,7 +59,7 @@ backlight: backlight {
panel: panel {
compatible = "innolux,n156bge-l21";
- power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
+ power-supply = <&vdd_1v8_reg>; // <&vdd_3v3_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
--
2.24.1
^ permalink raw reply related
* [PATCH 27/73] ARM: tegra: Use numeric unit-addresses
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Unit-addresses should be numeric. This fixes a validation failure seen
using the json-schema tooling.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra20-paz00.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 91b6bb82e960..f6aa783b0f02 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -314,7 +314,7 @@ nvec@7000c500 {
memory-controller@7000f400 {
nvidia,use-ram-code;
- emc-tables@hynix {
+ emc-tables@0 {
nvidia,ram-code = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
--
2.24.1
^ permalink raw reply related
* [PATCH 28/73] ARM: tegra: Use standard names for LED nodes
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
LED nodes should be named led-* to match the bindings.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra20-paz00.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index f6aa783b0f02..ada2bed8b1b5 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -589,7 +589,7 @@ wakeup {
gpio-leds {
compatible = "gpio-leds";
- wifi {
+ led-0 {
label = "wifi-led";
gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
linux,default-trigger = "rfkill0";
--
2.24.1
^ permalink raw reply related
* [PATCH 29/73] ARM: tegra: seaboard: Use standard battery bindings
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Seaboard uses a non-existing, possibly obsoleted, binding for the
battery. Move to the standard binding which seems to be a super-
set of the odl binding.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra20-seaboard.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index f1baf16c5010..c24d4a37613e 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -394,10 +394,10 @@ lvds_ddc: i2c@1 {
#size-cells = <0>;
smart-battery@b {
- compatible = "ti,bq20z75", "smart-battery-1.1";
+ compatible = "ti,bq20z75", "sbs,sbs-battery";
reg = <0xb>;
- ti,i2c-retry-count = <2>;
- ti,poll-retry-count = <10>;
+ sbs,i2c-retry-count = <2>;
+ sbs,poll-retry-count = <10>;
};
};
};
--
2.24.1
^ permalink raw reply related
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