From: "Masami Hiramatsu (Google)" <mhiramat@kernel.org>
To: Steven Rostedt <rostedt@goodmis.org>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@kernel.org>,
x86@kernel.org
Cc: Jinchao Wang <wangjinchao600@gmail.com>,
Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H . Peter Anvin" <hpa@zytor.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Ian Rogers <irogers@google.com>,
linux-kernel@vger.kernel.org, linux-trace-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, linux-perf-users@vger.kernel.org
Subject: [PATCH v15 03/12] x86/hw_breakpoints: Add arch_modify_local_hw_breakpoint_addr() API
Date: Mon, 7 Sep 2026 12:46:52 +0900 [thread overview]
Message-ID: <178875281237.93794.4844650709915505895.stgit@devnote2> (raw)
In-Reply-To: <178875277830.93794.14247844688761142429.stgit@devnote2>
From: Jinchao Wang <wangjinchao600@gmail.com>
Wprobe needs to move an active per-CPU watchpoint without releasing and
reserving its hardware slot.
Add arch_modify_local_hw_breakpoint_addr() as the architecture backend for
modify_local_hw_breakpoint_addr(). It validates the new address, finds the
installed local slot, and updates the hardware debug register and per-CPU
shadow register. The core layer (modify_local_hw_breakpoint_addr()) handles
updating bp->attr.bp_addr and counter_arch_bp(bp)->address.
The caller must provide an installed local event and a valid address.
Slot ownership, breakpoint type, length, mask and DR7 remain unchanged.
Link: https://lore.kernel.org/all/59637b96946653393a7ad3c7de094094796b39c2.1785067572.git.wangjinchao600@gmail.com/
Assisted-by: Antigravity:gemini-3.8-flash
Signed-off-by: Jinchao Wang <wangjinchao600@gmail.com>
Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
---
Changes in v15:
- Temporarily clear the breakpoint enable bit in DR7 before updating the
debug address register, and re-enable it afterward, to comply with the
x86 hardware specification and avoid spurious #DB exceptions.
Changes in v13:
- Add compiler barrier (barrier()) before checking cpu_dr7_seq to
prevent hoisting the sequence check before set_debugreg().
- Clarify in commit log and code comment that the core layer manages
updating bp->attr.bp_addr and counter_arch_bp(bp)->address.
Changes in v11:
- Return int error code instead of void.
- Validate the new address using hw_breakpoint_arch_parse() before
updating registers.
- Increment cpu_dr7_seq in a sequence loop for NMI protection.
- Return -ENOENT if the breakpoint slot is not found on the local CPU.
---
arch/x86/include/asm/hw_breakpoint.h | 2 +
arch/x86/kernel/hw_breakpoint.c | 56 ++++++++++++++++++++++++++++++++++
2 files changed, 58 insertions(+)
diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h
index 0bc931cd0698..f35ec491f6dd 100644
--- a/arch/x86/include/asm/hw_breakpoint.h
+++ b/arch/x86/include/asm/hw_breakpoint.h
@@ -59,6 +59,8 @@ extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
int arch_install_hw_breakpoint(struct perf_event *bp);
+int arch_modify_local_hw_breakpoint_addr(struct perf_event *bp,
+ unsigned long addr);
void arch_uninstall_hw_breakpoint(struct perf_event *bp);
void hw_breakpoint_pmu_read(struct perf_event *bp);
void hw_breakpoint_pmu_unthrottle(struct perf_event *bp);
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index 312550be3ad2..99f0926298a8 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -129,6 +129,62 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
return 0;
}
+/*
+ * Modify the address of an installed perf counter breakpoint on local CPU.
+ *
+ * This updates the debug address register and per-CPU shadow state without
+ * changing slot allocation or DR7. The core layer (modify_local_hw_breakpoint_addr())
+ * manages updating bp->attr.bp_addr and counter_arch_bp(bp)->address.
+ *
+ * Atomic: called with IRQs disabled and handles variables and registers
+ * local to this CPU.
+ */
+int arch_modify_local_hw_breakpoint_addr(struct perf_event *bp,
+ unsigned long addr)
+{
+ struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+ struct arch_hw_breakpoint hw;
+ struct perf_event_attr attr = bp->attr;
+ unsigned long dr7;
+ unsigned int seq;
+ int i, ret;
+
+ lockdep_assert_irqs_disabled();
+
+ attr.bp_addr = addr;
+ ret = hw_breakpoint_arch_parse(bp, &attr, &hw);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < HBP_NUM; i++) {
+ if (this_cpu_read(bp_per_reg[i]) == bp)
+ break;
+ }
+
+ if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
+ return -ENOENT;
+
+ do {
+ seq = this_cpu_inc_return(cpu_dr7_seq);
+
+ /* Disable breakpoint in DR7 before updating address register */
+ dr7 = this_cpu_read(cpu_dr7);
+ set_debugreg((dr7 & ~__encode_dr7(i, info->len, info->type)) | DR7_FIXED_1, 7);
+ barrier();
+
+ this_cpu_write(cpu_debugreg[i], addr);
+ barrier();
+ set_debugreg(addr, i);
+ barrier();
+
+ /* Re-enable breakpoint in DR7 */
+ set_debugreg(this_cpu_read(cpu_dr7) | DR7_FIXED_1, 7);
+ barrier();
+ } while (seq != this_cpu_read(cpu_dr7_seq));
+
+ return 0;
+}
+
/*
* Uninstall the breakpoint contained in the given counter.
*
next prev parent reply other threads:[~2026-09-07 3:46 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-07 3:46 [PATCH v15 00/12] tracing: wprobe: x86: Add wprobe for watchpoint Masami Hiramatsu (Google)
2026-09-07 3:46 ` [PATCH v15 01/12] x86/mce: Fix hardware debug register corruption on task migration Masami Hiramatsu (Google)
2026-09-07 3:57 ` sashiko-bot
2026-09-07 3:46 ` [PATCH v15 02/12] x86/hw_breakpoints: Make DR7 updates NMI safe Masami Hiramatsu (Google)
2026-09-07 4:00 ` sashiko-bot
2026-09-07 3:46 ` Masami Hiramatsu (Google) [this message]
2026-09-07 4:02 ` [PATCH v15 03/12] x86/hw_breakpoints: Add arch_modify_local_hw_breakpoint_addr() API sashiko-bot
2026-09-07 3:47 ` [PATCH v15 04/12] HWBP: Add modify_local_hw_breakpoint_addr() API Masami Hiramatsu (Google)
2026-09-07 4:04 ` sashiko-bot
2026-09-07 3:47 ` [PATCH v15 05/12] tracing/wprobe: Add wprobe (watchpoint probe) trace event support Masami Hiramatsu (Google)
2026-09-07 4:15 ` sashiko-bot
2026-09-07 3:47 ` [PATCH v15 06/12] x86: hw_breakpoint: Add a kconfig to clarify when a breakpoint fires Masami Hiramatsu (Google)
2026-09-07 3:52 ` sashiko-bot
2026-09-07 3:47 ` [PATCH v15 07/12] selftests: tracing: Add a basic testcase for wprobe Masami Hiramatsu (Google)
2026-09-07 3:53 ` sashiko-bot
2026-09-07 3:47 ` [PATCH v15 08/12] selftests: tracing: Add syntax " Masami Hiramatsu (Google)
2026-09-07 3:58 ` sashiko-bot
2026-09-07 3:47 ` [PATCH v15 09/12] tracing/wprobe: Add set_wprobe and clear_wprobe event triggers Masami Hiramatsu (Google)
2026-09-07 4:10 ` sashiko-bot
2026-09-07 3:48 ` [PATCH v15 10/12] selftests: tracing: Add wprobe trigger testcase Masami Hiramatsu (Google)
2026-09-07 3:58 ` sashiko-bot
2026-09-07 3:48 ` [PATCH v15 11/12] tracing/wprobe: Support BTF typecast in fetchargs Masami Hiramatsu (Google)
2026-09-07 4:03 ` sashiko-bot
2026-09-07 3:48 ` [PATCH v15 12/12] tracing/wprobe: Support BTF struct offset resolution in set_wprobe trigger Masami Hiramatsu (Google)
2026-09-07 4:06 ` sashiko-bot
2026-09-11 7:27 ` [PATCH v15 00/12] tracing: wprobe: x86: Add wprobe for watchpoint Jinchao Wang
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