From: Andy Chiu <andy.chiu@sifive.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alexghiti@rivosinc.com>,
Zong Li <zong.li@sifive.com>,
Steven Rostedt <rostedt@goodmis.org>,
Masami Hiramatsu <mhiramat@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Nathan Chancellor <nathan@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
Bill Wendling <morbo@google.com>,
Justin Stitt <justinstitt@google.com>,
Puranjay Mohan <puranjay@kernel.org>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-trace-kernel@vger.kernel.org, llvm@lists.linux.dev,
Evgenii Shatokhin <e.shatokhin@yadro.com>,
Andy Chiu <andy.chiu@sifive.com>
Subject: [PATCH 3/8] riscv: ftrace: support fastcc in Clang for WITH_ARGS
Date: Thu, 13 Jun 2024 15:11:08 +0800 [thread overview]
Message-ID: <20240613-dev-andyc-dyn-ftrace-v4-v1-3-1a538e12c01e@sifive.com> (raw)
In-Reply-To: <20240613-dev-andyc-dyn-ftrace-v4-v1-0-1a538e12c01e@sifive.com>
Some caller-saved registers which are not defined as function arguments
in the ABI can still be passed as arguments when the kernel is compiled
with Clang. As a result, we must save and restore those registers to
prevent ftrace from clobbering them.
- [1]: https://reviews.llvm.org/D68559
Reported-by: Evgenii Shatokhin <e.shatokhin@yadro.com>
Closes: https://lore.kernel.org/linux-riscv/7e7c7914-445d-426d-89a0-59a9199c45b1@yadro.com/
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
---
arch/riscv/include/asm/ftrace.h | 7 +++++++
arch/riscv/kernel/asm-offsets.c | 7 +++++++
arch/riscv/kernel/mcount-dyn.S | 16 ++++++++++++++--
3 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/ftrace.h b/arch/riscv/include/asm/ftrace.h
index 9eb31a7ea0aa..5f81c53dbfd9 100644
--- a/arch/riscv/include/asm/ftrace.h
+++ b/arch/riscv/include/asm/ftrace.h
@@ -144,6 +144,13 @@ struct ftrace_regs {
unsigned long a5;
unsigned long a6;
unsigned long a7;
+#ifdef CONFIG_CC_IS_CLANG
+ unsigned long t2;
+ unsigned long t3;
+ unsigned long t4;
+ unsigned long t5;
+ unsigned long t6;
+#endif
};
};
};
diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
index b09ca5f944f7..db5a26fcc9ae 100644
--- a/arch/riscv/kernel/asm-offsets.c
+++ b/arch/riscv/kernel/asm-offsets.c
@@ -497,6 +497,13 @@ void asm_offsets(void)
DEFINE(FREGS_SP, offsetof(struct ftrace_regs, sp));
DEFINE(FREGS_S0, offsetof(struct ftrace_regs, s0));
DEFINE(FREGS_T1, offsetof(struct ftrace_regs, t1));
+#ifdef CONFIG_CC_IS_CLANG
+ DEFINE(FREGS_T2, offsetof(struct ftrace_regs, t2));
+ DEFINE(FREGS_T3, offsetof(struct ftrace_regs, t3));
+ DEFINE(FREGS_T4, offsetof(struct ftrace_regs, t4));
+ DEFINE(FREGS_T5, offsetof(struct ftrace_regs, t5));
+ DEFINE(FREGS_T6, offsetof(struct ftrace_regs, t6));
+#endif
DEFINE(FREGS_A0, offsetof(struct ftrace_regs, a0));
DEFINE(FREGS_A1, offsetof(struct ftrace_regs, a1));
DEFINE(FREGS_A2, offsetof(struct ftrace_regs, a2));
diff --git a/arch/riscv/kernel/mcount-dyn.S b/arch/riscv/kernel/mcount-dyn.S
index 745dd4c4a69c..e988bd26b28b 100644
--- a/arch/riscv/kernel/mcount-dyn.S
+++ b/arch/riscv/kernel/mcount-dyn.S
@@ -96,7 +96,13 @@
REG_S x8, FREGS_S0(sp)
#endif
REG_S x6, FREGS_T1(sp)
-
+#ifdef CONFIG_CC_IS_CLANG
+ REG_S x7, FREGS_T2(sp)
+ REG_S x28, FREGS_T3(sp)
+ REG_S x29, FREGS_T4(sp)
+ REG_S x30, FREGS_T5(sp)
+ REG_S x31, FREGS_T6(sp)
+#endif
// save the arguments
REG_S x10, FREGS_A0(sp)
REG_S x11, FREGS_A1(sp)
@@ -115,7 +121,13 @@
REG_L x8, FREGS_S0(sp)
#endif
REG_L x6, FREGS_T1(sp)
-
+#ifdef CONFIG_CC_IS_CLANG
+ REG_L x7, FREGS_T2(sp)
+ REG_L x28, FREGS_T3(sp)
+ REG_L x29, FREGS_T4(sp)
+ REG_L x30, FREGS_T5(sp)
+ REG_L x31, FREGS_T6(sp)
+#endif
// restore the arguments
REG_L x10, FREGS_A0(sp)
REG_L x11, FREGS_A1(sp)
--
2.43.0
next prev parent reply other threads:[~2024-06-13 7:32 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-13 7:11 [PATCH 0/8] riscv: ftrace: atmoic patching and preempt improvements Andy Chiu
2024-06-13 7:11 ` [PATCH 1/8] riscv: stacktrace: convert arch_stack_walk() to noinstr Andy Chiu
2024-06-18 9:55 ` Alexandre Ghiti
2024-06-25 15:45 ` Palmer Dabbelt
2024-06-13 7:11 ` [PATCH 2/8] tracing: do not trace kernel_text_address() Andy Chiu
2024-06-13 13:32 ` Steven Rostedt
2024-06-17 2:10 ` Andy Chiu
2024-06-13 7:11 ` Andy Chiu [this message]
2024-06-13 22:36 ` [PATCH 3/8] riscv: ftrace: support fastcc in Clang for WITH_ARGS Nathan Chancellor
2024-06-13 7:11 ` [PATCH 4/8] riscv: ftrace: align patchable functions to 4 Byte boundary Andy Chiu
2024-06-13 19:09 ` Nathan Chancellor
2024-06-17 2:38 ` Andy Chiu
2024-06-17 3:13 ` Andy Chiu
2024-06-17 16:52 ` Nathan Chancellor
2024-06-13 7:11 ` [PATCH 5/8] riscv: ftrace: prepare ftrace for atomic code patching Andy Chiu
2024-06-13 7:11 ` [PATCH 6/8] riscv: ftrace: do not use stop_machine to update code Andy Chiu
2024-06-13 7:11 ` [PATCH 7/8] riscv: vector: Support calling schedule() for preemptible Vector Andy Chiu
2024-06-13 7:11 ` [PATCH 8/8] riscv: ftrace: support PREEMPT Andy Chiu
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