From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED3D02E0B64; Mon, 8 Sep 2025 21:50:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757368233; cv=none; b=MWZxebUlpO0/RrfNr01lKsT1aNVc7Y0nLYXIey1UeZU6ObVpsCuqkMQEspnx4dht3UORW1JyPwS/FO6/vM+t5BoJz1TQWA8eKPInGLY4pHuVLdi2HBWyLWludqSM0avM1b9rYNLdY18W7XbsZf72Y5yHTEexzfM4yhPROmNjNRo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757368233; c=relaxed/simple; bh=KefSjzm73w2HbGHRtz1VsVIvbTeN+FJ2LIqeCoIeTSc=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition:In-Reply-To; b=QloGRUIjGqkRpV/pQmu9a2um7bU16JYUcB0Umi/vTm91sc34qPLeE97Ug+ppSj95kni+/kXgq1fFyvxDZK8Ek8DVhJbRvMNYBtlhETBaP/kFxS7r/keqpCU26823hd6aEnY7q636h2d0HPi+fqpLYjE8Lb7v200K8UdgrSYpVWA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=c1U2iAqi; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="c1U2iAqi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9F129C4CEF1; Mon, 8 Sep 2025 21:50:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757368232; bh=KefSjzm73w2HbGHRtz1VsVIvbTeN+FJ2LIqeCoIeTSc=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=c1U2iAqiQ03ZBi7PkxMTtfTBrrIm9wa75r9F5SolN9ABm7e2yC6NE5h6dBxrON9i6 B1O70eYbU45+B+WhRb1m+aIG16ZZ7mRPvqrMDfn4f3gZDnUALUgUQ5Q0g51V6YACoQ YSZOijLUVgEWBRH6ZijmctH07Zz03fuK8kh8lyrtZar8wBD7Tre6Jm7phkd88VMlsH PAUbo3ahvKTlQPBi7k9VONHmMvvQCK2K4E1eMalH79ioMxkARTAUuKNkQO2ndEK4mk gUg+lgFGH4xNDy5Jx6VQM2c+UsoxFK5NycrlIix2NP7vu+OwaPtxOIH/29ffj0Bj7I eVx5lNo/LKArQ== Date: Mon, 8 Sep 2025 16:50:31 -0500 From: Bjorn Helgaas To: "Mario Limonciello (AMD)" Cc: "Rafael J . Wysocki" , Bjorn Helgaas , Pavel Machek , Len Brown , Greg Kroah-Hartman , Danilo Krummrich , Christian =?utf-8?B?S8O2bmln?= , "James E . J . Bottomley" , "Martin K . Petersen" , Steven Rostedt , "open list:HIBERNATION (aka Software Suspend, aka swsusp)" , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:DRM DRIVERS" , "open list:PCI SUBSYSTEM" , "open list:SCSI SUBSYSTEM" , "open list:USB SUBSYSTEM" , "open list:TRACING" , AceLan Kao , Kai-Heng Feng , Mark Pearson , Merthan =?utf-8?Q?Karaka=C5=9F?= , Eric Naim , Denis Benato Subject: Re: [PATCH v6 09/11] PCI: Put PCIe bridges with downstream devices into D3 at hibernate Message-ID: <20250908215031.GA1467002@bhelgaas> Precedence: bulk X-Mailing-List: linux-trace-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250818020101.3619237-10-superm1@kernel.org> On Sun, Aug 17, 2025 at 09:00:59PM -0500, Mario Limonciello (AMD) wrote: > For the suspend flow PCIe bridges that have downstream devices are put into > the appropriate low power state (D3hot or D3cold depending upon specific > devices). For the hibernate flow, PCIe bridges with downstream devices > stay in D0 however. This can lead to PCIe bridges that are remained > powered on needlessly during hibernate. s/are remained/remain/ I guess? > Adjust the pci_pm_poweroff_noirq() to follow the same flow as > pci_pm_suspend_noirq() by using pci_pm_suspend_noirq_common(). > > This introduces a functional change that the hibernate flow will now > call pci_save_state() and unless bus PM is skipped will also set > the PCIe device into an unknown state.