[PATCH v2 09/12] i2c: designware: no SMBUS_READ_BLOCK_DATA without EMPTYFIFO_HOLD_MASTER

[Dmitry Guzman <Dmitry.Guzman@mobileye.com>]

Controllers without EMPTYFIFO_HOLD_MASTER feature cannot hold bus with
empty FIFO. This makes impossible to issue SMBUS block read command:
it is not known how many bytes must be read until it reads the  first byte
indicates the data length is read. Without EMPTYFIFO_HOLD_MASTER, when
the first byte is read, TX FIFO gets empty, this causes STOP condition
and the transfer is terminated.

Reset SMBUS_READ_BLOCK_DATA bit in functionality mask on such controllers.

Signed-off-by: Dmitry Guzman <Dmitry.Guzman@mobileye.com>
---
 drivers/i2c/busses/i2c-designware-master.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index d10f46cf4aa44344fa1c53b9b8798a8b0f0c193c..76f28e1696bdc81326cf149dfe88c52dd2f0731f 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -940,6 +940,13 @@ void i2c_dw_configure_master(struct dw_i2c_dev *dev)
 	if ((dev->flags & MODEL_MASK) != MODEL_AMD_NAVI_GPU)
 		dev->functionality |= I2C_FUNC_PROTOCOL_MANGLING;
 
+	/* Controllers without EMPTYFIFO_HOLD_MASTER feature cannot issue SMBUS
+	 * block read because after reading the data length FIFO gets empty and
+	 * STOP is generated automatically
+	 */
+	if (!dev->emptyfifo_hold_master)
+		dev->functionality &= ~I2C_FUNC_SMBUS_READ_BLOCK_DATA;
+
 	dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
 			  DW_IC_CON_RESTART_EN;
 

-- 
2.43.0