From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-171.mta0.migadu.com (out-171.mta0.migadu.com [91.218.175.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0DC2933062 for ; Tue, 2 Apr 2024 07:00:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.171 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712041236; cv=none; b=FL0vYeD4vB+O1o2OvGcJR1EN4DENLrwUR4lb0vxoESHprYV1Ps8fMmU6uendc66v4nj52cFkflP+p9WvI3Ym2dchmNK6qCCjr6yFuE+HVCpnldnzUpxXSfeMXbAjBSXReb4bj0bYWkXp9RiaMxVwlxiAxNSYZ0/PQM7FlhgsVPQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712041236; c=relaxed/simple; bh=DWwpz4wCjpd3OHwoJNho95qF247VTvrYLLaNHUDRIQs=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=IgMPrhEkk7d8U//zGniJQw5g1DP2406iYI5BIAek4UaBOq4klxAA5n1V1slFSh39qw1qAh+V1c4BHkueH6X+LXwtwdZ6Rr7Dr+2Uf0UMmCH8T/ZaE38ZdbjvD1JEgYPBz14hZvQW+vnl7Rc9ICwmkWp3OszZW5OsBwtEdt9L0GY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=KgJN+PKw; arc=none smtp.client-ip=91.218.175.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="KgJN+PKw" Date: Tue, 2 Apr 2024 00:00:12 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1712041232; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jhuzyWXDmRkSGaUwWTpdDkWh7n7iwav7be8n1ReoOqg=; b=KgJN+PKwUf4lvMCNNgRHnuy8Gq613K2HNrcIC+CQUk8Sf/7s4Hx+E56N6lZRoCSA0Dlm9q gxlbMuDbSrzUHZgC90oQuyB0Kd8gPYgsVUsYB6BOdjK0DzwQ2E0WmDAtMn29DrZYMJC+lr +c9QBLLVlmBOcBZkzESUyH9WEo8wfW4= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Yu Zhao Cc: James Houghton , Andrew Morton , Paolo Bonzini , David Matlack , Marc Zyngier , Sean Christopherson , Jonathan Corbet , James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , Shaoqin Huang , Gavin Shan , Ricardo Koller , Raghavendra Rao Ananta , Ryan Roberts , David Rientjes , Axel Rasmussen , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-mm@kvack.org, linux-trace-kernel@vger.kernel.org Subject: Re: [PATCH v3 6/7] KVM: arm64: Participate in bitmap-based PTE aging Message-ID: References: <20240401232946.1837665-1-jthoughton@google.com> <20240401232946.1837665-7-jthoughton@google.com> Precedence: bulk X-Mailing-List: linux-trace-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Migadu-Flow: FLOW_OUT On Tue, Apr 02, 2024 at 12:06:56AM -0400, Yu Zhao wrote: > On Mon, Apr 1, 2024 at 7:30 PM James Houghton wrote: > > Suggested-by: Yu Zhao > > Thanks but I did not suggest this. Entirely up to you, but I would still want to credit everyone who contributed to a feature even if the underlying implementation has changed since the original attempt. > What I have in v2 is RCU based. I hope Oliver or someone else can help > make that work. Why? If there's data to show that RCU has a material benefit over taking the MMU lock for read then I'm all for it. Otherwise, the work required to support page-table walkers entirely outside of the MMU lock isn't justified. In addition to ensuring that page table teardown is always RCU-safe, we'd need to make sure all of the walkers that take the write lock are prepared to handle races. > Otherwise we can just drop this for now and revisit > later. I really wouldn't get hung up on the locking as the make-or-break for whether arm64 supports this MMU notifier. -- Thanks, Oliver