From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 056B33254BB; Thu, 16 Jul 2026 15:20:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784215235; cv=none; b=cgIqX/xr/iKWvfHNnVgIvpBVkYNYFhEuZh9UQFEeUPD0J+RtKXOG0gT8BHP+Moh7jJwpnwbCshas82fP4xrYYVzbFBDTKZYjrJggfFnv+R9tlUtpin+I0gbqoubELw+juVZsIJmtJ724x4hAEinRDY4+wM1Rlk5H+0MgCTOvO8w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784215235; c=relaxed/simple; bh=EPSxuApcE14Q4WaQWZeXV1RFVQTrSnA/vpymhi8Kvdw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=lRihOI6K5zvWVqaQnB9Tk4aU8p7ZKD6l++bnuyF9YHRbVs9JQEBDk05DcR8zu4zeYs53/Y/271XE5CQ/aejgxz/NygCx07pUdzHS7DC7JPyRmic+/s4hQ6bnBiThi3npXB3CZTHCadinrcR/FlvfsfuGZNKIrMOqVZ3yfQfmU2I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NxWAbXAf; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NxWAbXAf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 440B71F000E9; Thu, 16 Jul 2026 15:20:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784215233; bh=xqEkOfqemOuBq7MfK7NLzkx6aModADt/bX/v6BBIpLk=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=NxWAbXAfxER1bDsr9+Ry25MKcWs9G8aOuDSXUXXyyWEJhIVKOXhlhYe8L3E1790PK tlz3IoqgzPulnjUjJlJZmJEIM8+PDVMAuKWrlJ80ZsNa0hg9RD6m/UQwFUOM9vTIPD PsXIoumb7pNF+9G2N+JjYBfD5CU+OsQ+apSRBW0jvEfXcocsiXp+AVNwAfmRL/RJ6+ oASNnepTWd6neQb47wlJUENGA5sLnSs51kSAT2vPwaLw1wANe0N2e25/JK/YdsCfIl zChHic5ALc47Ql0oWQgpHO8eeSNpTx/wZ9YqIdo5qbVhXyJvGxSH2Tu4Z+NQsQIMIx c6OjcT39f6LEQ== Date: Thu, 16 Jul 2026 16:20:27 +0100 From: Will Deacon To: Pu Hu Cc: "mhiramat@kernel.org" , "ada.coupriediaz@arm.com" , "catalin.marinas@arm.com" , "davem@davemloft.net" , Hongyan Xia , Jiazi Li , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-trace-kernel@vger.kernel.org" , "naveen@kernel.org" , "yang@os.amperecomputing.com" Subject: Re: [RFC v3 2/2] arm64: kprobes: Allow reentering kprobes while single-stepping Message-ID: References: <20260710063242.228714-1-hupu@transsion.com> <20260710063242.228714-3-hupu@transsion.com> <0f049d38-b7f6-47f0-a410-95ad2aee7fd4@transsion.com> Precedence: bulk X-Mailing-List: linux-trace-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0f049d38-b7f6-47f0-a410-95ad2aee7fd4@transsion.com> On Thu, Jul 16, 2026 at 02:38:58PM +0000, Pu Hu wrote: > On 7/16/2026 9:24 PM, Will Deacon wrote: > > On Fri, Jul 10, 2026 at 06:32:55AM +0000, Pu Hu wrote: > >> From: Pu Hu > >> > >> A kprobe can be hit while another kprobe is in KPROBE_HIT_SS state. This > >> can happen when tracing or perf code runs from the debug exception path > >> while the first kprobe is preparing or executing its out-of-line > >> single-step instruction. > > > > I don't understand this part. The single-step runs with debug exceptions > > disabled (kprobes_save_local_irqflag() sets PSTATE.D) so how do we end > > up taking one? > > You are right that the single-step runs with debug exceptions disabled. > However, the case I was referring to is not a hardware breakpoint or a > software-step exception, but another Breakpoint Instruction exception > generated by executing a BRK instruction. A BRK instruction exception is > not masked by PSTATE.D, so it can still be taken while handling a kprobe. > > As far as I understand the architecture, there are two different cases here: > > - Breakpoint Instruction exceptions, generated by executing a BRK > instruction. > - Breakpoint exceptions, generated by the debug logic, for example by > programmed breakpoint registers. > > PSTATE.D masks debug exceptions such as hardware breakpoints, > watchpoints and software-step exceptions, but it does not mask > Breakpoint Instruction exceptions generated by BRK. This also seems > consistent with the pseudocode for BRK, > Arch64.SoftwareBreakpoint(imm16), which does not appear to check > PSTATE.D before taking the exception. > > Therefore, even if kprobes_save_local_irqflag() sets PSTATE.D while > handling the first kprobe, if the code executed from that path reaches > another instruction patched with BRK, it can still take a Breakpoint > Instruction exception. In other words, the nested case I mentioned is > another kprobe BRK being hit, not a hardware debug exception or a > software-step exception. Yes, that's correct, but if we're doing the out-of-line step, how do we end up executing a BRK? Or are you saying that it's the kprobes BRK64_OPCODE_KPROBES_SS instruction that we use to implement the single-step that is the problem? If so, how does taking that exception result in us executing tracing or perf code? Sorry for all the questions, I just haven't understood what's going on here from the commit message. Will