From: Eric Biggers <ebiggers@kernel.org>
To: x86@kernel.org
Cc: linux-um@lists.infradead.org, linux-raid@vger.kernel.org,
linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
Christoph Hellwig <hch@lst.de>,
Andrew Morton <akpm@linux-foundation.org>,
Eric Biggers <ebiggers@kernel.org>
Subject: [PATCH v3 0/8] x86: Remove cpu_has_xfeatures() and add AVX-512 xor_gen()
Date: Wed, 12 Aug 2026 19:14:58 -0700 [thread overview]
Message-ID: <20260813021506.55129-1-ebiggers@kernel.org> (raw)
This series consolidates and cleans up how the kernel handles CPU
feature flags for AVX and AVX-512 when the underlying OS or hypervisor
(if any) doesn't enable the required xstate features in XCR0.
Specifically, it makes the checks for xstate features be done in a
single place at boot time for both UML and native x86, instead of
everywhere kernel code wants to check for AVX or AVX-512 support.
Patch 8 then adds an AVX-512 optimized implementation of xor_gen() for
RAID, which had been blocked on confusion around cpu_has_xfeatures() and
its lack of implementation on UML.
Changed in v3:
- Updated the implementation of fpu__init_system_xstate() as suggested
by Borislav
- Added Acked-by tags
- Used "xor:" commit subject
Changed in v2:
- Made x86 clear the AVX* bits if FPU or XSAVE features are missing.
- Updated comment in x86 arch_xor_init().
- Updated commit message for the UML commit to clarify that checking
XCR0 is standard practice in userspace
Eric Biggers (8):
x86/fpu: Check for missing AVX and AVX-512 xstate bits
um: Check for missing AVX and AVX-512 xstate bits
crypto: x86 - Stop using cpu_has_xfeatures()
lib/crypto: x86: Stop using cpu_has_xfeatures()
lib/crc: x86: Stop using cpu_has_xfeatures()
x86/fpu: Remove cpu_has_xfeatures()
xor: Remove redundant X86_FEATURE_OSXSAVE check
xor: Add AVX-512 optimized xor_gen()
arch/um/kernel/um_arch.c | 78 ++++++++++++-
arch/x86/crypto/aegis128-aesni-glue.c | 3 +-
arch/x86/crypto/aesni-intel_glue.c | 7 +-
arch/x86/crypto/aria_aesni_avx2_glue.c | 11 +-
arch/x86/crypto/aria_aesni_avx_glue.c | 11 +-
arch/x86/crypto/aria_gfni_avx512_glue.c | 11 +-
arch/x86/crypto/camellia_aesni_avx2_glue.c | 11 +-
arch/x86/crypto/camellia_aesni_avx_glue.c | 11 +-
arch/x86/crypto/cast5_avx_glue.c | 7 +-
arch/x86/crypto/cast6_avx_glue.c | 7 +-
arch/x86/crypto/serpent_avx2_glue.c | 9 +-
arch/x86/crypto/serpent_avx_glue.c | 7 +-
arch/x86/crypto/sm4_aesni_avx2_glue.c | 11 +-
arch/x86/crypto/sm4_aesni_avx_glue.c | 11 +-
arch/x86/crypto/twofish_avx_glue.c | 6 +-
arch/x86/include/asm/fpu/api.h | 9 --
arch/x86/kernel/fpu/xstate.c | 69 +++++-------
lib/crc/x86/crc-pclmul-template.h | 6 +-
lib/crypto/x86/blake2s.h | 4 +-
lib/crypto/x86/chacha.h | 3 +-
lib/crypto/x86/nh.h | 4 +-
lib/crypto/x86/poly1305.h | 7 +-
lib/crypto/x86/sha1.h | 4 +-
lib/crypto/x86/sha256.h | 4 +-
lib/crypto/x86/sha512.h | 3 +-
lib/crypto/x86/sm3.h | 3 +-
lib/raid/xor/Makefile | 2 +-
lib/raid/xor/x86/xor-avx512.c | 121 +++++++++++++++++++++
lib/raid/xor/x86/xor_arch.h | 31 ++++--
29 files changed, 275 insertions(+), 196 deletions(-)
create mode 100644 lib/raid/xor/x86/xor-avx512.c
base-commit: db2ddb87143519e20a95aa36c60b36107b736a58
--
2.55.0
next reply other threads:[~2026-08-13 2:20 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-13 2:14 Eric Biggers [this message]
2026-08-13 2:14 ` [PATCH v3 1/8] x86/fpu: Check for missing AVX and AVX-512 xstate bits Eric Biggers
2026-08-13 2:15 ` [PATCH v3 2/8] um: " Eric Biggers
2026-08-13 2:15 ` [PATCH v3 3/8] crypto: x86 - Stop using cpu_has_xfeatures() Eric Biggers
2026-08-13 2:15 ` [PATCH v3 4/8] lib/crypto: x86: " Eric Biggers
2026-08-13 2:15 ` [PATCH v3 5/8] lib/crc: " Eric Biggers
2026-08-13 2:15 ` [PATCH v3 6/8] x86/fpu: Remove cpu_has_xfeatures() Eric Biggers
2026-08-13 2:15 ` [PATCH v3 7/8] xor: Remove redundant X86_FEATURE_OSXSAVE check Eric Biggers
2026-08-13 2:15 ` [PATCH v3 8/8] xor: Add AVX-512 optimized xor_gen() Eric Biggers
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