* [v5,06/17] phy: qcom-qmp: Move SERDES/PCS START after PHY reset
@ 2018-01-16 10:57 Manu Gautam
0 siblings, 0 replies; only message in thread
From: Manu Gautam @ 2018-01-16 10:57 UTC (permalink / raw)
To: Kishon Vijay Abraham I
Cc: linux-arm-msm, linux-usb, Manu Gautam, Vivek Gautam,
Varadarajan Narayanan, Jaehoon Chung, Fengguang Wu, Wei Yongjun,
open list:GENERIC PHY FRAMEWORK
Driver is currently performing PHY reset after starting
SERDES/PCS. As per hardware datasheet reset must be done
before starting PHY. Hence, update the sequence.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index ecff261..edb6bbe 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -896,12 +896,12 @@ static int qcom_qmp_phy_init(struct phy *phy)
if (cfg->has_pwrdn_delay)
usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);
- /* start SerDes and Phy-Coding-Sublayer */
- qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
-
/* Pull PHY out of reset state */
qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
+ /* start SerDes and Phy-Coding-Sublayer */
+ qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
+
status = pcs + cfg->regs[QPHY_PCS_READY_STATUS];
mask = cfg->mask_pcs_ready;
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2018-01-16 10:57 [v5,06/17] phy: qcom-qmp: Move SERDES/PCS START after PHY reset Manu Gautam
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