[PATCH 0/7] Add USB3.0 PHY and host controller support for SpacemiT K1 SoC

[PATCH 0/7] Add USB3.0 PHY and host controller support for SpacemiT K1 SoC

[Ze Huang]

This patch series introduces support for the USB on the SpacemiT K1 SoC,
including DWC3 host controller, PCIe/USB3.0 combo PHY and the USB2.0 PHY.
The implementation has been tested on the Milk-V Jupiter and BananaPi-f3.

USB3.0 PHY for usb2 is shared with PCIe port A, meaning that only one of
these interfaces (PCIe or USB3.0) can be active at a given time.

Overview of USB controllers on K1 SoC[1]:

Link: https://developer.spacemit.com/documentation?token=AjHDwrW78igAAEkiHracBI9HnTb#part5 [1]
---
Ze Huang (7):
      dt-bindings: phy: spacemit: add K1 USB2 PHY
      dt-bindings: phy: spacemit: add K1 PCIe/USB3 combo PHY
      dt-bindings: usb: add SpacemiT K1 DWC3 glue
      phy: spacemit: support K1 USB2.0 PHY controller
      phy: spacemit: add USB3 support for K1 PCIe/USB3 combo PHY
      usb: dwc3: add spacemit dwc3 glue layer driver
      riscv: dts: spacemit: add usb3.0 support for K1

 .../bindings/phy/spacemit,k1-combphy.yaml          |  53 +++++
 .../devicetree/bindings/phy/spacemit,usb2-phy.yaml |  40 ++++
 .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml  |  78 +++++++
 arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts    |  55 +++++
 arch/riscv/boot/dts/spacemit/k1.dtsi               |  52 +++++
 drivers/phy/Kconfig                                |   1 +
 drivers/phy/Makefile                               |   1 +
 drivers/phy/spacemit/Kconfig                       |  20 ++
 drivers/phy/spacemit/Makefile                      |   3 +
 drivers/phy/spacemit/phy-k1-combphy.c              | 229 +++++++++++++++++++++
 drivers/phy/spacemit/phy-k1-usb2.c                 | 132 ++++++++++++
 drivers/usb/dwc3/Kconfig                           |   7 +
 drivers/usb/dwc3/Makefile                          |   1 +
 drivers/usb/dwc3/dwc3-spacemit.c                   | 127 ++++++++++++
 14 files changed, 799 insertions(+)
---
base-commit: 64e9fdfc89a76fed38d8ddeed72d42ec71957ed9
change-id: 20250407-b4-k1-usb3-v3-2-1682aa492559
prerequisite-message-id: <20250306175750.22480-2-heylenay@4d2.org>
prerequisite-patch-id: e0f9037d659502b7f10588f15b80505724eb9e35
prerequisite-patch-id: 4414e37b16b1bc0039239f07da8c35935efb1601
prerequisite-patch-id: 1e65bc4c0c0d41baef743819c311ad53f6696094
prerequisite-patch-id: 43ef72522e30620f0244e0e22bd844884d89b0cd
prerequisite-patch-id: 73008ee7c04e90cd4e825a3f5bd2e44ec24d8ad3
prerequisite-message-id: <20250328210233.1077035-1-elder@riscstar.com>
prerequisite-patch-id: 9b026005eb6ee1430ab7ca67edfc21de85a19dd2
prerequisite-patch-id: 8ee238181e50c76d92458b149b72fa4909e0fede
prerequisite-patch-id: 66f3ee8eb1cc016112dace699bce292b617a3186
prerequisite-patch-id: c2deec49fc0308a08908fd9badadc10f921af348
prerequisite-patch-id: 99afc2efdffc0fffe47a31e7b07b72af9d1d2e18
prerequisite-patch-id: d06e8cd0fae4c405dbb56832a1fe48bfaa4e0fab
prerequisite-patch-id: 5f53f8bf16fb067628092daebc4831293261aa01
prerequisite-message-id: <20250226115957-GYA45508@gentoo>
prerequisite-patch-id: 82dd2631d36c3fafb82768d3d89022ed956020c6
prerequisite-patch-id: 5cc63738ba2d463e1840a91a94357f43199bd68f
prerequisite-patch-id: f44247679d46a51c242703eca370ce0e3db2e61f
prerequisite-patch-id: 9d4cd8be42a37798815d0aaae21d3c022f815414

Best regards,
-- 
Ze Huang <huangze@whut.edu.cn>

[PATCH 1/7] dt-bindings: phy: spacemit: add K1 USB2 PHY

[Ze Huang]

Add support for USB2 PHY found on SpacemiT K1 SoC.

Signed-off-by: Ze Huang <huangze@whut.edu.cn>
---
 .../devicetree/bindings/phy/spacemit,usb2-phy.yaml | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..ea999cff9c250b144dd049e5ac3c084b22bd56ea
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/spacemit,usb2-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT K1 SoC USB 2.0 PHY
+
+maintainers:
+  - Ze Huang <huangze@whut.edu.cn>
+
+properties:
+  compatible:
+    const: spacemit,k1-usb2-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    usb-phy@c09c0000 {
+        compatible = "spacemit,k1-usb2-phy";
+        reg = <0xc09c0000 0x200>;
+        clocks = <&syscon_apmu 15>;
+        #phy-cells = <0>;
+    };

-- 
2.49.0

Re: [PATCH 1/7] dt-bindings: phy: spacemit: add K1 USB2 PHY

[Krzysztof Kozlowski]

On 07/04/2025 14:38, Ze Huang wrote:
> +
> +properties:
> +  compatible:
> +    const: spacemit,k1-usb2-phy
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  "#phy-cells":
> +    const: 0
> +
No supplies? No resets? Are you sure hardware does not use them?

Best regards,
Krzysztof

Re: [PATCH 1/7] dt-bindings: phy: spacemit: add K1 USB2 PHY

[Ze Huang]

On 4/7/25 9:18 PM, Krzysztof Kozlowski wrote:
> On 07/04/2025 14:38, Ze Huang wrote:
>> +
>> +properties:
>> +  compatible:
>> +    const: spacemit,k1-usb2-phy
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  "#phy-cells":
>> +    const: 0
>> +
> No supplies? No resets? Are you sure hardware does not use them?

No resets are used for the USB 2.0 PHY, but there is a VBUS supply, which
I included in the DWC3 glue nodes.

>
> Best regards,
> Krzysztof
>
>

Re: [PATCH 1/7] dt-bindings: phy: spacemit: add K1 USB2 PHY

[Rob Herring (Arm)]

On Mon, 07 Apr 2025 20:38:46 +0800, Ze Huang wrote:
> Add support for USB2 PHY found on SpacemiT K1 SoC.
> 
> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
> ---
>  .../devicetree/bindings/phy/spacemit,usb2-phy.yaml | 40 ++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

[PATCH 2/7] dt-bindings: phy: spacemit: add K1 PCIe/USB3 combo PHY

[Ze Huang]

Introduce support for SpacemiT K1 PCIe/USB3 combo PHY controller.

PCIe portA and USB3 controller share this phy, only one of them can work
at any given application scenario.

Signed-off-by: Ze Huang <huangze@whut.edu.cn>
---
 .../bindings/phy/spacemit,k1-combphy.yaml          | 53 ++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..450157b65410b27129603ea1f3523776a1b0a75e
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/spacemit,k1-combphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Spacemit K1 PCIe/USB3 PHY
+
+maintainers:
+  - Ze Huang <huangze@whut.edu.cn>
+
+description:
+  Combo PHY on SpacemiT K1 SoC.PCIe port A and USB3 controller share this
+  phy, only one of PCIe port A and USB3 port can work at any given application
+  scenario.
+
+properties:
+  compatible:
+    const: spacemit,k1-combphy
+
+  reg:
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: phy_ctrl
+      - const: phy_sel
+
+  resets:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - resets
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    phy@c0b10000 {
+        compatible = "spacemit,k1-combphy";
+        reg = <0xc0b10000 0x800>,
+              <0xd4282910 0x400>;
+        reg-names = "phy_ctrl", "phy_sel";
+        resets = <&syscon_apmu 19>;
+        #phy-cells = <1>;
+    };

-- 
2.49.0

Re: [PATCH 2/7] dt-bindings: phy: spacemit: add K1 PCIe/USB3 combo PHY

[Krzysztof Kozlowski]

On 07/04/2025 14:38, Ze Huang wrote:
> Introduce support for SpacemiT K1 PCIe/USB3 combo PHY controller.
> 
> PCIe portA and USB3 controller share this phy, only one of them can work
> at any given application scenario.
> 
> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
> ---
>  .../bindings/phy/spacemit,k1-combphy.yaml          | 53 ++++++++++++++++++++++
>  1 file changed, 53 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..450157b65410b27129603ea1f3523776a1b0a75e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/spacemit,k1-combphy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Spacemit K1 PCIe/USB3 PHY
> +
> +maintainers:
> +  - Ze Huang <huangze@whut.edu.cn>
> +
> +description:
> +  Combo PHY on SpacemiT K1 SoC.PCIe port A and USB3 controller share this
> +  phy, only one of PCIe port A and USB3 port can work at any given application
> +  scenario.
> +
> +properties:
> +  compatible:
> +    const: spacemit,k1-combphy
> +
> +  reg:
> +    maxItems: 2

List and describe the items instead

> +
> +  reg-names:
> +    items:
> +      - const: phy_ctrl

drop phy_

> +      - const: phy_sel

ditto

> +
> +  resets:
> +    maxItems: 1
> +
> +  "#phy-cells":
> +    const: 1

What is the cell argument?

Also no supplies?

> 


Best regards,
Krzysztof

Re: [PATCH 2/7] dt-bindings: phy: spacemit: add K1 PCIe/USB3 combo PHY

[Ze Huang]

On 4/7/25 9:20 PM, Krzysztof Kozlowski wrote:
> On 07/04/2025 14:38, Ze Huang wrote:
>> Introduce support for SpacemiT K1 PCIe/USB3 combo PHY controller.
>>
>> PCIe portA and USB3 controller share this phy, only one of them can work
>> at any given application scenario.
>>
>> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
>> ---
>>   .../bindings/phy/spacemit,k1-combphy.yaml          | 53 ++++++++++++++++++++++
>>   1 file changed, 53 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..450157b65410b27129603ea1f3523776a1b0a75e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
>> @@ -0,0 +1,53 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/phy/spacemit,k1-combphy.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Spacemit K1 PCIe/USB3 PHY
>> +
>> +maintainers:
>> +  - Ze Huang <huangze@whut.edu.cn>
>> +
>> +description:
>> +  Combo PHY on SpacemiT K1 SoC.PCIe port A and USB3 controller share this
>> +  phy, only one of PCIe port A and USB3 port can work at any given application
>> +  scenario.
>> +
>> +properties:
>> +  compatible:
>> +    const: spacemit,k1-combphy
>> +
>> +  reg:
>> +    maxItems: 2
> List and describe the items instead

OK, they are phy control and usb/pcie selection

>
>> +
>> +  reg-names:
>> +    items:
>> +      - const: phy_ctrl
> drop phy_
>
>> +      - const: phy_sel
> ditto

Will do

>
>> +
>> +  resets:
>> +    maxItems: 1
>> +
>> +  "#phy-cells":
>> +    const: 1
> What is the cell argument?

It's usb/pcie selection, will add description

>
> Also no supplies?

vbus supply was included in dwc3 glue node

>
>
> Best regards,
> Krzysztof
>
>

[PATCH 3/7] dt-bindings: usb: add SpacemiT K1 DWC3 glue

[Ze Huang]

Add support for SpacemiT DWC3 glue driver, which manages interrupt,
reset and clock resource.

Signed-off-by: Ze Huang <huangze@whut.edu.cn>
---
 .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml  | 78 ++++++++++++++++++++++
 1 file changed, 78 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..40ce3fd1330d5f371ec69155c237e10a65a9d8f4
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT K1 SuperSpeed DWC3 USB SoC Controller Glue
+
+maintainers:
+  - Ze Huang <huangze@whut.edu.cn>
+
+properties:
+  compatible:
+    const: spacemit,k1-dwc3
+
+  ranges:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  interconnects:
+    description:
+      On SpacemiT K1, USB performs DMA through bus other than parent DT node.
+      The 'interconnects' property explicitly describes this path, ensuring
+      correct address translation.
+
+  interconnect-names:
+    const: dma-mem
+
+  # optional
+  vbus-supply:
+    description: A phandle to the regulator supplying the VBUS voltage.
+
+patternProperties:
+  '^usb@':
+    $ref: snps,dwc3.yaml#
+
+additionalProperties: false
+
+required:
+  - compatible
+  - ranges
+  - clocks
+  - resets
+  - interrupts
+  - interconnects
+  - interconnect-names
+
+examples:
+  - |
+    usb@c0a00000 {
+        compatible = "spacemit,k1-dwc3";
+        clocks = <&syscon_apmu 16>;
+        interrupts = <149>;
+        interconnects = <&dram_range0>;
+        interconnect-names = "dma-mem";
+        ranges = <0x0 0xc0a00000 0x10000>;
+        resets = <&syscon_apmu 8>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        status = "disabled";
+
+        usb@0 {
+            compatible = "snps,dwc3";
+            reg = <0x0 0x0 0x0 0x10000>;
+            interrupt-parent = <&plic>;
+            interrupts = <125>;
+            phys = <&usb_phy2>, <&usb_phy3 2>;
+            phy-names = "usb2-phy", "usb3-phy";
+        };
+    };

-- 
2.49.0

Re: [PATCH 3/7] dt-bindings: usb: add SpacemiT K1 DWC3 glue

[Krzysztof Kozlowski]

On 07/04/2025 14:38, Ze Huang wrote:
> Add support for SpacemiT DWC3 glue driver, which manages interrupt,
> reset and clock resource.
> 
> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
> ---
>  .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml  | 78 ++++++++++++++++++++++
>  1 file changed, 78 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml

Combining 3 subsystems into one patchset is a poor idea.

> new file mode 100644
> index 0000000000000000000000000000000000000000..40ce3fd1330d5f371ec69155c237e10a65a9d8f4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SpacemiT K1 SuperSpeed DWC3 USB SoC Controller Glue
> +
> +maintainers:
> +  - Ze Huang <huangze@whut.edu.cn>
> +
> +properties:
> +  compatible:
> +    const: spacemit,k1-dwc3
> +
> +  ranges:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  interconnects:

Missing maxItems

> +    description:
> +      On SpacemiT K1, USB performs DMA through bus other than parent DT node.
> +      The 'interconnects' property explicitly describes this path, ensuring
> +      correct address translation.
> +
> +  interconnect-names:
> +    const: dma-mem
> +
> +  # optional

Drop, Don't repeat constraints in free form text.

> +  vbus-supply:
> +    description: A phandle to the regulator supplying the VBUS voltage.
> +
> +patternProperties:
> +  '^usb@':
> +    $ref: snps,dwc3.yaml#

No, rather fold child into the parent.

> +
> +additionalProperties: false

This goes after required:, always.

> +
> +required:
> +  - compatible
> +  - ranges
> +  - clocks
> +  - resets
> +  - interrupts
> +  - interconnects
> +  - interconnect-names
> +
> +examples:
> +  - |
> +    usb@c0a00000 {
> +        compatible = "spacemit,k1-dwc3";
> +        clocks = <&syscon_apmu 16>;
> +        interrupts = <149>;
> +        interconnects = <&dram_range0>;
> +        interconnect-names = "dma-mem";
> +        ranges = <0x0 0xc0a00000 0x10000>;
> +        resets = <&syscon_apmu 8>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        status = "disabled";

Nope, drop.



Best regards,
Krzysztof

Re: [PATCH 3/7] dt-bindings: usb: add SpacemiT K1 DWC3 glue

[Ze Huang]

On 4/7/25 9:22 PM, Krzysztof Kozlowski wrote:
> On 07/04/2025 14:38, Ze Huang wrote:
>> Add support for SpacemiT DWC3 glue driver, which manages interrupt,
>> reset and clock resource.
>>
>> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
>> ---
>>   .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml  | 78 ++++++++++++++++++++++
>>   1 file changed, 78 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> Combining 3 subsystems into one patchset is a poor idea.

Acknowledged, will split into two sets in next version
1. usb2 phy and combo phy
2. dwc3 glue driver and dts

>
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..40ce3fd1330d5f371ec69155c237e10a65a9d8f4
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
>> @@ -0,0 +1,78 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: SpacemiT K1 SuperSpeed DWC3 USB SoC Controller Glue
>> +
>> +maintainers:
>> +  - Ze Huang <huangze@whut.edu.cn>
>> +
>> +properties:
>> +  compatible:
>> +    const: spacemit,k1-dwc3
>> +
>> +  ranges:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  resets:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    maxItems: 1
>> +
>> +  interconnects:
> Missing maxItems

Will fix

>
>> +    description:
>> +      On SpacemiT K1, USB performs DMA through bus other than parent DT node.
>> +      The 'interconnects' property explicitly describes this path, ensuring
>> +      correct address translation.
>> +
>> +  interconnect-names:
>> +    const: dma-mem
>> +
>> +  # optional
> Drop, Don't repeat constraints in free form text.

Will do

>
>> +  vbus-supply:
>> +    description: A phandle to the regulator supplying the VBUS voltage.
>> +
>> +patternProperties:
>> +  '^usb@':
>> +    $ref: snps,dwc3.yaml#
> No, rather fold child into the parent.

I’m not entirely sure I understand your suggestion. Could you please provide
an example? Thanks!

>
>> +
>> +additionalProperties: false
> This goes after required:, always.

OK

>
>> +
>> +required:
>> +  - compatible
>> +  - ranges
>> +  - clocks
>> +  - resets
>> +  - interrupts
>> +  - interconnects
>> +  - interconnect-names
>> +
>> +examples:
>> +  - |
>> +    usb@c0a00000 {
>> +        compatible = "spacemit,k1-dwc3";
>> +        clocks = <&syscon_apmu 16>;
>> +        interrupts = <149>;
>> +        interconnects = <&dram_range0>;
>> +        interconnect-names = "dma-mem";
>> +        ranges = <0x0 0xc0a00000 0x10000>;
>> +        resets = <&syscon_apmu 8>;
>> +        #address-cells = <1>;
>> +        #size-cells = <1>;
>> +        status = "disabled";
> Nope, drop.

Will drop 'status'

>
>
>
> Best regards,
> Krzysztof
>
>

Re: [PATCH 3/7] dt-bindings: usb: add SpacemiT K1 DWC3 glue

[Krzysztof Kozlowski]

On 09/04/2025 10:16, Ze Huang wrote:
>>
>>> +  vbus-supply:
>>> +    description: A phandle to the regulator supplying the VBUS voltage.
>>> +
>>> +patternProperties:
>>> +  '^usb@':
>>> +    $ref: snps,dwc3.yaml#
>> No, rather fold child into the parent.
> 
> I’m not entirely sure I understand your suggestion. Could you please provide
> an example? Thanks!
Do not create glue node, but only one node for entire DWC. All new DWC
USB bindings are supposed to follow this new approach. There are some
examples in the tree and some on the lists.

Best regards,
Krzysztof

Re: [PATCH 3/7] dt-bindings: usb: add SpacemiT K1 DWC3 glue

[Rob Herring (Arm)]

On Mon, 07 Apr 2025 20:38:48 +0800, Ze Huang wrote:
> Add support for SpacemiT DWC3 glue driver, which manages interrupt,
> reset and clock resource.
> 
> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
> ---
>  .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml  | 78 ++++++++++++++++++++++
>  1 file changed, 78 insertions(+)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.example.dtb: usb@c0a00000 (spacemit,k1-dwc3): '#address-cells', '#size-cells' do not match any of the regexes: '^usb@', 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.example.dtb: usb@c0a00000 (spacemit,k1-dwc3): usb@0:reg: [[0, 0], [0, 65536]] is too long
	from schema $id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.example.dtb: usb@0 (snps,dwc3): reg: [[0, 0], [0, 65536]] is too long
	from schema $id: http://devicetree.org/schemas/usb/snps,dwc3.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250407-b4-k1-usb3-v3-2-v1-3-bf0bcc41c9ba@whut.edu.cn

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH 3/7] dt-bindings: usb: add SpacemiT K1 DWC3 glue

[Ze Huang]

On 4/7/25 9:51 PM, Rob Herring (Arm) wrote:
> On Mon, 07 Apr 2025 20:38:48 +0800, Ze Huang wrote:
>> Add support for SpacemiT DWC3 glue driver, which manages interrupt,
>> reset and clock resource.
>>
>> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
>> ---
>>   .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml  | 78 ++++++++++++++++++++++
>>   1 file changed, 78 insertions(+)
>>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.example.dtb: usb@c0a00000 (spacemit,k1-dwc3): '#address-cells', '#size-cells' do not match any of the regexes: '^usb@', 'pinctrl-[0-9]+'
> 	from schema $id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml#
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.example.dtb: usb@c0a00000 (spacemit,k1-dwc3): usb@0:reg: [[0, 0], [0, 65536]] is too long
> 	from schema $id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml#
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.example.dtb: usb@0 (snps,dwc3): reg: [[0, 0], [0, 65536]] is too long
> 	from schema $id: http://devicetree.org/schemas/usb/snps,dwc3.yaml#

Thanks for the report!
I’ll add '#address-cells' and '#size-cells' under properties to resolve 
the error.
because if I drop them from the example, I get warnings like:

Warning (avoid_default_addr_size): /example-0/usb@c0a00000/usb@0: 
Relying on default #address-cells value

>
> doc reference errors (make refcheckdocs):
>
> See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250407-b4-k1-usb3-v3-2-v1-3-bf0bcc41c9ba@whut.edu.cn
>
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your schema.
>
>
>

[PATCH 4/7] phy: spacemit: support K1 USB2.0 PHY controller

[Ze Huang]

Add support for SpacemiT K1 USB2.0 PHY.

Signed-off-by: Ze Huang <huangze@whut.edu.cn>
---
 drivers/phy/Kconfig                |   1 +
 drivers/phy/Makefile               |   1 +
 drivers/phy/spacemit/Kconfig       |  12 ++++
 drivers/phy/spacemit/Makefile      |   2 +
 drivers/phy/spacemit/phy-k1-usb2.c | 132 +++++++++++++++++++++++++++++++++++++
 5 files changed, 148 insertions(+)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 8d58efe998ec5fd50054eed2c90d6ecce6bd5dd8..fca589aa7926eb5bce14e99785cf32cf0395202e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -114,6 +114,7 @@ source "drivers/phy/renesas/Kconfig"
 source "drivers/phy/rockchip/Kconfig"
 source "drivers/phy/samsung/Kconfig"
 source "drivers/phy/socionext/Kconfig"
+source "drivers/phy/spacemit/Kconfig"
 source "drivers/phy/st/Kconfig"
 source "drivers/phy/starfive/Kconfig"
 source "drivers/phy/sunplus/Kconfig"
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index e281442acc752820fe0bd638dfe38986a37c2a78..05993ff8a15daf7e2583b5f9b9b37ac584a30609 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -34,6 +34,7 @@ obj-y					+= allwinner/	\
 					   rockchip/	\
 					   samsung/	\
 					   socionext/	\
+					   spacemit/	\
 					   st/		\
 					   starfive/	\
 					   sunplus/	\
diff --git a/drivers/phy/spacemit/Kconfig b/drivers/phy/spacemit/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..f0c2a33f53cc810e71c6140ae957aa68a2b6ff0c
--- /dev/null
+++ b/drivers/phy/spacemit/Kconfig
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Phy drivers for SpacemiT platforms
+#
+config PHY_SPACEMIT_K1_USB2
+	tristate "SpacemiT K1 USB 2.0 PHY support"
+	depends on USB || USB_GADGET
+	depends on ARCH_SPACEMIT || COMPILE_TEST
+	select USB_PHY
+	help
+	  Enable this to support K1 USB 2.0 PHY driver. This driver takes care of
+	  enabling and clock setup and will be used by K1 udc/ehci/otg driver.
diff --git a/drivers/phy/spacemit/Makefile b/drivers/phy/spacemit/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..fec0b425a948541b39b814caef0b05e1e002d92f
--- /dev/null
+++ b/drivers/phy/spacemit/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_PHY_SPACEMIT_K1_USB2)		+= phy-k1-usb2.o
diff --git a/drivers/phy/spacemit/phy-k1-usb2.c b/drivers/phy/spacemit/phy-k1-usb2.c
new file mode 100644
index 0000000000000000000000000000000000000000..acbf6a0ebad0ee6b53cc7fd89bad4780c7b7cab5
--- /dev/null
+++ b/drivers/phy/spacemit/phy-k1-usb2.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * SpacemiT K1 USB 2.0 PHY driver
+ *
+ * Copyright (C) 2025 SpacemiT (Hangzhou) Technology Co. Ltd
+ * Copyright (C) 2025 Ze Huang <huangze@whut.edu.cn>
+ */
+
+#include <linux/clk.h>
+#include <linux/iopoll.h>
+#include <linux/platform_device.h>
+#include <linux/usb/of.h>
+
+#define USB2_PHY_REG01			0x04
+#define  USB2_PHY_REG01_VAL		0x60ef
+#define  USB2_PHY_REG01_PLL_IS_READY	BIT(0)
+#define USB2_PHY_REG04			0x10
+#define  USB2_PHY_REG04_AUTO_CLEAR_DIS	BIT(2)
+#define USB2_PHY_REG0D			0x34
+#define  USB2_PHY_REG0D_VAL		0x1c
+#define USB2_PHY_REG26			0x98
+#define  USB2_PHY_REG26_VAL		0xbec4
+
+#define USB2D_CTRL_RESET_TIME_MS	50
+
+struct spacemit_usb2phy {
+	struct phy	*phy;
+	struct clk	*clk;
+	void __iomem	*base;
+};
+
+static int spacemit_usb2phy_init(struct phy *phy)
+{
+	struct spacemit_usb2phy *sphy = phy_get_drvdata(phy);
+	void __iomem *base = sphy->base;
+	u32 val;
+	int ret;
+
+	ret = clk_prepare_enable(sphy->clk);
+	if (ret) {
+		dev_err(&phy->dev, "failed to enable clock\n");
+		return ret;
+	}
+
+	/*
+	 * make sure the usb controller is not under reset process before
+	 * any configuration
+	 */
+	usleep_range(150, 200);
+	writel(USB2_PHY_REG26_VAL, base + USB2_PHY_REG26); /* 24M ref clk */
+
+	ret = read_poll_timeout(readl, val, (val & USB2_PHY_REG01_PLL_IS_READY),
+				500, USB2D_CTRL_RESET_TIME_MS * 1000, true,
+				base + USB2_PHY_REG01);
+	if (ret) {
+		dev_err(&phy->dev, "wait PHY_REG01[PLLREADY] timeout\n");
+		return ret;
+	}
+
+	/* release usb2 phy internal reset and enable clock gating */
+	writel(USB2_PHY_REG01_VAL, base + USB2_PHY_REG01);
+	writel(USB2_PHY_REG0D_VAL, base + USB2_PHY_REG0D);
+
+	/* auto clear host disc */
+	val = readl(base + USB2_PHY_REG04);
+	val |= USB2_PHY_REG04_AUTO_CLEAR_DIS;
+	writel(val, base + USB2_PHY_REG04);
+
+	return 0;
+}
+
+static int spacemit_usb2phy_exit(struct phy *phy)
+{
+	struct spacemit_usb2phy *sphy = phy_get_drvdata(phy);
+
+	clk_disable_unprepare(sphy->clk);
+
+	return 0;
+}
+
+static const struct phy_ops spacemit_usb_phy_ops = {
+	.init = spacemit_usb2phy_init,
+	.exit = spacemit_usb2phy_exit,
+	.owner = THIS_MODULE,
+};
+
+static int spacemit_usb2phy_probe(struct platform_device *pdev)
+{
+	struct phy_provider *phy_provider;
+	struct device *dev = &pdev->dev;
+	struct spacemit_usb2phy *sphy;
+
+	sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
+	if (!sphy)
+		return -ENOMEM;
+
+	sphy->clk = devm_clk_get_prepared(&pdev->dev, NULL);
+	if (IS_ERR(sphy->clk))
+		return dev_err_probe(dev, PTR_ERR(sphy->clk), "Failed to get clock\n");
+
+	sphy->base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(sphy->base))
+		return PTR_ERR(sphy->base);
+
+	sphy->phy = devm_phy_create(dev, NULL, &spacemit_usb_phy_ops);
+	if (IS_ERR(sphy->phy))
+		return dev_err_probe(dev, PTR_ERR(sphy->phy), "Failed to create phy\n");
+
+	phy_set_drvdata(sphy->phy, sphy);
+	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+	return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id spacemit_usb2phy_dt_match[] = {
+	{ .compatible = "spacemit,k1-usb2-phy", },
+	{ /* sentinal */ }
+};
+MODULE_DEVICE_TABLE(of, spacemit_usb2phy_dt_match);
+
+static struct platform_driver spacemit_usb2_phy_driver = {
+	.probe	= spacemit_usb2phy_probe,
+	.driver = {
+		.name   = "spacemit-usb2-phy",
+		.owner  = THIS_MODULE,
+		.of_match_table = spacemit_usb2phy_dt_match,
+	},
+};
+module_platform_driver(spacemit_usb2_phy_driver);
+
+MODULE_DESCRIPTION("Spacemit USB 2.0 PHY driver");
+MODULE_LICENSE("GPL");

-- 
2.49.0

Re: [PATCH 4/7] phy: spacemit: support K1 USB2.0 PHY controller

[Krzysztof Kozlowski]

On 07/04/2025 14:38, Ze Huang wrote:
> +static const struct of_device_id spacemit_usb2phy_dt_match[] = {
> +	{ .compatible = "spacemit,k1-usb2-phy", },
> +	{ /* sentinal */ }
> +};
> +MODULE_DEVICE_TABLE(of, spacemit_usb2phy_dt_match);
> +
> +static struct platform_driver spacemit_usb2_phy_driver = {
> +	.probe	= spacemit_usb2phy_probe,
> +	.driver = {
> +		.name   = "spacemit-usb2-phy",
> +		.owner  = THIS_MODULE,


Take recent drivers and use them as base. There is no such 'owner' since
10 years.


Best regards,
Krzysztof

Re: [PATCH 4/7] phy: spacemit: support K1 USB2.0 PHY controller

[Ze Huang]

On 4/7/25 9:25 PM, Krzysztof Kozlowski wrote:
> On 07/04/2025 14:38, Ze Huang wrote:
>> +static const struct of_device_id spacemit_usb2phy_dt_match[] = {
>> +	{ .compatible = "spacemit,k1-usb2-phy", },
>> +	{ /* sentinal */ }
>> +};
>> +MODULE_DEVICE_TABLE(of, spacemit_usb2phy_dt_match);
>> +
>> +static struct platform_driver spacemit_usb2_phy_driver = {
>> +	.probe	= spacemit_usb2phy_probe,
>> +	.driver = {
>> +		.name   = "spacemit-usb2-phy",
>> +		.owner  = THIS_MODULE,
>
> Take recent drivers and use them as base. There is no such 'owner' since
> 10 years.

Will follow. Thank you for pointing that out.

>
>
> Best regards,
> Krzysztof
>
>

[PATCH 5/7] phy: spacemit: add USB3 support for K1 PCIe/USB3 combo PHY

[Ze Huang]

Add support for USB 3.0 mode on the K1 PCIe/USB3 combo PHY. Currently,
only USB mode is supported; PCIe support is not included in this change.

Signed-off-by: Ze Huang <huangze@whut.edu.cn>
---
 drivers/phy/spacemit/Kconfig          |   8 ++
 drivers/phy/spacemit/Makefile         |   1 +
 drivers/phy/spacemit/phy-k1-combphy.c | 229 ++++++++++++++++++++++++++++++++++
 3 files changed, 238 insertions(+)

diff --git a/drivers/phy/spacemit/Kconfig b/drivers/phy/spacemit/Kconfig
index f0c2a33f53cc810e71c6140ae957aa68a2b6ff0c..12749aba756329cf64fb9199055ba484fe05f3ab 100644
--- a/drivers/phy/spacemit/Kconfig
+++ b/drivers/phy/spacemit/Kconfig
@@ -10,3 +10,11 @@ config PHY_SPACEMIT_K1_USB2
 	help
 	  Enable this to support K1 USB 2.0 PHY driver. This driver takes care of
 	  enabling and clock setup and will be used by K1 udc/ehci/otg driver.
+
+config PHY_SPACEMIT_K1_COMBPHY
+	tristate "SpacemiT K1 PCIe/USB3 combo PHY support"
+	depends on OF
+	select GENERIC_PHY
+	default ARCH_SPACEMIT && USB_DWC3_SPACEMIT
+	help
+	  USB3/PCIe Combo PHY Support for SpacemiT K1 SoC
diff --git a/drivers/phy/spacemit/Makefile b/drivers/phy/spacemit/Makefile
index fec0b425a948541b39b814caef0b05e1e002d92f..1fd0c65f2c5cd10ea2f70e43e62c70588d1ffae9 100644
--- a/drivers/phy/spacemit/Makefile
+++ b/drivers/phy/spacemit/Makefile
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_PHY_SPACEMIT_K1_COMBPHY)	+= phy-k1-combphy.o
 obj-$(CONFIG_PHY_SPACEMIT_K1_USB2)		+= phy-k1-usb2.o
diff --git a/drivers/phy/spacemit/phy-k1-combphy.c b/drivers/phy/spacemit/phy-k1-combphy.c
new file mode 100644
index 0000000000000000000000000000000000000000..a4b6e77fc2b4eb5d2c45d4e76294083509a3fc9d
--- /dev/null
+++ b/drivers/phy/spacemit/phy-k1-combphy.c
@@ -0,0 +1,229 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Spacemit K1 PCIE/USB3 PHY driver
+ *
+ * Copyright (C) 2025 SpacemiT (Hangzhou) Technology Co. Ltd
+ * Copyright (C) 2025 Ze Huang <huangze@whut.edu.cn>
+ */
+
+#include <dt-bindings/phy/phy.h>
+#include <linux/clk.h>
+#include <linux/iopoll.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+#include <linux/usb/of.h>
+
+#define COMBPHY_USB_REG1	0x68
+#define  COMBPHY_USB_REG1_VAL	0x00
+#define COMBPHY_USB_REG2	0x48
+#define  COMBPHY_USB_REG2_VAL	0x603a2276
+#define COMBPHY_USB_REG3	0x08
+#define  COMBPHY_USB_REG3_VAL	0x97c
+#define COMBPHY_USB_REG4	0x18
+#define  COMBPHY_USB_REG4_VAL	0x00
+#define COMBPHY_USB_PLL_REG	0x08
+#define  COMBPHY_USB_PLL_MASK	0x01
+#define  COMBPHY_USB_PLL_VAL	0x01
+
+#define COMBPHY_MODE_SEL	BIT(3)
+#define COMBPHY_WAIT_TIMEOUT	1000
+
+struct spacemit_combphy_priv {
+	struct device *dev;
+	struct phy *phy;
+	struct reset_control *phy_rst;
+	void __iomem *phy_ctrl;
+	void __iomem *phy_sel;
+	u8 type;
+};
+
+static void spacemit_reg_update(void __iomem *reg, u32 offset, u32 mask, u32 val)
+{
+	u32 tmp;
+
+	tmp = readl(reg + offset);
+	tmp = (tmp & ~(mask)) | val;
+	writel(tmp, reg + offset);
+}
+
+static int spacemit_combphy_wait_ready(struct spacemit_combphy_priv *priv,
+				       u32 offset, u32 mask, u32 val)
+{
+	u32 reg_val;
+	int ret = 0;
+
+	ret = read_poll_timeout(readl, reg_val, (reg_val & mask) == val,
+				1000, COMBPHY_WAIT_TIMEOUT * 1000, false,
+				priv->phy_ctrl + offset);
+
+	return ret;
+}
+
+static int spacemit_combphy_set_mode(struct spacemit_combphy_priv *priv)
+{
+	int ret = 0;
+
+	switch (priv->type) {
+	case PHY_TYPE_USB3:
+		spacemit_reg_update(priv->phy_sel, 0, 0, COMBPHY_MODE_SEL);
+		break;
+	default:
+		dev_err(priv->dev, "PHY type %x not supported\n", priv->type);
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+
+static int spacemit_combphy_init_usb(struct spacemit_combphy_priv *priv)
+{
+	void __iomem *base = priv->phy_ctrl;
+	int ret;
+
+	writel(COMBPHY_USB_REG1_VAL, base + COMBPHY_USB_REG1);
+	writel(COMBPHY_USB_REG2_VAL, base + COMBPHY_USB_REG2);
+	writel(COMBPHY_USB_REG3_VAL, base + COMBPHY_USB_REG3);
+	writel(COMBPHY_USB_REG4_VAL, base + COMBPHY_USB_REG4);
+
+	ret = spacemit_combphy_wait_ready(priv, COMBPHY_USB_PLL_REG,
+					  COMBPHY_USB_PLL_MASK,
+					  COMBPHY_USB_PLL_VAL);
+	if (ret)
+		dev_err(priv->dev, "USB3 PHY init timeout!\n");
+
+	return ret;
+}
+
+static int spacemit_combphy_init(struct phy *phy)
+{
+	struct spacemit_combphy_priv *priv = phy_get_drvdata(phy);
+	int ret;
+
+	ret = spacemit_combphy_set_mode(priv);
+	if (ret) {
+		dev_err(priv->dev, "failed to set mode for PHY type %x\n",
+			priv->type);
+		goto out;
+	}
+
+	ret = reset_control_deassert(priv->phy_rst);
+	if (ret) {
+		dev_err(priv->dev, "failed to deassert rst\n");
+		goto err_rst;
+	}
+
+	switch (priv->type) {
+	case PHY_TYPE_USB3:
+		ret = spacemit_combphy_init_usb(priv);
+		break;
+	default:
+		dev_err(priv->dev, "PHY type %x not supported\n", priv->type);
+		ret = -EINVAL;
+		break;
+	}
+
+	if (ret)
+		goto err_rst;
+
+	return 0;
+
+err_rst:
+	reset_control_assert(priv->phy_rst);
+out:
+	return ret;
+}
+
+static int spacemit_combphy_exit(struct phy *phy)
+{
+	struct spacemit_combphy_priv *priv = phy_get_drvdata(phy);
+
+	reset_control_assert(priv->phy_rst);
+
+	return 0;
+}
+
+static struct phy *spacemit_combphy_xlate(struct device *dev,
+					  const struct of_phandle_args *args)
+{
+	struct spacemit_combphy_priv *priv = dev_get_drvdata(dev);
+
+	if (args->args_count != 1) {
+		dev_err(dev, "invalid number of arguments\n");
+		return ERR_PTR(-EINVAL);
+	}
+
+	if (priv->type != PHY_NONE && priv->type != args->args[0])
+		dev_warn(dev, "PHY type %d is selected to override %d\n",
+			 args->args[0], priv->type);
+
+	priv->type = args->args[0];
+
+	if (args->args_count > 1)
+		dev_dbg(dev, "combo phy idx: %d selected",  args->args[1]);
+
+	return priv->phy;
+}
+
+static const struct phy_ops spacemit_combphy_ops = {
+	.init = spacemit_combphy_init,
+	.exit = spacemit_combphy_exit,
+	.owner = THIS_MODULE,
+};
+
+static int spacemit_combphy_probe(struct platform_device *pdev)
+{
+	struct spacemit_combphy_priv *priv;
+	struct phy_provider *phy_provider;
+	struct device *dev = &pdev->dev;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->phy_ctrl = devm_platform_ioremap_resource_byname(pdev, "phy_ctrl");
+	if (IS_ERR(priv->phy_ctrl))
+		return PTR_ERR(priv->phy_ctrl);
+
+	priv->phy_sel = devm_platform_ioremap_resource_byname(pdev, "phy_sel");
+	if (IS_ERR(priv->phy_sel))
+		return PTR_ERR(priv->phy_sel);
+
+	priv->type = PHY_NONE;
+	priv->dev = dev;
+
+	priv->phy_rst = devm_reset_control_get(dev, NULL);
+	if (IS_ERR(priv->phy_rst))
+		return dev_err_probe(dev, PTR_ERR(priv->phy_rst),
+				     "failed to get phy reset\n");
+
+	priv->phy = devm_phy_create(dev, NULL, &spacemit_combphy_ops);
+	if (IS_ERR(priv->phy))
+		return dev_err_probe(dev, PTR_ERR(priv->phy),
+				     "failed to create combphy\n");
+
+	dev_set_drvdata(dev, priv);
+	phy_set_drvdata(priv->phy, priv);
+	phy_provider = devm_of_phy_provider_register(dev, spacemit_combphy_xlate);
+
+	return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id spacemit_combphy_of_match[] = {
+	{ .compatible = "spacemit,k1-combphy", },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, spacemit_combphy_of_match);
+
+static struct platform_driver spacemit_combphy_driver = {
+	.probe	= spacemit_combphy_probe,
+	.driver = {
+		.name = "spacemit-k1-combphy",
+		.of_match_table = spacemit_combphy_of_match,
+	},
+};
+module_platform_driver(spacemit_combphy_driver);
+
+MODULE_DESCRIPTION("Spacemit PCIE/USB3.0 COMBO PHY driver");
+MODULE_LICENSE("GPL");

-- 
2.49.0

Re: [PATCH 5/7] phy: spacemit: add USB3 support for K1 PCIe/USB3 combo PHY

[Krzysztof Kozlowski]

On 07/04/2025 14:38, Ze Huang wrote:
> Add support for USB 3.0 mode on the K1 PCIe/USB3 combo PHY. Currently,
> only USB mode is supported; PCIe support is not included in this change.
> 
> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
> ---
>  drivers/phy/spacemit/Kconfig          |   8 ++
>  drivers/phy/spacemit/Makefile         |   1 +
>  drivers/phy/spacemit/phy-k1-combphy.c | 229 ++++++++++++++++++++++++++++++++++
>  3 files changed, 238 insertions(+)
> 
> diff --git a/drivers/phy/spacemit/Kconfig b/drivers/phy/spacemit/Kconfig
> index f0c2a33f53cc810e71c6140ae957aa68a2b6ff0c..12749aba756329cf64fb9199055ba484fe05f3ab 100644
> --- a/drivers/phy/spacemit/Kconfig
> +++ b/drivers/phy/spacemit/Kconfig
> @@ -10,3 +10,11 @@ config PHY_SPACEMIT_K1_USB2
>  	help
>  	  Enable this to support K1 USB 2.0 PHY driver. This driver takes care of
>  	  enabling and clock setup and will be used by K1 udc/ehci/otg driver.
> +
> +config PHY_SPACEMIT_K1_COMBPHY
> +	tristate "SpacemiT K1 PCIe/USB3 combo PHY support"
> +	depends on OF
> +	select GENERIC_PHY
> +	default ARCH_SPACEMIT && USB_DWC3_SPACEMIT
> +	help
> +	  USB3/PCIe Combo PHY Support for SpacemiT K1 SoC

Missing depends on ARCH_SPACEMIT || COMPILE_TEST

...


> +	priv->phy = devm_phy_create(dev, NULL, &spacemit_combphy_ops);
> +	if (IS_ERR(priv->phy))
> +		return dev_err_probe(dev, PTR_ERR(priv->phy),
> +				     "failed to create combphy\n");
> +
> +	dev_set_drvdata(dev, priv);
> +	phy_set_drvdata(priv->phy, priv);
Both make no sense. Look what this function does.

Best regards,
Krzysztof

Re: [PATCH 5/7] phy: spacemit: add USB3 support for K1 PCIe/USB3 combo PHY

[Ze Huang]

On 4/7/25 9:28 PM, Krzysztof Kozlowski wrote:
> On 07/04/2025 14:38, Ze Huang wrote:
>> Add support for USB 3.0 mode on the K1 PCIe/USB3 combo PHY. Currently,
>> only USB mode is supported; PCIe support is not included in this change.
>>
>> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
>> ---
>>   drivers/phy/spacemit/Kconfig          |   8 ++
>>   drivers/phy/spacemit/Makefile         |   1 +
>>   drivers/phy/spacemit/phy-k1-combphy.c | 229 ++++++++++++++++++++++++++++++++++
>>   3 files changed, 238 insertions(+)
>>
>> diff --git a/drivers/phy/spacemit/Kconfig b/drivers/phy/spacemit/Kconfig
>> index f0c2a33f53cc810e71c6140ae957aa68a2b6ff0c..12749aba756329cf64fb9199055ba484fe05f3ab 100644
>> --- a/drivers/phy/spacemit/Kconfig
>> +++ b/drivers/phy/spacemit/Kconfig
>> @@ -10,3 +10,11 @@ config PHY_SPACEMIT_K1_USB2
>>   	help
>>   	  Enable this to support K1 USB 2.0 PHY driver. This driver takes care of
>>   	  enabling and clock setup and will be used by K1 udc/ehci/otg driver.
>> +
>> +config PHY_SPACEMIT_K1_COMBPHY
>> +	tristate "SpacemiT K1 PCIe/USB3 combo PHY support"
>> +	depends on OF
>> +	select GENERIC_PHY
>> +	default ARCH_SPACEMIT && USB_DWC3_SPACEMIT
>> +	help
>> +	  USB3/PCIe Combo PHY Support for SpacemiT K1 SoC
> Missing depends on ARCH_SPACEMIT || COMPILE_TEST

Will fix, thanks!

>
> ...
>
>
>> +	priv->phy = devm_phy_create(dev, NULL, &spacemit_combphy_ops);
>> +	if (IS_ERR(priv->phy))
>> +		return dev_err_probe(dev, PTR_ERR(priv->phy),
>> +				     "failed to create combphy\n");
>> +
>> +	dev_set_drvdata(dev, priv);
>> +	phy_set_drvdata(priv->phy, priv);
> Both make no sense. Look what this function does.

It does seem redundant at first glance, but pdev->dev is the parent of 
phy->dev.
pdev->dev->driver_data will be used in spacemit_combphy_xlate()
phy->dev->driver_data  will be used in phy_ops functions

I've checked some other drivers that did the same:
     - phy-zynqmp.c at lines 990 and 1026
     - phy-rockchip-samsung-hdptx.c at lines 1989 and 2000

>
> Best regards,
> Krzysztof
>
>

Re: [PATCH 5/7] phy: spacemit: add USB3 support for K1 PCIe/USB3 combo PHY

[Krzysztof Kozlowski]

On 09/04/2025 11:43, Ze Huang wrote:
>>> +	priv->phy = devm_phy_create(dev, NULL, &spacemit_combphy_ops);
>>> +	if (IS_ERR(priv->phy))
>>> +		return dev_err_probe(dev, PTR_ERR(priv->phy),
>>> +				     "failed to create combphy\n");
>>> +
>>> +	dev_set_drvdata(dev, priv);
>>> +	phy_set_drvdata(priv->phy, priv);
>> Both make no sense. Look what this function does.
> 
> It does seem redundant at first glance, but pdev->dev is the parent of 
> phy->dev.
> pdev->dev->driver_data will be used in spacemit_combphy_xlate()
> phy->dev->driver_data  will be used in phy_ops functions
> 
> I've checked some other drivers that did the same:
>      - phy-zynqmp.c at lines 990 and 1026
>      - phy-rockchip-samsung-hdptx.c at lines 1989 and 2000

Indeed, right. It's fine.

Best regards,
Krzysztof

Re: [PATCH 5/7] phy: spacemit: add USB3 support for K1 PCIe/USB3 combo PHY

[Pan Junzhong]

Hi Ze,

> +static int spacemit_combphy_init_usb(struct spacemit_combphy_priv *priv)

The USB3 phy driver is updated in the vendor's tree. 
https://gitee.com/bianbu-linux/linux-6.6/commit/1c0b3b4b9c77d22ca886c8a4c44e62b5891f8abc

You can submit v2 together with the change of lfps_thres (writes 0x58 register)
without adding new properties for dt node.

B.R.


This message and any attachment are confidential and may be privileged or otherwise protected from disclosure. If you are not an intended recipient of this message, please delete it and any attachment from your system and notify the sender immediately by reply e-mail. Unintended recipients should not use, copy, disclose or take any action based on this message or any information contained in this message. Emails cannot be guaranteed to be secure or error free as they can be intercepted, amended, lost or destroyed, and you should take full responsibility for security checking. 
 
本邮件及其任何附件具有保密性质，并可能受其他保护或不允许被披露给第三方。如阁下误收到本邮件，敬请立即以回复电子邮件的方式通知发件人，并将本邮件及其任何附件从阁下系统中予以删除。如阁下并非本邮件写明之收件人，敬请切勿使用、复制、披露本邮件或其任何内容，亦请切勿依本邮件或其任何内容而采取任何行动。电子邮件无法保证是一种安全和不会出现任何差错的通信方式，可能会被拦截、修改、丢失或损坏，收件人需自行负责做好安全检查。

Re: [PATCH 5/7] phy: spacemit: add USB3 support for K1 PCIe/USB3 combo PHY

[Ze Huang]

On 4/9/25 7:38 PM, Pan Junzhong wrote:
> Hi Ze,
>
>> +static int spacemit_combphy_init_usb(struct spacemit_combphy_priv *priv)
> The USB3 phy driver is updated in the vendor's tree.
> https://gitee.com/bianbu-linux/linux-6.6/commit/1c0b3b4b9c77d22ca886c8a4c44e62b5891f8abc
>
> You can submit v2 together with the change of lfps_thres (writes 0x58 register)
> without adding new properties for dt node.

OK, thanks!

> B.R.
>
>
> This message and any attachment are confidential and may be privileged or otherwise protected from disclosure. If you are not an intended recipient of this message, please delete it and any attachment from your system and notify the sender immediately by reply e-mail. Unintended recipients should not use, copy, disclose or take any action based on this message or any information contained in this message. Emails cannot be guaranteed to be secure or error free as they can be intercepted, amended, lost or destroyed, and you should take full responsibility for security checking.
>   
> 本邮件及其任何附件具有保密性质，并可能受其他保护或不允许被披露给第三方。如阁下误收到本邮件，敬请立即以回复电子邮件的方式通知发件人，并将本邮件及其任何附件从阁下系统中予以删除。如阁下并非本邮件写明之收件人，敬请切勿使用、复制、披露本邮件或其任何内容，亦请切勿依本邮件或其任何内容而采取任何行动。电子邮件无法保证是一种安全和不会出现任何差错的通信方式，可能会被拦截、修改、丢失或损坏，收件人需自行负责做好安全检查。

[PATCH 6/7] usb: dwc3: add spacemit dwc3 glue layer driver

[Ze Huang]

Add SpacemiT glue logic to support dwc3 HC on K1 SoC. The driver manages
clock, reset and interrupt resource.

Signed-off-by: Ze Huang <huangze@whut.edu.cn>
---
 drivers/usb/dwc3/Kconfig         |   7 +++
 drivers/usb/dwc3/Makefile        |   1 +
 drivers/usb/dwc3/dwc3-spacemit.c | 127 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 135 insertions(+)

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 310d182e10b50b253d7e5a51674806e6ec442a2a..3c30680fa4f83565fc03c6800e867c6ced0fe101 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -189,4 +189,11 @@ config USB_DWC3_RTK
 	  or dual-role mode.
 	  Say 'Y' or 'M' if you have such device.
 
+config USB_DWC3_SPACEMIT
+	tristate "Spacemit Platforms"
+	default USB_DWC3
+	help
+	  Support SPACEMIT platforms with DesignWare Core USB3 IP.
+	  Say 'Y' or 'M' here if you have one such device
+
 endif
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 124eda2522d9c1f4caab222ec9770d0deaf655fc..61a87765c0c591e0a53c33b5a6544db056166f96 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -56,3 +56,4 @@ obj-$(CONFIG_USB_DWC3_IMX8MP)		+= dwc3-imx8mp.o
 obj-$(CONFIG_USB_DWC3_XILINX)		+= dwc3-xilinx.o
 obj-$(CONFIG_USB_DWC3_OCTEON)		+= dwc3-octeon.o
 obj-$(CONFIG_USB_DWC3_RTK)		+= dwc3-rtk.o
+obj-$(CONFIG_USB_DWC3_SPACEMIT)		+= dwc3-spacemit.o
diff --git a/drivers/usb/dwc3/dwc3-spacemit.c b/drivers/usb/dwc3/dwc3-spacemit.c
new file mode 100644
index 0000000000000000000000000000000000000000..4574ad3b34a200ffe999c7da61b74c2ef33c0483
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-spacemit.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * dwc3-spacemit.c - Spacemit DWC3 Specific Glue layer
+ *
+ * Copyright (C) 2025 SpacemiT (Hangzhou) Technology Co. Ltd
+ *
+ * Author: Wilson <long.wan@spacemit.com>
+ * Contributor: Ze Huang <huangze@whut.edu.cn>
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+struct dwc3_spacemit {
+	struct device		*dev;
+	struct clk		*clk;
+	struct reset_control	*reset;
+};
+
+static int dwc3_spacemit_init(struct dwc3_spacemit *data)
+{
+	struct device *dev = data->dev;
+	int ret = 0;
+
+	data->reset = devm_reset_control_get(dev, NULL);
+	if (IS_ERR(data->reset))
+		return dev_err_probe(dev, PTR_ERR(data->reset), "failed to get reset\n");
+
+	ret = reset_control_assert(data->reset);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to assert reset\n");
+
+	usleep_range(10, 20);
+
+	ret = reset_control_deassert(data->reset);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to deassert reset\n");
+
+	return 0;
+}
+
+static int dwc3_spacemit_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *node = dev->of_node;
+	struct dwc3_spacemit *spacemit;
+	int ret;
+
+	spacemit = devm_kzalloc(dev, sizeof(*spacemit), GFP_KERNEL);
+	if (!spacemit)
+		return -ENOMEM;
+
+	spacemit->dev = dev;
+
+	platform_set_drvdata(pdev, spacemit);
+
+	spacemit->clk = devm_clk_get_enabled(dev, NULL);
+	if (IS_ERR(spacemit->clk))
+		return dev_err_probe(dev, PTR_ERR(spacemit->clk), "Failed to get clock\n");
+
+	ret = dwc3_spacemit_init(spacemit);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to init SpacemiT USB3 glue\n");
+
+	ret = of_platform_populate(node, NULL, NULL, dev);
+	if (ret)
+		dev_err_probe(dev, ret, "failed to add dwc3 core\n");
+
+	return 0;
+}
+
+static void dwc3_spacemit_remove(struct platform_device *pdev)
+{
+	of_platform_depopulate(&pdev->dev);
+}
+
+static const struct of_device_id spacemit_dwc3_match[] = {
+	{ .compatible = "spacemit,k1-dwc3", },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, spacemit_dwc3_match);
+
+#ifdef CONFIG_PM_SLEEP
+static int dwc3_spacemit_suspend(struct device *dev)
+{
+	struct dwc3_spacemit *spacemit = dev_get_drvdata(dev);
+
+	clk_disable_unprepare(spacemit->clk);
+
+	return 0;
+}
+
+static int dwc3_spacemit_resume(struct device *dev)
+{
+	struct dwc3_spacemit *spacemit = dev_get_drvdata(dev);
+	int ret;
+
+	ret = clk_prepare_enable(spacemit->clk);
+
+	return ret;
+}
+
+static const struct dev_pm_ops dwc3_spacemit_dev_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(dwc3_spacemit_suspend, dwc3_spacemit_resume)
+};
+#endif /* CONFIG_PM_SLEEP */
+
+static struct platform_driver dwc3_spacemit_driver = {
+	.probe		= dwc3_spacemit_probe,
+	.remove		= dwc3_spacemit_remove,
+	.driver		= {
+		.name	= "spacemit-dwc3",
+		.of_match_table = spacemit_dwc3_match,
+#ifdef CONFIG_PM_SLEEP
+		.pm	= &dwc3_spacemit_dev_pm_ops,
+#endif /* CONFIG_PM_SLEEP */
+	},
+};
+module_platform_driver(dwc3_spacemit_driver);
+
+MODULE_AUTHOR("Wilson <long.wan@spacemit.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("DesignWare USB3 Spacemit Glue Layer");

-- 
2.49.0

Re: [PATCH 6/7] usb: dwc3: add spacemit dwc3 glue layer driver

[Thinh Nguyen]

On Mon, Apr 07, 2025, Ze Huang wrote:
> Add SpacemiT glue logic to support dwc3 HC on K1 SoC. The driver manages
> clock, reset and interrupt resource.
> 
> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
> ---
>  drivers/usb/dwc3/Kconfig         |   7 +++
>  drivers/usb/dwc3/Makefile        |   1 +
>  drivers/usb/dwc3/dwc3-spacemit.c | 127 +++++++++++++++++++++++++++++++++++++++
>  3 files changed, 135 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
> index 310d182e10b50b253d7e5a51674806e6ec442a2a..3c30680fa4f83565fc03c6800e867c6ced0fe101 100644
> --- a/drivers/usb/dwc3/Kconfig
> +++ b/drivers/usb/dwc3/Kconfig
> @@ -189,4 +189,11 @@ config USB_DWC3_RTK
>  	  or dual-role mode.
>  	  Say 'Y' or 'M' if you have such device.
>  
> +config USB_DWC3_SPACEMIT
> +	tristate "Spacemit Platforms"

Does this depend on other configs like OF and COMMON_CLK?

> +	default USB_DWC3
> +	help
> +	  Support SPACEMIT platforms with DesignWare Core USB3 IP.
> +	  Say 'Y' or 'M' here if you have one such device
> +
>  endif
> diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
> index 124eda2522d9c1f4caab222ec9770d0deaf655fc..61a87765c0c591e0a53c33b5a6544db056166f96 100644
> --- a/drivers/usb/dwc3/Makefile
> +++ b/drivers/usb/dwc3/Makefile
> @@ -56,3 +56,4 @@ obj-$(CONFIG_USB_DWC3_IMX8MP)		+= dwc3-imx8mp.o
>  obj-$(CONFIG_USB_DWC3_XILINX)		+= dwc3-xilinx.o
>  obj-$(CONFIG_USB_DWC3_OCTEON)		+= dwc3-octeon.o
>  obj-$(CONFIG_USB_DWC3_RTK)		+= dwc3-rtk.o
> +obj-$(CONFIG_USB_DWC3_SPACEMIT)		+= dwc3-spacemit.o
> diff --git a/drivers/usb/dwc3/dwc3-spacemit.c b/drivers/usb/dwc3/dwc3-spacemit.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..4574ad3b34a200ffe999c7da61b74c2ef33c0483
> --- /dev/null
> +++ b/drivers/usb/dwc3/dwc3-spacemit.c
> @@ -0,0 +1,127 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * dwc3-spacemit.c - Spacemit DWC3 Specific Glue layer
> + *
> + * Copyright (C) 2025 SpacemiT (Hangzhou) Technology Co. Ltd
> + *
> + * Author: Wilson <long.wan@spacemit.com>
> + * Contributor: Ze Huang <huangze@whut.edu.cn>
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/of_platform.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset.h>
> +
> +struct dwc3_spacemit {
> +	struct device		*dev;
> +	struct clk		*clk;
> +	struct reset_control	*reset;
> +};
> +
> +static int dwc3_spacemit_init(struct dwc3_spacemit *data)
> +{
> +	struct device *dev = data->dev;
> +	int ret = 0;
> +
> +	data->reset = devm_reset_control_get(dev, NULL);
> +	if (IS_ERR(data->reset))
> +		return dev_err_probe(dev, PTR_ERR(data->reset), "failed to get reset\n");
> +
> +	ret = reset_control_assert(data->reset);
> +	if (ret)
> +		return dev_err_probe(dev, ret, "failed to assert reset\n");
> +
> +	usleep_range(10, 20);
> +
> +	ret = reset_control_deassert(data->reset);
> +	if (ret)
> +		return dev_err_probe(dev, ret, "failed to deassert reset\n");
> +
> +	return 0;
> +}
> +
> +static int dwc3_spacemit_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *node = dev->of_node;
> +	struct dwc3_spacemit *spacemit;
> +	int ret;
> +
> +	spacemit = devm_kzalloc(dev, sizeof(*spacemit), GFP_KERNEL);
> +	if (!spacemit)
> +		return -ENOMEM;
> +
> +	spacemit->dev = dev;
> +
> +	platform_set_drvdata(pdev, spacemit);
> +
> +	spacemit->clk = devm_clk_get_enabled(dev, NULL);
> +	if (IS_ERR(spacemit->clk))
> +		return dev_err_probe(dev, PTR_ERR(spacemit->clk), "Failed to get clock\n");
> +
> +	ret = dwc3_spacemit_init(spacemit);
> +	if (ret)
> +		return dev_err_probe(dev, ret, "failed to init SpacemiT USB3 glue\n");
> +
> +	ret = of_platform_populate(node, NULL, NULL, dev);
> +	if (ret)
> +		dev_err_probe(dev, ret, "failed to add dwc3 core\n");
> +
> +	return 0;
> +}
> +
> +static void dwc3_spacemit_remove(struct platform_device *pdev)
> +{
> +	of_platform_depopulate(&pdev->dev);
> +}
> +
> +static const struct of_device_id spacemit_dwc3_match[] = {
> +	{ .compatible = "spacemit,k1-dwc3", },
> +	{ /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, spacemit_dwc3_match);
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int dwc3_spacemit_suspend(struct device *dev)
> +{
> +	struct dwc3_spacemit *spacemit = dev_get_drvdata(dev);
> +
> +	clk_disable_unprepare(spacemit->clk);
> +
> +	return 0;
> +}
> +
> +static int dwc3_spacemit_resume(struct device *dev)
> +{
> +	struct dwc3_spacemit *spacemit = dev_get_drvdata(dev);
> +	int ret;
> +
> +	ret = clk_prepare_enable(spacemit->clk);
> +
> +	return ret;
> +}
> +
> +static const struct dev_pm_ops dwc3_spacemit_dev_pm_ops = {
> +	SET_SYSTEM_SLEEP_PM_OPS(dwc3_spacemit_suspend, dwc3_spacemit_resume)
> +};
> +#endif /* CONFIG_PM_SLEEP */
> +

Use DEFINE_SIMPLE_DEV_PM_OPS to remove the CONFIG_PM_SLEEP guards. 

> +static struct platform_driver dwc3_spacemit_driver = {
> +	.probe		= dwc3_spacemit_probe,
> +	.remove		= dwc3_spacemit_remove,
> +	.driver		= {
> +		.name	= "spacemit-dwc3",
> +		.of_match_table = spacemit_dwc3_match,
> +#ifdef CONFIG_PM_SLEEP
> +		.pm	= &dwc3_spacemit_dev_pm_ops,
> +#endif /* CONFIG_PM_SLEEP */
> +	},
> +};
> +module_platform_driver(dwc3_spacemit_driver);
> +
> +MODULE_AUTHOR("Wilson <long.wan@spacemit.com>");

The author is different than the commiter? Also, is there a last name?

> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("DesignWare USB3 Spacemit Glue Layer");
> 
> -- 
> 2.49.0
> 

The logic in this glue driver looks quite simple. Can this platform work
as dwc3-of-simple?

Thanks,
Thinh

Re: [PATCH 6/7] usb: dwc3: add spacemit dwc3 glue layer driver

[Ze Huang]

On 4/10/25 6:34 AM, Thinh Nguyen wrote:
> On Mon, Apr 07, 2025, Ze Huang wrote:
>> Add SpacemiT glue logic to support dwc3 HC on K1 SoC. The driver manages
>> clock, reset and interrupt resource.
>>
>> Signed-off-by: Ze Huang <huangze@whut.edu.cn>
>> ---
>>   drivers/usb/dwc3/Kconfig         |   7 +++
>>   drivers/usb/dwc3/Makefile        |   1 +
>>   drivers/usb/dwc3/dwc3-spacemit.c | 127 +++++++++++++++++++++++++++++++++++++++
>>   3 files changed, 135 insertions(+)
>>
>> diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
>> index 310d182e10b50b253d7e5a51674806e6ec442a2a..3c30680fa4f83565fc03c6800e867c6ced0fe101 100644
>> --- a/drivers/usb/dwc3/Kconfig
>> +++ b/drivers/usb/dwc3/Kconfig
>> @@ -189,4 +189,11 @@ config USB_DWC3_RTK
>>   	  or dual-role mode.
>>   	  Say 'Y' or 'M' if you have such device.
>>   
>> +config USB_DWC3_SPACEMIT
>> +	tristate "Spacemit Platforms"
> Does this depend on other configs like OF and COMMON_CLK?

Yes, depends on them, will fix Kconfig entries in next version

>
>> +	default USB_DWC3
>> +	help
>> +	  Support SPACEMIT platforms with DesignWare Core USB3 IP.
>> +	  Say 'Y' or 'M' here if you have one such device
>> +
>>   endif
>> diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
>> index 124eda2522d9c1f4caab222ec9770d0deaf655fc..61a87765c0c591e0a53c33b5a6544db056166f96 100644
>> --- a/drivers/usb/dwc3/Makefile
>> +++ b/drivers/usb/dwc3/Makefile
>> @@ -56,3 +56,4 @@ obj-$(CONFIG_USB_DWC3_IMX8MP)		+= dwc3-imx8mp.o
>>   obj-$(CONFIG_USB_DWC3_XILINX)		+= dwc3-xilinx.o
>>   obj-$(CONFIG_USB_DWC3_OCTEON)		+= dwc3-octeon.o
>>   obj-$(CONFIG_USB_DWC3_RTK)		+= dwc3-rtk.o
>> +obj-$(CONFIG_USB_DWC3_SPACEMIT)		+= dwc3-spacemit.o
...
>> +
>> +#ifdef CONFIG_PM_SLEEP
>> +static int dwc3_spacemit_suspend(struct device *dev)
>> +{
>> +	struct dwc3_spacemit *spacemit = dev_get_drvdata(dev);
>> +
>> +	clk_disable_unprepare(spacemit->clk);
>> +
>> +	return 0;
>> +}
>> +
>> +static int dwc3_spacemit_resume(struct device *dev)
>> +{
>> +	struct dwc3_spacemit *spacemit = dev_get_drvdata(dev);
>> +	int ret;
>> +
>> +	ret = clk_prepare_enable(spacemit->clk);
>> +
>> +	return ret;
>> +}
>> +
>> +static const struct dev_pm_ops dwc3_spacemit_dev_pm_ops = {
>> +	SET_SYSTEM_SLEEP_PM_OPS(dwc3_spacemit_suspend, dwc3_spacemit_resume)
>> +};
>> +#endif /* CONFIG_PM_SLEEP */
>> +
> Use DEFINE_SIMPLE_DEV_PM_OPS to remove the CONFIG_PM_SLEEP guards.

thanks

>
>> +static struct platform_driver dwc3_spacemit_driver = {
>> +	.probe		= dwc3_spacemit_probe,
>> +	.remove		= dwc3_spacemit_remove,
>> +	.driver		= {
>> +		.name	= "spacemit-dwc3",
>> +		.of_match_table = spacemit_dwc3_match,
>> +#ifdef CONFIG_PM_SLEEP
>> +		.pm	= &dwc3_spacemit_dev_pm_ops,
>> +#endif /* CONFIG_PM_SLEEP */
>> +	},
>> +};
>> +module_platform_driver(dwc3_spacemit_driver);
>> +
>> +MODULE_AUTHOR("Wilson <long.wan@spacemit.com>");
> The author is different than the commiter? Also, is there a last name?

You're right, I missed Signed-off-by tag for Wilson in commit message

>
>> +MODULE_LICENSE("GPL");
>> +MODULE_DESCRIPTION("DesignWare USB3 Spacemit Glue Layer");
>>
>> -- 
>> 2.49.0
>>
> The logic in this glue driver looks quite simple. Can this platform work
> as dwc3-of-simple?

Yes, indeed simple.
As Krzysztof mentioned, creating glue nodes is not ideal for DWC USB. I
would drop the glue driver and use dwc3/core.c as fallback, similar to
what Rockchip did[1].

[1] 
https://www.kernel.org/doc/Documentation/devicetree/bindings/usb/rockchip%2Cdwc3.yaml

>
> Thanks,
> Thinh

[PATCH 7/7] riscv: dts: spacemit: add usb3.0 support for K1

[Ze Huang]

Add USB 3.0 support for the SpacemiT K1 SoC, including the
following components:

- USB 2.0 PHY node (usb_phy2)
- USB 3.0 combo PHY node (usb_phy3)
- USB 3.0 host controller (dwc3 glue + core)
- USB 3.0 hub and vbus regulator (usb3_vhub, usb3_vbus)
- DRAM interconnect node for USB DMA ("dma-mem")

The `usb3_vbus` and `usb3_vhub` regulator node provides a fixed 5V
supply to power the onboard USB 3.0 hub and usb vbus.

On K1, some DMA transfers from devices to memory use separate buses with
different DMA address translation rules from the parent node. We express
this relationship through the interconnects node("dma-mem").

Signed-off-by: Ze Huang <huangze@whut.edu.cn>
---
 arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 55 +++++++++++++++++++++++++
 arch/riscv/boot/dts/spacemit/k1.dtsi            | 52 +++++++++++++++++++++++
 2 files changed, 107 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 816ef1bc358ec490aff184d5915d680dbd9f00cb..9353432f171fc895fdd465654bc8166a1bc65e0b 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -28,6 +28,25 @@ led1 {
 			default-state = "on";
 		};
 	};
+
+	usb3_vhub: regulator-vhub-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "USB30_VHUB";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	usb3_vbus: regulator-vbus-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "USB30_VBUS";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		gpio = <&gpio K1_GPIO(97) GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
 };
 
 &uart0 {
@@ -35,3 +54,39 @@ &uart0 {
 	pinctrl-0 = <&uart0_2_cfg>;
 	status = "okay";
 };
+
+&usb3_phy0 {
+	status = "okay";
+};
+
+&usb3_phy1 {
+	status = "okay";
+};
+
+&usb3 {
+	status = "okay";
+	vbus-supply = <&usb3_vbus>;
+
+	usb@0 {
+		dr_mode = "host";
+		phy_type = "utmi";
+		snps,hsphy_interface = "utmi";
+		snps,dis_enblslpm_quirk;
+		snps,dis-u1u2-quirk;
+		snps,dis-u2-freeclk-exists-quirk;
+		snps,dis-del-phy-power-chg-quirk;
+		snps,dis_u2_susphy_quirk;
+		snps,dis_u3_susphy_quirk;
+		snps,dis_rxdet_inp3_quirk;
+		snps,xhci-trb-ent-quirk;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		hub@1 {
+			compatible = "usb2109,817";
+			reg = <0x1>;
+			vdd-supply = <&usb3_vhub>;
+			reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
+		};
+	};
+};
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index dc675f7e9b131256c50e2ca4ff347ae54e4b62ae..be3648cdcecd715e656fb8bde8a434ace752c012 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -4,6 +4,8 @@
  */
 
 #include <dt-bindings/clock/spacemit,k1-ccu.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/phy/phy.h>
 
 /dts-v1/;
 / {
@@ -350,6 +352,14 @@ soc {
 		dma-noncoherent;
 		ranges;
 
+		dram_range0: dram_range@0 {
+			#address-cells = <2>;
+			#size-cells = <2>;
+			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
+			#interconnect-cells = <0>;
+			status = "okay";
+		};
+
 		syscon_rcpu: system-controller@c0880000 {
 			compatible = "spacemit,k1-syscon-rcpu";
 			reg = <0x0 0xc0880000 0x0 0x2048>;
@@ -362,6 +372,48 @@ syscon_rcpu2: system-controller@c0888000 {
 			#reset-cells = <1>;
 		};
 
+		usb3: usb@c0a00000 {
+			compatible = "spacemit,k1-dwc3";
+			clocks = <&syscon_apmu CLK_USB30>;
+			clock-names = "usbdrd30";
+			interrupt-parent = <&plic>;
+			interrupts = <149>;
+			interconnects = <&dram_range0>;
+			interconnect-names = "dma-mem";
+			ranges = <0x0 0x0 0x0 0xc0a00000 0x0 0x10000>;
+			resets = <&syscon_apmu RESET_USB3_0>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			status = "disabled";
+
+			usb@0 {
+				compatible = "snps,dwc3";
+				reg = <0x0 0x0 0x0 0x10000>;
+				interrupt-parent = <&plic>;
+				interrupts = <125>;
+				phys = <&usb3_phy0>, <&usb3_phy1 PHY_TYPE_USB3>;
+				phy-names = "usb2-phy", "usb3-phy";
+			};
+		};
+
+		usb3_phy0: usb-phy@0xc0a30000 {
+			compatible = "spacemit,k1-usb2-phy";
+			reg = <0x0 0xc0a30000 0x0 0x200>;
+			clocks = <&syscon_apmu CLK_USB30>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usb3_phy1: combphy@c0b10000 {
+			compatible = "spacemit,k1-combphy";
+			reg = <0x0 0xc0b10000 0x0 0x800>,
+			      <0x0 0xd4282910 0x0 0x400>;
+			reg-names = "phy_ctrl", "phy_sel";
+			resets = <&syscon_apmu RESET_PCIE0>;
+			#phy-cells = <1>;
+			status = "disabled";
+		};
+
 		syscon_apbc: system-control@d4015000 {
 			compatible = "spacemit,k1-syscon-apbc";
 			reg = <0x0 0xd4015000 0x0 0x1000>;

-- 
2.49.0