[PATCH v1 0/4] usb: phy: tegra: HSIC adjustments

[PATCH v1 0/4] usb: phy: tegra: HSIC adjustments

[Svyatoslav Ryhel]

Followup to a recent HSIC bringup with a few small improvements.

Svyatoslav Ryhel (4):
  usb: phy: tegra: cosmetic fixes
  usb: phy: tegra: return error value from utmi_wait_register
  usb: phy: tegra: parametrize HSIC PTS value
  usb: phy: tegra: parametrize PORTSC1 register offset

 drivers/usb/phy/phy-tegra-usb.c   | 45 +++++++++++++++----------------
 include/linux/usb/tegra_usb_phy.h |  8 ++++--
 2 files changed, 27 insertions(+), 26 deletions(-)

-- 
2.51.0

[PATCH v1 1/4] usb: phy: tegra: cosmetic fixes

[Svyatoslav Ryhel]

Change TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC to its literal value instead of
using the BIT macro, as it is an enumeration. Correct the spelling in the
comment and rename uhsic_registers_shift to uhsic_registers_offset.
These changes are cosmetic and do not affect code behavior.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/usb/phy/phy-tegra-usb.c   | 12 ++++++------
 include/linux/usb/tegra_usb_phy.h |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index effa767ec019..3a7a74f01d1c 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -48,7 +48,7 @@
 #define TEGRA_USB_HOSTPC1_DEVLC			0x1b4
 #define   TEGRA_USB_HOSTPC1_DEVLC_PTS(x)	(((x) & 0x7) << 29)
 #define   TEGRA_USB_HOSTPC1_DEVLC_PHCD		BIT(22)
-#define   TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC	BIT(2)
+#define   TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC	4
 
 /* Bits of PORTSC1, which will get cleared by writing 1 into them */
 #define TEGRA_PORTSC1_RWC_BITS	(PORT_CSC | PORT_PEC | PORT_OCC)
@@ -169,7 +169,7 @@
 /*
  * Tegra20 has no UTMIP registers on PHY2 and UHSIC registers start from 0x800
  * just where UTMIP registers should have been. This is the case only with Tegra20
- * Tegra30+ have UTMIP registers at 0x800 and UHSIC registers shifter by 0x400
+ * Tegra30+ have UTMIP registers at 0x800 and UHSIC registers are shifted by 0x400
  * to 0xc00, but register layout is preserved.
  */
 #define UHSIC_PLL_CFG1				0x804
@@ -873,7 +873,7 @@ static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
 static u32 tegra_hsic_readl(struct tegra_usb_phy *phy, u32 reg)
 {
 	void __iomem *base = phy->regs;
-	u32 shift = phy->soc_config->uhsic_registers_shift;
+	u32 shift = phy->soc_config->uhsic_registers_offset;
 
 	return readl_relaxed(base + shift + reg);
 }
@@ -881,7 +881,7 @@ static u32 tegra_hsic_readl(struct tegra_usb_phy *phy, u32 reg)
 static void tegra_hsic_writel(struct tegra_usb_phy *phy, u32 reg, u32 value)
 {
 	void __iomem *base = phy->regs;
-	u32 shift = phy->soc_config->uhsic_registers_shift;
+	u32 shift = phy->soc_config->uhsic_registers_offset;
 
 	writel_relaxed(value, base + shift + reg);
 }
@@ -1469,7 +1469,7 @@ static const struct tegra_phy_soc_config tegra20_soc_config = {
 	.requires_usbmode_setup = false,
 	.requires_extra_tuning_parameters = false,
 	.requires_pmc_ao_power_up = false,
-	.uhsic_registers_shift = 0,
+	.uhsic_registers_offset = 0,
 	.uhsic_tx_rtune = 0, /* 40 ohm */
 };
 
@@ -1479,7 +1479,7 @@ static const struct tegra_phy_soc_config tegra30_soc_config = {
 	.requires_usbmode_setup = true,
 	.requires_extra_tuning_parameters = true,
 	.requires_pmc_ao_power_up = true,
-	.uhsic_registers_shift = 0x400,
+	.uhsic_registers_offset = 0x400,
 	.uhsic_tx_rtune = 8,  /* 50 ohm */
 };
 
diff --git a/include/linux/usb/tegra_usb_phy.h b/include/linux/usb/tegra_usb_phy.h
index 1a8843bd1e95..fbdd2dcb3a2b 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -24,7 +24,7 @@ struct gpio_desc;
  * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
  *      and hsdiscon_level should be set for adequate signal quality
  * requires_pmc_ao_power_up: true if USB AO is powered down by default
- * uhsic_registers_shift: for Tegra30+ where HSIC registers were shifted
+ * uhsic_registers_offset: for Tegra30+ where HSIC registers were offset
  *      comparing to Tegra20 by 0x400, since Tegra20 has no UTMIP on PHY2
  * uhsic_tx_rtune: fine tuned 50 Ohm termination resistor for NMOS/PMOS driver
  */
@@ -35,7 +35,7 @@ struct tegra_phy_soc_config {
 	bool requires_usbmode_setup;
 	bool requires_extra_tuning_parameters;
 	bool requires_pmc_ao_power_up;
-	u32 uhsic_registers_shift;
+	u32 uhsic_registers_offset;
 	u32 uhsic_tx_rtune;
 };
 
-- 
2.51.0

[PATCH v1 2/4] usb: phy: tegra: return error value from utmi_wait_register

[Svyatoslav Ryhel]

Return exact error value from utmi_wait_register during HSIC power on.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/usb/phy/phy-tegra-usb.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 3a7a74f01d1c..6173b240c3ea 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -891,6 +891,7 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
 	struct tegra_utmip_config *config = phy->config;
 	void __iomem *base = phy->regs;
 	u32 val;
+	int err = 0;
 
 	val = tegra_hsic_readl(phy, UHSIC_PADS_CFG1);
 	val &= ~(UHSIC_PD_BG | UHSIC_PD_TX | UHSIC_PD_TRK | UHSIC_PD_RX |
@@ -984,12 +985,14 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
 	val |= UHSIC_TX_RTUNE(phy->soc_config->uhsic_tx_rtune);
 	tegra_hsic_writel(phy, UHSIC_PADS_CFG0, val);
 
-	if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
-			       USB_PHY_CLK_VALID))
+	err = utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
+				 USB_PHY_CLK_VALID);
+
+	if (err)
 		dev_err(phy->u_phy.dev,
 			"Timeout waiting for PHY to stabilize on enable (HSIC)\n");
 
-	return 0;
+	return err;
 }
 
 static int uhsic_phy_power_off(struct tegra_usb_phy *phy)
-- 
2.51.0

[PATCH v1 3/4] usb: phy: tegra: parametrize HSIC PTS value

[Svyatoslav Ryhel]

The parallel transceiver select used in HSIC mode differs on Tegra20,
where it uses the UTMI value (0), whereas Tegra30+ uses a dedicated HSIC
value. Reflect this in the SoC config.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/usb/phy/phy-tegra-usb.c   | 7 +++----
 include/linux/usb/tegra_usb_phy.h | 2 ++
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 6173b240c3ea..812d99443180 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -957,10 +957,7 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
 		writel_relaxed(val, base + USB_USBMODE);
 	}
 
-	if (phy->soc_config->has_hostpc)
-		set_pts(phy, TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC);
-	else
-		set_pts(phy, 0);
+	set_pts(phy, phy->soc_config->uhsic_pts_value);
 
 	val = readl_relaxed(base + USB_TXFILLTUNING);
 	if ((val & USB_FIFO_TXFILL_MASK) != USB_FIFO_TXFILL_THRES(0x10)) {
@@ -1474,6 +1471,7 @@ static const struct tegra_phy_soc_config tegra20_soc_config = {
 	.requires_pmc_ao_power_up = false,
 	.uhsic_registers_offset = 0,
 	.uhsic_tx_rtune = 0, /* 40 ohm */
+	.uhsic_pts_value = 0, /* UTMI */
 };
 
 static const struct tegra_phy_soc_config tegra30_soc_config = {
@@ -1484,6 +1482,7 @@ static const struct tegra_phy_soc_config tegra30_soc_config = {
 	.requires_pmc_ao_power_up = true,
 	.uhsic_registers_offset = 0x400,
 	.uhsic_tx_rtune = 8,  /* 50 ohm */
+	.uhsic_pts_value = TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC,
 };
 
 static const struct of_device_id tegra_usb_phy_id_table[] = {
diff --git a/include/linux/usb/tegra_usb_phy.h b/include/linux/usb/tegra_usb_phy.h
index fbdd2dcb3a2b..81d9f22e58b5 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -27,6 +27,7 @@ struct gpio_desc;
  * uhsic_registers_offset: for Tegra30+ where HSIC registers were offset
  *      comparing to Tegra20 by 0x400, since Tegra20 has no UTMIP on PHY2
  * uhsic_tx_rtune: fine tuned 50 Ohm termination resistor for NMOS/PMOS driver
+ * uhsic_pts_value: parallel transceiver select enumeration value
  */
 
 struct tegra_phy_soc_config {
@@ -37,6 +38,7 @@ struct tegra_phy_soc_config {
 	bool requires_pmc_ao_power_up;
 	u32 uhsic_registers_offset;
 	u32 uhsic_tx_rtune;
+	u32 uhsic_pts_value;
 };
 
 struct tegra_utmip_config {
-- 
2.51.0

[PATCH v1 4/4] usb: phy: tegra: parametrize PORTSC1 register offset

[Svyatoslav Ryhel]

The PORTSC1 register has a different offset in Tegra20 compared to
Tegra30+, yet they share a crucial set of registers required for HSIC
functionality. Reflect this register offset change in the SoC config.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/usb/phy/phy-tegra-usb.c   | 17 ++++++-----------
 include/linux/usb/tegra_usb_phy.h |  2 ++
 2 files changed, 8 insertions(+), 11 deletions(-)

diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 812d99443180..00443a7beaeb 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -965,17 +965,10 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
 		writel_relaxed(val, base + USB_TXFILLTUNING);
 	}
 
-	if (phy->soc_config->has_hostpc) {
-		val = readl_relaxed(base + TEGRA30_USB_PORTSC1);
-		val &= ~(TEGRA_USB_PORTSC1_WKOC | TEGRA_USB_PORTSC1_WKDS |
-			 TEGRA_USB_PORTSC1_WKCN);
-		writel_relaxed(val, base + TEGRA30_USB_PORTSC1);
-	} else {
-		val = readl_relaxed(base + TEGRA_USB_PORTSC1);
-		val &= ~(TEGRA_USB_PORTSC1_WKOC | TEGRA_USB_PORTSC1_WKDS |
-			 TEGRA_USB_PORTSC1_WKCN);
-		writel_relaxed(val, base + TEGRA_USB_PORTSC1);
-	}
+	val = readl_relaxed(base + phy->soc_config->portsc1_offset);
+	val &= ~(TEGRA_USB_PORTSC1_WKOC | TEGRA_USB_PORTSC1_WKDS |
+		 TEGRA_USB_PORTSC1_WKCN);
+	writel_relaxed(val, base + phy->soc_config->portsc1_offset);
 
 	val = tegra_hsic_readl(phy, UHSIC_PADS_CFG0);
 	val &= ~UHSIC_TX_RTUNEN;
@@ -1472,6 +1465,7 @@ static const struct tegra_phy_soc_config tegra20_soc_config = {
 	.uhsic_registers_offset = 0,
 	.uhsic_tx_rtune = 0, /* 40 ohm */
 	.uhsic_pts_value = 0, /* UTMI */
+	.portsc1_offset = TEGRA_USB_PORTSC1,
 };
 
 static const struct tegra_phy_soc_config tegra30_soc_config = {
@@ -1483,6 +1477,7 @@ static const struct tegra_phy_soc_config tegra30_soc_config = {
 	.uhsic_registers_offset = 0x400,
 	.uhsic_tx_rtune = 8,  /* 50 ohm */
 	.uhsic_pts_value = TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC,
+	.portsc1_offset = TEGRA30_USB_PORTSC1,
 };
 
 static const struct of_device_id tegra_usb_phy_id_table[] = {
diff --git a/include/linux/usb/tegra_usb_phy.h b/include/linux/usb/tegra_usb_phy.h
index 81d9f22e58b5..57e22aae6247 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -28,6 +28,7 @@ struct gpio_desc;
  *      comparing to Tegra20 by 0x400, since Tegra20 has no UTMIP on PHY2
  * uhsic_tx_rtune: fine tuned 50 Ohm termination resistor for NMOS/PMOS driver
  * uhsic_pts_value: parallel transceiver select enumeration value
+ * portsc1_offset: register offset of PORTSC1
  */
 
 struct tegra_phy_soc_config {
@@ -39,6 +40,7 @@ struct tegra_phy_soc_config {
 	u32 uhsic_registers_offset;
 	u32 uhsic_tx_rtune;
 	u32 uhsic_pts_value;
+	u32 portsc1_offset;
 };
 
 struct tegra_utmip_config {
-- 
2.51.0

Re: [PATCH v1 0/4] usb: phy: tegra: HSIC adjustments

[Mikko Perttunen]

On Monday, February 2, 2026 5:05 PM Svyatoslav Ryhel wrote:
> Followup to a recent HSIC bringup with a few small improvements.
> 
> Svyatoslav Ryhel (4):
>   usb: phy: tegra: cosmetic fixes
>   usb: phy: tegra: return error value from utmi_wait_register
>   usb: phy: tegra: parametrize HSIC PTS value
>   usb: phy: tegra: parametrize PORTSC1 register offset
> 
>  drivers/usb/phy/phy-tegra-usb.c   | 45 +++++++++++++++----------------
>  include/linux/usb/tegra_usb_phy.h |  8 ++++--
>  2 files changed, 27 insertions(+), 26 deletions(-)
> 
> 

Series

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>

Re: [PATCH v1 2/4] usb: phy: tegra: return error value from utmi_wait_register

[Sergey Shtylyov]

On 2/2/26 11:05 AM, Svyatoslav Ryhel wrote:

> Return exact error value from utmi_wait_register during HSIC power on.
> 
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
>  drivers/usb/phy/phy-tegra-usb.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
> index 3a7a74f01d1c..6173b240c3ea 100644
> --- a/drivers/usb/phy/phy-tegra-usb.c
> +++ b/drivers/usb/phy/phy-tegra-usb.c
> @@ -891,6 +891,7 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
>  	struct tegra_utmip_config *config = phy->config;
>  	void __iomem *base = phy->regs;
>  	u32 val;
> +	int err = 0;

   This initialization seems pointless -- the newly added variable gets overwritten
by you later...

[...]
> @@ -984,12 +985,14 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
>  	val |= UHSIC_TX_RTUNE(phy->soc_config->uhsic_tx_rtune);
>  	tegra_hsic_writel(phy, UHSIC_PADS_CFG0, val);
>  
> -	if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
> -			       USB_PHY_CLK_VALID))
> +	err = utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
> +				 USB_PHY_CLK_VALID);
> +
> +	if (err)
>  		dev_err(phy->u_phy.dev,
>  			"Timeout waiting for PHY to stabilize on enable (HSIC)\n");
>  
> -	return 0;
> +	return err;
>  }
>  
>  static int uhsic_phy_power_off(struct tegra_usb_phy *phy)

MBR, Sergey

Re: [PATCH v1 2/4] usb: phy: tegra: return error value from utmi_wait_register

[Svyatoslav Ryhel]

пн, 2 лют. 2026 р. о 14:05 Sergey Shtylyov <sergei.shtylyov@gmail.com> пише:
>
> On 2/2/26 11:05 AM, Svyatoslav Ryhel wrote:
>
> > Return exact error value from utmi_wait_register during HSIC power on.
> >
> > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> > ---
> >  drivers/usb/phy/phy-tegra-usb.c | 9 ++++++---
> >  1 file changed, 6 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
> > index 3a7a74f01d1c..6173b240c3ea 100644
> > --- a/drivers/usb/phy/phy-tegra-usb.c
> > +++ b/drivers/usb/phy/phy-tegra-usb.c
> > @@ -891,6 +891,7 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
> >       struct tegra_utmip_config *config = phy->config;
> >       void __iomem *base = phy->regs;
> >       u32 val;
> > +     int err = 0;
>
>    This initialization seems pointless -- the newly added variable gets overwritten
> by you later...
>

So? let it better be initialized and rewritten then later on catch errors.

> [...]
> > @@ -984,12 +985,14 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
> >       val |= UHSIC_TX_RTUNE(phy->soc_config->uhsic_tx_rtune);
> >       tegra_hsic_writel(phy, UHSIC_PADS_CFG0, val);
> >
> > -     if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
> > -                            USB_PHY_CLK_VALID))
> > +     err = utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
> > +                              USB_PHY_CLK_VALID);
> > +
> > +     if (err)
> >               dev_err(phy->u_phy.dev,
> >                       "Timeout waiting for PHY to stabilize on enable (HSIC)\n");
> >
> > -     return 0;
> > +     return err;
> >  }
> >
> >  static int uhsic_phy_power_off(struct tegra_usb_phy *phy)
>
> MBR, Sergey
>

Re: [PATCH v1 2/4] usb: phy: tegra: return error value from utmi_wait_register

[Sergey Shtylyov]

On 2/2/26 3:14 PM, Svyatoslav Ryhel wrote:
> пн, 2 лют. 2026 р. о 14:05 Sergey Shtylyov <sergei.shtylyov@gmail.com> пише:
>>
>> On 2/2/26 11:05 AM, Svyatoslav Ryhel wrote:
>>
>>> Return exact error value from utmi_wait_register during HSIC power on.
>>>
>>> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
>>> ---
>>>  drivers/usb/phy/phy-tegra-usb.c | 9 ++++++---
>>>  1 file changed, 6 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
>>> index 3a7a74f01d1c..6173b240c3ea 100644
>>> --- a/drivers/usb/phy/phy-tegra-usb.c
>>> +++ b/drivers/usb/phy/phy-tegra-usb.c
>>> @@ -891,6 +891,7 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
>>>       struct tegra_utmip_config *config = phy->config;
>>>       void __iomem *base = phy->regs;
>>>       u32 val;
>>> +     int err = 0;
>>
>>    This initialization seems pointless -- the newly added variable gets overwritten
>> by you later...
>>
> 
> So? let it better be initialized and rewritten then later on catch errors.

   I'm not sure what errors you mean here. To me, it (contrariwise) seems to
mask the possible errors when you forget to set err to e.g. -ENOMEM before
returning (when adding a call to kmalloc() or any other function that doesn't
return an error code itself)...
   I'm pretty sure gcc will drop this initialization when generating the object
code and (what's worse) the static analyzers will trip on this code telling you
that the value 0 is unused...

[...]

MBR, Sergey

Re: [PATCH v1 2/4] usb: phy: tegra: return error value from utmi_wait_register

[Sergey Shtylyov]

On 2/2/26 9:01 PM, Sergey Shtylyov wrote:
[...]

>>>> Return exact error value from utmi_wait_register during HSIC power on.
>>>>
>>>> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
>>>> ---
>>>>  drivers/usb/phy/phy-tegra-usb.c | 9 ++++++---
>>>>  1 file changed, 6 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
>>>> index 3a7a74f01d1c..6173b240c3ea 100644
>>>> --- a/drivers/usb/phy/phy-tegra-usb.c
>>>> +++ b/drivers/usb/phy/phy-tegra-usb.c
>>>> @@ -891,6 +891,7 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
>>>>       struct tegra_utmip_config *config = phy->config;
>>>>       void __iomem *base = phy->regs;
>>>>       u32 val;
>>>> +     int err = 0;
>>>
>>>    This initialization seems pointless -- the newly added variable gets overwritten
>>> by you later...
>>>

[...]

>    I'm pretty sure gcc will drop this initialization when generating the object
> code and (what's worse)

   Well, that's actually the good news. I've tried to feed an analogous code to
gcc and clang -- and both seemed to drop the initialization.  I was not able to
make them complain using C=1 and C=2 with make...

> the static analyzers will trip on this code telling you
> that the value 0 is unused...

   Svace (that we have to use here) surely bitches about that. :-)

[...]

MBR, Sergey