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([2a01:e0a:982:cbb0:7a02:f867:7c56:79a0]) by smtp.gmail.com with ESMTPSA id v11-20020a05600c444b00b003f07ef4e3e0sm2665744wmn.0.2023.04.18.04.42.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Apr 2023 04:42:36 -0700 (PDT) Message-ID: <1acdf7b3-cbe4-5689-7c35-5146bc1f07f4@linaro.org> Date: Tue, 18 Apr 2023 13:42:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 From: neil.armstrong@linaro.org Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH v2 1/5] phy: amlogic: enable/disable clkin during Amlogic USB PHY init/exit Content-Language: en-US To: Dmitry Rokosov , gregkh@linuxfoundation.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, mturquette@baylibre.com, vkoul@kernel.org, kishon@kernel.org, hminas@synopsys.com, Thinh.Nguyen@synopsys.com Cc: yue.wang@amlogic.com, hanjie.lin@amlogic.com, kernel@sberdevices.ru, rockosov@gmail.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-phy@lists.infradead.org References: <20230418111612.19479-1-ddrokosov@sberdevices.ru> <20230418111612.19479-2-ddrokosov@sberdevices.ru> Organization: Linaro Developer Services In-Reply-To: <20230418111612.19479-2-ddrokosov@sberdevices.ru> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org On 18/04/2023 13:16, Dmitry Rokosov wrote: > Previously, all Amlogic boards used the XTAL clock as the default board > clock for the USB PHY input, so there was no need to enable it. > However, with the introduction of new Amlogic SoCs like the A1 family, > the USB PHY now uses a gated clock. Hence, it is necessary to enable > this gated clock during the PHY initialization sequence, or disable it > during the PHY exit, as appropriate. > > Signed-off-by: Dmitry Rokosov > --- > drivers/phy/amlogic/phy-meson-g12a-usb2.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/phy/amlogic/phy-meson-g12a-usb2.c b/drivers/phy/amlogic/phy-meson-g12a-usb2.c > index 9d1efa0d9394..80938751da4f 100644 > --- a/drivers/phy/amlogic/phy-meson-g12a-usb2.c > +++ b/drivers/phy/amlogic/phy-meson-g12a-usb2.c > @@ -172,10 +172,16 @@ static int phy_meson_g12a_usb2_init(struct phy *phy) > int ret; > unsigned int value; > > - ret = reset_control_reset(priv->reset); > + ret = clk_prepare_enable(priv->clk); > if (ret) > return ret; > > + ret = reset_control_reset(priv->reset); > + if (ret) { > + clk_disable_unprepare(priv->clk); > + return ret; > + } > + > udelay(RESET_COMPLETE_TIME); > > /* usb2_otg_aca_en == 0 */ > @@ -277,8 +283,11 @@ static int phy_meson_g12a_usb2_init(struct phy *phy) > static int phy_meson_g12a_usb2_exit(struct phy *phy) > { > struct phy_meson_g12a_usb2_priv *priv = phy_get_drvdata(phy); > + int ret = reset_control_reset(priv->reset); > + > + clk_disable_unprepare(priv->clk); > > - return reset_control_reset(priv->reset); > + return ret; > } > > /* set_mode is not needed, mode setting is handled via the UTMI bus */ Reviewed-by: Neil Armstrong